Data Sheet March 31, 2008 Austin SuperlynxTM II SIP Non-isolated Power Modules: 2.4Vdc – 5.5Vdc input; 0.75Vdc to 3.3Vdc Output; 16A Output Current RoHS Compliant EZ-SEQUENCETM Features Compliant to RoHS EU Directive 2002/95/EC (-Z versions) Compliant to ROHS EU Directive 2002/95/EC with lead solder exemption (non-Z versions) Flexible output voltage sequencing EZ-SEQUENCE Delivers up to 16A of output current High efficiency – 95% at 3.3V full load (VIN = 5.0V) Small size and low profile: 50.8 mm x 12.7 mm x 8.1 mm (2.0 in x 0.5 in x 0.32 in) Applications Low output ripple and noise Constant switching frequency (300KHz) High Reliability: Distributed power architectures Intermediate bus voltage applications Programmable Output voltage programmable Telecommunications equipment Line Regulation: 0.3% (typical) Servers and storage applications Load Regulation: 0.4% (typical) Temperature Regulation: 0.4% (typical) Remote On/Off Remote Sense Output overcurrent protection (non-latching) Overtemperature protection Networking equipment o Calculated MTBF > 11.12 M hours at 25 C Full-load Wide operating temperature range (-40°C to 85°C) UL* 60950-1Recognized, CSA† C22.2 No. 60950-1‡ 03 Certified, and VDE 0805:2001-12 (EN60950-1) Licensed ISO** 9001 and ISO 14001 certified manufacturing facilities Description TM Austin SuperLynx II SIP power modules are non-isolated dc-dc converters that can deliver up to 16A of output current with full load efficiency of 95% at 3.3V output. These modules provide a precisely regulated output voltage programmable via external resistor from 0.75Vdc to 3.3Vdc over a wide range of input voltage (VIN = 2.4 – 5.5Vdc). TM TM Austin SuperLynx II has a sequencing feature, EZ-SEQUENCE that enable designers to implement various types of output voltage sequencing when powering multiple modules on board. Their open-frame construction and small footprint enable designers to develop cost- and space-efficient solutions. In addition to sequencing, standard features include remote On/Off, remote sense, programmable output voltage, over current and over temperature protection. * UL is a registered trademark of Underwriters Laboratories, Inc. † CSA is a registered trademark of Canadian Standards Association. VDE is a trademark of Verband Deutscher Elektrotechniker e.V. ** ISO is a registered trademark of the International Organization of Standards ‡ Document No: DS04-020 ver. 1.21 PDF name: superlynx_II_sip_ds.pdf Data Sheet March 31, 2008 Austin SuperlynxTM II SIP Non-isolated Power Modules: 2.4 – 5.5Vdc input; 0.75Vdc to 3.3Vdc Output; 16A output current Absolute Maximum Ratings Stresses in excess of the absolute maximum ratings can cause permanent damage to the device. These are absolute stress ratings only, functional operation of the device is not implied at these or any other conditions in excess of those given in the operations sections of the data sheet. Exposure to absolute maximum ratings for extended periods can adversely affect the device reliability. Parameter Device Symbol Min Max Unit All VIN -0.3 5.8 Vdc Sequencing Voltage All VSEQ -0.3 ViN, Max Vdc Operating Ambient Temperature All TA -40 85 °C All Tstg -55 125 °C Input Voltage Continuous (see Thermal Considerations section) Storage Temperature Electrical Specifications Unless otherwise indicated, specifications apply over all operating input voltage, resistive load, and temperature conditions. Parameter Device Symbol Min Typ 2.4 ⎯ Max Unit 5.5 Vdc 16.0 Adc Operating Input Voltage VO,set ≤ VIN – 0.5V VIN Maximum Input Current All IIN,max VO,set = 0.75 Vdc IIN,No load 25 mA VO,set = 3.3Vdc IIN,No load 40 mA All IIN,stand-by 1.5 mA Inrush Transient All It Input Reflected Ripple Current, peak-to-peak (5Hz to 20MHz, 1μH source impedance; VIN, min to VIN, max, IO= IOmax ; See Test configuration section) All 100 Input Ripple Rejection (120Hz) All 30 (VIN= VIN, min to VIN, max, IO=IO, max VO,set = 3.3Vdc) Input No Load Current (VIN = 5.0Vdc, IO = 0, module enabled) Input Stand-by Current (VIN = 5.0Vdc, module disabled) 2 0.1 2 As mAp-p dB CAUTION: This power module is not internally fused. An input line fuse must always be used. This power module can be used in a wide variety of applications, ranging from simple standalone operation to being part of a complex power architecture. To preserve maximum flexibility, internal fusing is not included, however, to achieve maximum safety and system protection, always use an input line fuse. The safety agencies require a 20A, fast-acting, glass type fuse rated for 32V (see Safety Considerations section). Based on the information provided in this data sheet on inrush energy and maximum dc input current, the same type of fuse with a lower rating can be used. Refer to the fuse manufacturer’s data sheet for further information. LINEAGE POWER 2 Data Sheet March 31, 2008 Austin SuperlynxTM II SIP Non-isolated Power Modules: 2.4 – 5.5Vdc input; 0.75Vdc to 3.3Vdc Output; 16A output current Electrical Specifications (continued) Parameter Output Voltage Set-point Device Symbol Min Typ Max Unit All VO, set –2.0 ⎯ +2.0 % VO, set All VO, set –3% ⎯ +3% % VO, set All VO 0.7525 3.63 Vdc (VIN=IN, min, IO=IO, max, TA=25°C) Output Voltage (Over all operating input voltage, resistive load, and temperature conditions until end of life) Adjustment Range Selected by an external resistor Output Regulation Line (VIN=VIN, min to VIN, max) All ⎯ 0.3 % VO, set Load (IO=IO, min to IO, max) All ⎯ 0.4 % VO, set Temperature (Tref=TA, min to TA, max) All ⎯ 0.4 % VO, set RMS (5Hz to 20MHz bandwidth) All ⎯ 8 15 mVrms Peak-to-Peak (5Hz to 20MHz bandwidth) All ⎯ 25 50 mVpk-pk ⎯ 1000 μF Output Ripple and Noise on nominal output (VIN=VIN, nom and IO=IO, min to IO, max Cout = 1μF ceramic//10μFtantalum capacitors) External Capacitance ESR ≥ 1 mΩ All CO, max ⎯ All CO, max ⎯ ⎯ 5000 μF Output Current All Io 0 ⎯ 16 Adc Output Current Limit Inception (Hiccup Mode ) All IO, lim ⎯ 180 ⎯ % Io Output Short-Circuit Current All IO, s/c ⎯ 3.5 ⎯ Adc ESR ≥ 10 mΩ (VO≤250mV) ( Hiccup Mode ) Efficiency VIN= VIN, nom, TA=25°C IO=IO, max , VO= VO,set Switching Frequency VO,set = 0.75Vdc η 82.0 % VO, set = 1.2Vdc η 87.0 % VO,set = 1.5Vdc η 89.0 % VO,set = 1.8Vdc η 90.0 % VO,set = 2.5Vdc η 92.5 % VO,set = 3.3Vdc η All fsw ⎯ 95.0 300 ⎯ kHz % All Vpk ⎯ 300 ⎯ mV Dynamic Load Response (dIo/dt=2.5A/μs; VIN = VIN, nom; TA=25°C) Load Change from Io= 50% to 100% of Io,max; 1μF ceramic// 10 μF tantalum Peak Deviation Settling Time (Vo<10% peak deviation) All ts ⎯ 25 ⎯ μs (dIo/dt=2.5A/μs; VIN = VIN, nom; TA=25°C) All Vpk ⎯ 300 ⎯ mV All ts ⎯ 25 ⎯ μs Load Change from Io= 100% to 50%of Io,max: 1μF ceramic// 10 μF tantalum Peak Deviation Settling Time (Vo<10% peak deviation) LINEAGE POWER 3 Data Sheet March 31, 2008 Austin SuperlynxTM II SIPNon-isolated Power Modules: 2.4 – 5.5Vdc input; 0.75Vdc to 3.3Vdc Output; 16A output Electrical Specifications (continued) Parameter Device Symbol Min Typ Max Unit All Vpk ⎯ 150 ⎯ mV Dynamic Load Response (dIo/dt=2.5A/μs; V VIN = VIN, nom; TA=25°C) Load Change from Io= 50% to 100% of Io,max; Co = 2x150 μF polymer capacitors Peak Deviation Settling Time (Vo<10% peak deviation) All ts ⎯ 100 ⎯ μs (dIo/dt=2.5A/μs; VIN = VIN, nom; TA=25°C) Load Change from Io= 100% to 50%of Io,max: Co = 2x150 μF polymer capacitors Peak Deviation All Vpk ⎯ 150 ⎯ mV Settling Time (Vo<10% peak deviation) All ts ⎯ 100 ⎯ μs General Specifications Parameter Min Calculated MTBF (IO=IO, max, TA=25°C) Typ Max 11,112,600 Unit Hours Telecordia SR-332 Issue 1: Method 1 Case 3 Weight LINEAGE POWER ⎯ 5.6 (0.2) ⎯ g (oz.) 4 Austin SuperlynxTM II SIP Non-isolated Power Modules: 2.4 – 5.5Vdc input; 0.75Vdc to 3.3Vdc Output; 16A output current Data Sheet March 31, 2008 Feature Specifications Unless otherwise indicated, specifications apply over all operating input voltage, resistive load, and temperature conditions. See Feature Descriptions for additional information. Parameter Device Symbol Min Typ Max Unit On/Off Signal interface Device code with Suffix “4” – Positive logic (On/Off is open collector/drain logic input; Signal referenced to GND - See feature description section) Input High Voltage (Module ON) All VIH ― ― VIN, max V Input High Current All IIH ― ― 10 μA Input Low Voltage (Module OFF) All VIL -0.2 ― 0.3 V Input Low Current All IIL ― 0.2 1 mA Input High Voltage (Module OFF) All VIH 1.5 Vdc Input High Current All IIH Input Low Voltage (Module ON) All VIL Input low Current All Device Code with no suffix – Negative Logic (On/OFF pin is open collector/drain logic input with external pull-up resistor; signal referenced to GND) ― VIN,max 0.2 1 mA ― 0.3 Vdc IIL ― 10 μA All Tdelay 3.9 msec All Tdelay 3.9 msec All Trise -0.2 Turn-On Delay and Rise Times o (IO=IO, max , VIN = VIN, nom, TA = 25 C, ) Case 1: On/Off input is set to Logic Low (Module ON) and then input power is applied (delay from instant at which VIN =VIN, min until Vo=10% of Vo,set) Case 2: Input power is applied for at least one second and then the On/Off input is set to logic Low (delay from instant at which Von/Off=0.3V until Vo=10% of Vo, set) Output voltage Rise time (time for Vo to rise from 10% of Vo,set to 90% of Vo, set) ― Output voltage overshoot – Startup 4.2 8.5 msec ― 1 % VO, set o IO= IO, max; VIN = VIN, min to VIN, max, TA = 25 C Sequencing Delay time Delay from VIN, min to application of voltage on SEQ pin Tracking Accuracy All TsEQ-delay 10 msec (Power-Up: 2V/ms) All |VSEQ –Vo | 100 200 mV (Power-Down: 1V/ms) All |VSEQ –Vo | 200 400 mV ― ― 0.5 V ⎯ 125 ⎯ °C (VIN, min to VIN, max; IO, min to IO, max VSEQ < Vo) Remote Sense Range Overtemperature Protection All All Tref (See Thermal Consideration section) Input Undervoltage Lockout Turn-on Threshold All ⎯ 2.2 ⎯ V Turn-off Threshold All ⎯ 2.0 ⎯ V LINEAGE POWER 5 Austin SuperlynxTM II SIP Non-isolated Power Modules: 2.4 – 5.5Vdc input; 0.75Vdc to 3.3Vdc Output; 16A output current Data Sheet March 31, 2008 Characteristic Curves The following figures provide typical characteristics for the Austin SuperLynxTM II SIP modules at 25ºC. 96 90 93 87 EFFICIENCY, η (%) EFFICIENCY, η (%) 90 84 81 VIN = 3.0V 78 VIN = 5.0V 75 VIN = 5.5V 72 87 84 81 VIN = 3.0V 78 VIN = 5.0V 75 VIN = 5.5V 72 0 4 8 12 16 0 4 OUTPUT CURRENT, IO (A) 8 12 16 OUTPUT CURRENT, IO (A) Figure 1. Converter Efficiency versus Output Current (Vout = 0.75Vdc). Figure 4. Converter Efficiency versus Output Current (Vout = 1.8Vdc). 93 100 97 90 87 EFFICIENCY, η (%) EFFICIENCY, η (%) 94 84 81 VIN = 3.0V 78 VIN = 5.0V 75 VIN = 5.5V 72 91 88 85 82 VIN = 5.0V 76 VIN = 5.5V 73 0 4 8 12 16 0 OUTPUT CURRENT, IO (A) 97 88 94 EFFICIENCY, η (%) 100 91 85 82 79 VIN = 3.0V VIN = 5.0V 73 8 12 16 Figure 5. Converter Efficiency versus Output Current (Vout = 2.5Vdc). 94 76 4 OUTPUT CURRENT, IO (A) Figure 2. Converter Efficiency versus Output Current (Vout = 1.2Vdc). EFFICIENCY, η (%) VIN = 3.0V 79 VIN = 5.5V 70 91 88 85 VIN = 4.5V 82 VIN = 5.0V 79 VIN = 5.5V 76 0 4 8 12 16 OUTPUT CURRENT, IO (A) Figure 3. Converter Efficiency versus Output Current (Vout = 1.5Vdc). LINEAGE POWER 0 4 8 12 16 OUTPUT CURRENT, IO (A) Figure 6. Converter Efficiency versus Output Current (Vout = 3.3Vdc). 6 Austin SuperlynxTM II SIP Non-isolated Power Modules: 2.4 – 5.5Vdc input; 0.75Vdc to 3.3Vdc Output; 16A output current Data Sheet March 31, 2008 Characteristic Curves (continued) 4 2 0 0.5 1.5 2.5 3.5 INPUT VOLTAGE, VIN (V) VO (V) (20mV/div) OUTPUT VOLTAGE Figure 7. Input voltage vs. Input Current (Vout = 2.5Vdc). TIME, t (2μs/div) VO (V) (20mV/div) OUTPUT VOLTAGE Figure 8. Typical Output Ripple and Noise (Vin = 5.0V dc, Vo = 0.75 Vdc, Io=16A). TIME, t (2μs/div) Figure 9. Typical Output Ripple and Noise (Vin = 5.0V dc, Vo = 3.3 Vdc, Io=16A). LINEAGE POWER 4.5 5.5 VO (V) (200mV/div) IO (A) (5A/div) 6 TIME, t (5 μs/div) Figure 10. Transient Response to Dynamic Load Change from 50% to 100% of full load (Vo = 3.3Vdc). VO (V) (200mV/div) 8 IO (A) (5A/div) 10 OUTPUT CURRENT, OUTPUT VOLTAGE Io =16A 12 TIME, t (5 μs/div) Figure 11. Transient Response to Dynamic Load Change from 100% to 50% of full load (Vo = 3.3 Vdc). VO (V) (200mV/div) INPUT CURRENT, IIN (A) Io =8A 14 IO (A) (5A/div) Io =0A 16 OUTPUT CURRENT, OUTPUT VOLTAGE 18 OUTPUT CURRENT, OUTPUT VOLTAGE The following figures provide typical characteristics for the Austin SuperLynxTM II SIP modules at 25ºC. TIME, t (10μs/div) Figure 12. Transient Response to Dynamic Load Change from 50% to 100% of full load (Vo = 5.0 Vdc, Cext = 2x150 μF Polymer Capacitors). 7 Data Sheet March 31, 2008 Austin SuperlynxTM II SIP Non-isolated Power Modules: 2.4 – 5.5Vdc input; 0.75Vdc to 3.3Vdc Output; 16A output current Characteristic Curves (continued) VOV) (1V/div) TIME, t (2 ms/div) Figure 15. Typical Start-Up Using Remote On/Off with Low-ESR external capacitors (Vin = 5.5Vdc, Vo = 3.3Vdc, Io = 16.0A, Co = 1050μF). LINEAGE POWER INPUT VOLTAGE VNN (V) (2V/div) OUTPUT VOLTAGE VOV) (1V/div) VOn/off (V) (2V/div) TIME, t (2 ms/div) Figure 17 Typical Start-Up Using Remote On/Off with Prebias (Vin = 3.3Vdc, Vo = 1.8Vdc, Io = 1.0A, Vbias =1.0Vdc). OUTPUT CURRENT, On/Off VOLTAGE VOn/off (V) (2V/div) OUTPUT VOLTAGE Figure 14. Typical Start-Up Using Remote On/Off (Vin = 5.0Vdc, Vo = 3.3Vdc, Io = 16.0A). On/Off VOLTAGE VOn/off (V) (2V/div) VOV) (1V/div) TIME, t (2 ms/div) Figure 16. Typical Start-Up with application of Vin (Vin = 5.0Vdc, Vo = 3.3Vdc, Io = 16A). VOV) (1V/div) On/Off VOLTAGE OUTPUT VOLTAGE Figure 13. Transient Response to Dynamic Load Change from 100% of 50% full load (Vo = 5.0 Vdc, Cext = 2x150 μF Polymer Capacitors). TIME, t (2 ms/div) OUTPUT VOLTAGE TIME, t (10μs/div) IO (A) (10A/div) OUTPUT CURRENT, OUTPUTVOLTAGE IO (A) (5A/div) VO (V) (200mV/div) The following figures provide typical characteristics for the Austin SuperLynxTM II SIP modules at 25ºC. TIME, t (10ms/div) Figure 18. Output short circuit Current (Vin = 5.0Vdc, Vo = 0.75Vdc). 8 Austin SuperlynxTM II SIP Non-isolated Power Modules: 2.4 – 5.5Vdc input; 0.75Vdc to 3.3Vdc Output; 16A output current Data Sheet March 31, 2008 Characteristic Curves (continued) 18 18 16 16 14 12 10 NC 8 100 LFM 6 200 LFM 4 300 LFM 2 400 LFM 0 20 30 40 50 60 70 80 90 O OUTPUT CURRENT, Io (A) OUTPUT CURRENT, Io (A) The following figures provide thermal derating curves for the Austin SuperLynxTM II SIP modules. 14 12 10 NC 8 6 100 LFM 200 LFM 4 300 LFM 2 400 LFM 0 20 30 40 50 60 70 80 90 O AMBIENT TEMPERATURE, TA C AMBIENT TEMPERATURE, TA C Figure 19. Derating Output Current versus Local Ambient Temperature and Airflow (Vin = 5.0, Vo=3.3Vdc). Figure 22. Derating Output Current versus Local Ambient Temperature and Airflow (Vin = 3.3dc, Vo=0.75 Vdc). 18 OUTPUT CURRENT, Io (A) 16 14 12 10 NC 8 6 100 LFM 200 LFM 4 300 LFM 2 400 LFM 0 20 30 40 50 60 70 80 90 O AMBIENT TEMPERATURE, TA C Figure 20. Derating Output Current versus Local Ambient Temperature and Airflow (Vin = 5.0Vdc, Vo=0.75 Vdc). 18 OUTPUT CURRENT, Io (A) 16 14 12 10 NC 8 6 100 LFM 200 LFM 4 300 LFM 2 400 LFM 0 20 30 40 50 60 70 80 90 O AMBIENT TEMPERATURE, TA C Figure 21. Derating Output Current versus Local Ambient Temperature and Airflow (Vin = 3.3Vdc, Vo=2.5 Vdc). LINEAGE POWER 9 Austin SuperlynxTM II SIP Non-isolated Power Modules: 2.4 – 5.5Vdc input; 0.75Vdc to 3.3Vdc Output; 16A output current Data Sheet March 31, 2008 Test Configurations Design Considerations CURRENT PROBE TO OSCILLOSCOPE VIN(+) BATTERY CIN CS 1000μF Electrolytic 2x100μF Tantalum E.S.R.<0.1Ω @ 20°C 100kHz COM NOTE: Measure input reflected ripple current with a simulated source inductance (LTEST) of 1μH. Capacitor CS offsets possible battery impedance. Measure current as shown above. Figure 23. Input Reflected Ripple Current Test Setup. COPPER STRIP To minimize input voltage ripple, low-ESR polymer and ceramic capacitors are recommended at the input of the module. Figure 26 shows the input ripple voltage (mVpp) for various outputs with 1x150 µF polymer capacitors (Panasonic p/n: EEFUE0J151R, Sanyo p/n: 6TPE150M) in parallel with 1 x 47 µF ceramic capacitor (Panasonic p/n: ECJ-5YB0J476M, Taiyo- Yuden p/n: CEJMK432BJ476MMT) at full load. Figure 27 shows the input ripple with 2x150 µF polymer capacitors in parallel with 2 x 47 µF ceramic capacitor at full load. RESISTIVE LOAD . 10uF 300 SCOPE COM GROUND PLANE NOTE: All voltage measurements to be taken at the module terminals, as shown above. If sockets are used then Kelvin connections are required at the module terminals to avoid measurement errors due to socket contact resistance. Figure 24. Output Ripple and Noise Test Setup. Rdistribution Rcontact Rcontact VIN(+) VO RLOAD VO VIN Rdistribution Rcontact Rcontact COM Rdistribution Rdistribution COM NOTE: All voltage measurements to be taken at the module terminals, as shown above. If sockets are used then Kelvin connections are required at the module terminals to avoid measurement errors due to socket contact resistance. Figure 25. Output Voltage and Efficiency Test Setup. VO. IO Efficiency η = VIN. IIN x 100 % Input Ripple Voltage (mVp-p) 1uF 250 200 150 100 3.3Vin 50 5Vin 0 0.5 1 1.5 2 2.5 3 3.5 Output Voltage (Vdc) Figure 26. Input ripple voltage for various output with 1x150 µF polymer and 1x47 µF ceramic capacitors at the input (full load). Input Ripple Voltage (mVp-p) VO (+) TM The Austin SuperLynx SIP module should be connected to a low-impedance source. A highly inductive source can affect the stability of the module. An input capacitance must be placed directly adjacent to the input pin of the module, to minimize input ripple voltage and ensure module stability. LTEST 1μH Input Filtering 200 180 160 140 120 100 80 60 3.3Vin 40 20 0 5Vin 0.5 1 1.5 2 2.5 3 3.5 Output Voltage (Vdc) Figure 27. Input ripple voltage for various output with 2x150 µF polymer and 2x47 µF ceramic capacitors at the input (full load). LINEAGE POWER 10 Austin SuperlynxTM II SIP Non-isolated Power Modules: 2.4 – 5.5Vdc input; 0.75Vdc to 3.3Vdc Output; 16A output current Data Sheet March 31, 2008 Design Considerations (continued) Safety Considerations Output Filtering For safety agency approval the power module must be installed in compliance with the spacing and separation requirements of the end-use safety agency standards, i.e., UL 60950-1, CSA C22.2 No. 60950-1-03, and VDE 0850:2001-12 (EN60950-1) Licensed. TM The Austin SuperLynx II SIP module is designed for low output ripple voltage and will meet the maximum output ripple specification with 1 µF ceramic and 10 µF tantalum capacitors at the output of the module. However, additional output filtering may be required by the system designer for a number of reasons. First, there may be a need to further reduce the output ripple and noise of the module. Second, the dynamic response characteristics may need to be customized to a particular load step change. To reduce the output ripple and improve the dynamic response to a step load change, additional capacitance at the output can be used. Low ESR polymer and ceramic capacitors are recommended to improve the dynamic response of the module. For stable operation of the module, limit the capacitance to less than the maximum output capacitance as specified in the electrical specification table. LINEAGE POWER For the converter output to be considered meeting the requirements of safety extra-low voltage (SELV), the input must meet SELV requirements. The power module has extra-low voltage (ELV) outputs when all inputs are ELV. The input to these units is to be provided with a fastacting fuse with a maximum rating of 20A in the positive input lead. 11 Austin SuperlynxTM II SIP Non-isolated Power Modules: 2.4 – 5.5Vdc input; 0.75Vdc to 3.3Vdc Output; 16A output current Data Sheet March 31, 2008 Feature Description VIN+ Remote On/Off TM Austin SuperLynx II SIP power modules feature an On/Off pin for remote On/Off operation. Two On/Off logic options are available in the Austin SuperLynxTM II series modules. Positive Logic On/Off signal, device code suffix “4”, turns the module ON during a logic High on the On/Off pin and turns the module OFF during a logic Low. Negative logic On/Off signal, no device code suffix, turns the module OFF during logic High and turns the module ON during logic Low. For positive logic modules, the circuit configuration for using the On/Off pin is shown in Figure 28. The On/Off pin is an open collector/drain logic input signal (Von/Off) that is referenced to ground. During a logic-high (On/Off pin is pulled high internal to the module) when the transistor Q1 is in the Off state, the power module is ON. Maximum allowable leakage current of the transistor when Von/off = VIN,max is 10µA. Applying a logic-low when the transistor Q1 is turned-On, the power module is OFF. During this state VOn/Off must be less than 0.3V. When not using positive logic On/off pin, leave the pin unconnected or tie to VIN. VIN+ MODULE R2 ON/OFF + I ON/OFF VON/OFF PWM Enable Q1 Q3 CSS R4 _ Figure 28. Remote On/Off Implementation. For negative logic On/Off devices, the circuit configuration is shown is Figure 29. The On/Off pin is pulled high with an external pull-up resistor (typical Rpullup = 68k, +/- 5%). When transistor Q1 is in the Off state, logic High is applied to the On/Off pin and the power module is Off. The minimum On/off voltage for logic High on the On/Off pin is 1.5Vdc. To turn the module ON, logic Low is applied to the On/Off pin by turning ON Q1. When not using the negative logic On/Off, leave the pin unconnected or tie to GND. LINEAGE POWER I ON/OFF ON/OFF + VON/OFF PWM Enable R1 Q2 Q1 CSS R2 GND _ Figure 29. Circuit configuration for using negative logic On/OFF Overcurrent Protection To provide protection in a fault (output overload) condition, the unit is equipped with internal current-limiting circuitry and can endure current limiting continuously. At the point of current-limit inception, the unit enters hiccup mode. The unit operates normally once the output current is brought back into its specified range. The typical average output current during hiccup is 3.5A. Input Undervoltage Lockout Q2 R1 R3 GND MODULE Rpull-up At input voltages below the input undervoltage lockout limit, module operation is disabled. The module will begin to operate at an input voltage above the undervoltage lockout turn-on threshold. Overtemperature Protection To provide over temperature protection in a fault condition, the unit relies upon the thermal protection feature of the controller IC. The unit will shutdown if the o thermal reference point Tref, exceeds 125 C (typical), but the thermal shutdown is not intended as a guarantee that the unit will survive temperatures beyond its rating. The module will automatically restart after it cools down. 12 Data Sheet March 31, 2008 Austin SuperlynxTM II SIP Non-isolated Power Modules: 2.4 – 5.5Vdc input; 0.75Vdc to 3.3Vdc Output; 16A output current Feature Descriptions (continued) Output Voltage Programming TM The output voltage of the Austin SuperLynx II SIP can be programmed to any voltage from 0.75 Vdc to 3.3 Vdc by connecting a single resistor (shown as Rtrim in Figure 30) between the TRIM and GND pins of the module. Without an external resistor between TRIM pin and the ground, the output voltage of the module is 0.7525 Vdc. To calculate the value of the resistor Rtrim for a particular output voltage Vo, use the following equation: ⎡ 21070 ⎤ Rtrim = ⎢ − 5110⎥ Ω ⎣Vo − 0.7525 ⎦ For example, to program the output voltage of the Austin TM SuperLynx module to 1.8 Vdc, Rtrim is calculated is follows: ⎤ ⎡ 21070 − 5110⎥ Rtrim = ⎢ ⎦ ⎣1.8 − 0.7525 Rtrim = 15.004 kΩ V IN(+) V O(+) Vout ON/OFF LOAD TRIM R trim By using a 1% tolerance trim resistor, set point tolerance of ±2% is achieved as specified in the electrical specification. The POL Programming Tool, available at www.lineagepower.com under the Design Tools section, helps determine the required external trim resistor needed for a specific output voltage. The amount of power delivered by the module is defined as the voltage at the output terminals multiplied by the output current. When using the trim feature, the output voltage of the module can be increased, which at the same output current would increase the power output of the module. Care should be taken to ensure that the maximum output power of the module remains at or below the maximum rated power (Pmax = Vo,set x Io,max). Voltage Margining Output voltage margining can be implemented in the TM Austin SuperLynx II modules by connecting a resistor, Rmargin-up, from the Trim pin to the ground pin for margining-up the output voltage and by connecting a resistor, Rmargin-down, from the Trim pin to the Output pin for margining-down. Figure 31 shows the circuit configuration for output voltage margining. The POL Programming Tool, available at www.lineagepower.com under the Design Tools section, also calculates the values of Rmargin-up and Rmargin-down for a specific output voltage and % margin. Please consult your local Lineage Power technical representative for additional details. Vo GND Rmargin-down Austin Lynx or Lynx II Series Figure 30. Circuit configuration for programming output voltage using an external resistor. Q2 Trim Table 1 provides Rtrim values required for some common output voltages Rmargin-up Rtrim Table 1 VO, set (V) Rtrim (KΩ) 0.7525 Open 1.2 41.973 1.5 23.077 1.8 15.004 2.5 6.947 3.3 3.160 LINEAGE POWER Q1 GND Figure 31. Circuit Configuration for margining Output voltage. 13 Data Sheet March 31, 2008 Austin SuperlynxTM II SIP Non-isolated Power Modules: 2.4 – 5.5Vdc input; 0.75Vdc to 3.3Vdc Output; 16A output current Feature Descriptions (continued) Remote Sense Voltage Sequencing The Austin SuperLynxTM SIP power modules have a Remote Sense feature to minimize the effects of distribution losses by regulating the voltage at the Remote Sense pin (See Figure 32). The voltage between the Sense pin and Vo pin must not exceed 0.5V. TM Austin SuperLynx II series of modules include a sequencing feature, EZ-SEQUENCE that enables users to implement various types of output voltage sequencing in their applications. This is accomplished via an additional sequencing pin. When not using the sequencing feature, either tie the SEQ pin to VIN or leave it unconnected. When an analog voltage is applied to the SEQ pin, the output voltage tracks this voltage until the output reaches the set-point voltage. The SEQ voltage must be set higher than the set-point voltage of the module. The output voltage follows the voltage on the SEQ pin on a one-to-one volt basis. By connecting multiple modules together, customers can get multiple modules to track their output voltages to the voltage applied on the SEQ pin. The amount of power delivered by the module is defined as the output voltage multiplied by the output current (Vo x Io). When using Remote Sense, the output voltage of the module can increase, which if the same output is maintained, increases the power output by the module. Make sure that the maximum output power of the module remains at or below the maximum rated power. When the Remote Sense feature is not being used, connect the Remote Sense pin to the output pin. R d istrib u tio n R co n ta c t R c o nta ct V IN (+ ) R d istrib utio n VO S e n se For proper voltage sequencing, first, input voltage is applied to the module. The On/Off pin of the module is left unconnected (or tied to GND for negative logic modules or tied to VIN for positive logic modules) so that the module is ON by default. After applying input voltage to the module, a minimum of 10msec delay is required before applying voltage on the SEQ pin. During this time, potential of 50mV (± 10 mV) is maintained on the SEQ pin. After 10msec delay, an analog voltage is applied to the SEQ pin and the output voltage of the module will track this voltage on a one-to-one volt bases until output reaches the set-point voltage. To initiate simultaneous shutdown of the modules, the SEQ pin voltage is lowered in a controlled manner. Output voltage of the modules tracks the voltages below their set-point voltages on a one-to-one basis. A valid input voltage must be maintained until the tracking and output voltages reach ground potential. R LO AD R d istrib u tio n R co n ta c t R c o nta ct COM R d istrib utio n COM Figure 32. Remote sense circuit configuration TM When using the EZ-SEQUENCE feature to control start-up of the module, pre-bias immunity feature during start-up is disabled. The pre-bias immunity feature of the module relies on the module being in the diode-mode TM during start-up. When using the EZ-SEQUENCE feature, modules goes through an internal set-up time of 10msec, and will be in synchronous rectification mode when voltage at the SEQ pin is applied. This will result in sinking current in the module if pre-bias voltage is present at the output of the module. When pre-bias immunity TM during start-up is required, the EZ-SEQUENCE feature must be disabled. For additional guidelines on using EZSEQUENCETM feature of Austin SuperLynxTM II, contact the Lineage Power technical representative for preliminary application note on output voltage sequencing using Austin Lynx II series. LINEAGE POWER 14 Data Sheet March 31, 2008 Austin SuperlynxTM II SIP Non-isolated Power Modules: 2.4 – 5.5Vdc input; 0.75Vdc to 3.3Vdc Output; 16A output current Thermal Considerations Power modules operate in a variety of thermal environments; however, sufficient cooling should always be provided to help ensure reliable operation. Considerations include ambient temperature, airflow, module power dissipation, and the need for increased reliability. A reduction in the operating temperature of the module will result in an increase in reliability. The thermal data presented here is based on physical measurements taken in a wind tunnel. The test set-up is shown in Figure 34. Note that the airflow is parallel to the long axis of the module as shown in figure 33. The derating data applies to airflow in either direction of the module’s long axis. 25.4_ (1.0) Wind Tunnel PWBs Power Module 76.2_ (3.0) x Airflow 5.97_ (0.235) Probe Location for measuring airflow and ambient temperature Air flow Figure 34. Thermal Test Set-up. Top View Tref Figure 33. Tref Temperature measurement location. The thermal reference point, Tref used in the specifications is shown in Figure 33. For reliable o operation this temperature should not exceed 115 C. The output power of the module should not exceed the rated power of the module (Vo,set x Io,max). Please refer to the Application Note “Thermal Characterization Process For Open-Frame BoardMounted Power Modules” for a detailed discussion of thermal aspects including maximum device temperatures. LINEAGE POWER Heat Transfer via Convection Increased airflow over the module enhances the heat transfer via convection. Thermal derating curves showing the maximum output current that can be delivered at different local ambient temperatures (TA) for airflow conditions ranging from natural convection and up to 2m/s (400 ft./min) are shown in the Characteristics Curves section. 15 Data Sheet March 31, 2008 Austin SuperlynxTM II SIP Non-isolated Power Modules: 2.4 – 5.5Vdc input; 0.75Vdc to 3.3Vdc Output; 16A output current Post solder Cleaning and Drying Considerations Post solder cleaning is usually the final circuit-board assembly process prior to electrical board testing. The result of inadequate cleaning and drying can affect both the reliability of a power module and the testability of the finished circuit-board assembly. For guidance on appropriate soldering, cleaning and drying procedures, refer to Board Mounted Power Modules: Soldering and Cleaning Application Note. Through-Hole Lead-Free Soldering Information The RoHS-compliant through-hole products use the SAC (Sn/Ag/Cu) Pb-free solder and RoHS-compliant components. They are designed to be processed through single or dual wave soldering machines. The pins have an RoHS-compliant finish that is compatible with both Pb and Pb-free wave soldering processes. A maximum preheat rate of 3°C/s is suggested. The wave preheat process should be such that the temperature of the power module board is kept below 210°C. For Pb solder, the recommended pot temperature is 260°C, while the Pb-free solder pot is 270°C max. Not all RoHScompliant through-hole products can be processed with paste-through-hole Pb or Pb-free reflow process. If additional information is needed, please consult with your Lineage Power technical representative for more details. LINEAGE POWER 16 Data Sheet March 31, 2008 Austin SuperlynxTM II SIP Non-isolated Power Modules: 2.4 – 5.5Vdc input; 0.75Vdc to 3.3Vdc Output; 16A output current Mechanical Outline Dimensions are in millimeters and (inches). Tolerances: x.x mm ± 0.5 mm (x.xx in. ± 0.02 in.) [unless otherwise indicated] x.xx mm ± 0.25 mm (x.xxx in ± 0.010 in.) Top View Side View Back View PIN 1 FUNCTION Vo 2 Vo 3 Sense+ 4 Vo 5 GND 6 GND 7 VIN 8 VIN B SEQ 9 Trim 10 On/Off LINEAGE POWER 17 Data Sheet March 31, 2008 Austin SuperlynxTM II SIP Non-isolated Power Modules: 2.4 – 5.5Vdc input; 0.75Vdc to 3.3Vdc Output; 16A output current Recommended Pad Layout Dimensions are in millimeters and (inches). Tolerances: x.x mm ± 0.5 mm ( x.xx in. ± 0.02 in.) [unless otherwise indicated] x.xx mm ± 0.25 mm ( x.xxx in ± 0.010 in.) PIN FUNCTION 1 Vo 2 Vo 3 Sense+ 4 Vo 5 GND 6 GND 7 VIN 8 VIN B SEQ 9 Trim 10 On/Off Module Layout – Back view LINEAGE POWER 18 Austin SuperlynxTM II SIP Non-isolated Power Modules: 2.4 – 5.5Vdc input; 0.75Vdc to 3.3Vdc Output; 16A output current Data Sheet March 31, 2008 Ordering Information Please contact your Lineage Power Sales Representative for pricing, availability and optional features. Table 2. Device Codes Product codes Input Voltage Output Voltage Output Current Efficiency 3.3V @ 16A Connector Type Comcodes ATH016A0X3 2.4 – 5.5Vdc 0.75 – 3.3Vdc 16A 95.0% SIP 108989117 ATH016A0X3Z 2.4 – 5.5Vdc 0.75 – 3.3Vdc 16A 95.0% SIP CC109104758 ATH016A0X43 2.4 – 5.5Vdc 0.75 – 3.3Vdc 16A 95.0% SIP 108989125 ATH016A0X43Z 2.4 – 5.5Vdc 0.75 – 3.3Vdc 16A 95.0% SIP CC109104766 -Z refers to RoHS-compliant versions. Asia-Pacific Headquarters Tel: +65 6416 4283 World Wide Headquarters Lineage Power Corporation 3000 Skyline Drive, Mesquite, TX 75149, USA +1-800-526-7819 (Outside U.S.A.: +1-972-284-2626) www.lineagepower.com e-mail: [email protected] Europe, Middle-East and Africa Headquarters Tel: +49 89 6089 286 India Headquarters Tel: +91 80 28411633 Lineage Power reserves the right to make changes to the product(s) or information contained herein without notice. No liability is assumed as a result of their use or application. No rights under any patent accompany the sale of any such product(s) or information. © 2008 Lineage Power Corporation, (Mesquite, Texas) All International Rights Reserved. LINEAGE POWER 19 Document No: DS04-020 ver. 1.21 PDF name: superlynx_II_sip_ds.pdf