MURATA-PS ADS-943

®
®
ADS-943
14-Bit, 3MHz, Low-Distortion
Sampling A/D Converters
FEATURES
•
•
•
•
•
•
•
•
•
14-bit resolution
3MHz minimum sampling rate
Ideal for both frequency and time-domain applications
Excellent peak harmonics, –83dB
Excellent signal-to-noise ratio, 79dB
No missing codes over full military temperature range
±5V supplies, 1.7 Watts
Small, 24-pin ceramic DDIP or SMT
Low cost
INPUT/OUTPUT CONNECTIONS
GENERAL DESCRIPTION
The low-cost ADS-943 is a 14-bit, 3MHz sampling A/D
converter optimized to meet the demanding dynamic-range
and sampling-rate requirements of contemporary digital
telecommunications applications. The ADS-943's outstanding
dynamic performance is evidenced by a peak harmonic
specification of –83dB and a signal-to-noise ratio (SNR) of
79dB. Additionally, the ADS-943 easily achieves the 2.2MHz
minimum sampling rate required by digital receivers in certain
ADSL, HDSL and ATM applications. The ADS-943 also
addresses size and power constraints normally associated with
these types of applications. This device requires just ±5V
supplies, dissipates 1.7 Watts, and is packaged in a very small
24-pin DDIP.
Although optimized for frequency-domain applications, the
ADS-943's DNL and noise specifications are also outstanding,
thereby making it an equally impressive device for time-domain
applications (graphic and medical imaging, process control,
etc.). In fact, the ADS-943 guarantees no missing codes to the
14-bit level over the full military operating temperature range.
The functionally complete ADS-943 contains a fast-settling
sample-hold amplifier, a subranging (two-pass) A/D converter,
an internal reference, timing/control logic, and error-correction
circuitry. Digital input and output levels are TTL. The unit is
PIN
FUNCTION
PIN
1
2
3
4
5
6
7
8
9
10
11
12
BIT1 (MSB)
BIT 2
BIT 3
BIT 4
BIT 5
BIT 6
BIT 7
BIT 8
BIT 9
BIT 10
BIT 11
BIT 12
24
23
22
21
20
19
18
17
16
15
14
13
FUNCTION
ANALOG GROUND
OFFSET ADJUST
+5V ANALOG SUPPLY
ANALOG INPUT
–5V SUPPLY
ANALOG GROUND
START CONVERT
EOC
BIT 14 (LSB)
BIT 13
DIGITAL GROUND
+5V DIGITAL SUPPLY
edge-triggered, requiring only the rising edge of a start convert
pulse to initiate a conversion.
The device is offered with a bipolar input range of ±2V. Models
are available for use in either commercial (0 to +70°C) or
military (–55 to +125°C) operating temperature ranges. A
proprietary, auto-calibrating, error-correcting circuit allows the
device to achieve specified performance over the full military
temperature range.
OFFSET ADJUST 23
BUFFER
16 BIT 14 (LSB)
FLASH
ADC
1
+
POWER AND GROUNDING
REF
22
+5V DIGITAL SUPPLY
13
DIGITAL GROUND
14
–5V SUPPLY
20
ANALOG GROUND
DAC
Σ
19, 24
AMP
START CONVERT 18
EOC 17
FLASH
ADC
2
REGISTER
+5V ANALOG SUPPLY
15 BIT 13
12 BIT 12
11 BIT 11
OUTPUT REGISTER
S/H
DIGITAL CORRECTION LOGIC
–
REGISTER
ANALOG INPUT 21
10 BIT 10
9
BIT 9
8
BIT 8
7
BIT 7
6
BIT 6
5
BIT 5
4
BIT 4
3
BIT 3
2
BIT 2
1
BIT 1 (MSB)
TIMING AND
CONTROL LOGIC
Figure 1. ADS-943 Functional Block Diagram
DATEL, Inc., 11 Cabot Boulevard, Mansfield, MA 02048-1151 (U.S.A.) • Tel: (508) 339-3000 Fax: (508) 339-6356 • For immediate assistance: (800) 233-2765
®
®
ADS-943
ABSOLUTE MAXIMUM RATINGS
PARAMETERS
+5V Supply (Pins 13, 22)
–5V Supply (Pin 20)
Digital Input (Pin 18)
Analog Input (Pin 21)
Lead Temperature (10 seconds)
PHYSICAL/ENVIRONMENTAL
LIMITS
UNITS
0 to +6
0 to –6
–0.3 to +VDD +0.3
–5 to +5
+300
Volts
Volts
Volts
Volts
°C
PARAMETERS
MIN.
TYP.
MAX.
UNITS
0
–55
—
—
+70
+125
°C
°C
Operating Temp. Range, Case
ADS-943MC, GC
ADS-943MM, GM, 883, G/883
Thermal Impedance
θjc
θca
Storage Temperature Range
Package Type
Weight
—
6
—
°C/Watt
—
23
—
°C/Watt
–65
—
+150
°C
24-pin,metal-sealed, ceramic DDIP or SMT
0.42 ounces (12 grams)
FUNCTIONAL SPECIFICATIONS
(TA = +25°C, ±VDD = ±5V, 3MHz sampling rate, and a minimum 3 minute warmup ➀ unless otherwise specified.)
+25°C
ANALOG INPUT
Input Voltage Range ➁
Input Resistance
Input Capacitance
0 to +70°C
–55 to +125°C
MIN.
TYP.
MAX.
MIN.
TYP.
MAX.
MIN.
TYP.
MAX.
UNITS
—
—
—
±2
280
6
—
—
15
—
—
—
±2
280
6
—
—
15
—
—
—
±2
280
6
—
—
15
Volts
Ω
pF
+2.0
—
—
—
10
—
—
—
—
20
—
+0.8
+20
–20
—
+2.0
—
—
—
10
—
—
—
—
20
—
+0.8
+20
–20
—
+2.0
—
—
—
10
—
—
—
—
20
—
+0.8
+20
–20
—
Volts
Volts
µA
µA
ns
—
—
–0.95
—
—
—
14
14
±0.75
±0.5
±0.15
±0.1
±0.2
—
—
—
+1.25
±0.4
±0.3
±0.5
—
—
—
–0.95
—
—
—
14
14
±0.75
±0.5
±0.15
±0.1
±0.2
—
—
—
+1.25
±0.4
±0.3
±0.5
—
—
—
–0.95
—
—
—
14
14
±1
±0.75
±0.4
±0.3
±0.4
—
—
—
+1.5
±0.6
±0.6
±1.25
—
Bits
LSB
LSB
%FSR
%FSR
%
Bits
—
—
—
–83
–83
–83
–77
–77
–77
—
—
—
–83
–83
–83
–77
–77
–77
—
—
—
–81
–81
–81
–75
–75
–75
dB
dB
dB
—
—
—
–80
–80
–80
–76
–76
–76
—
—
—
–80
–80
–80
–76
–76
–76
—
—
—
–78
–77
–77
–74
–73
–73
dB
dB
dB
76
76
75
79
79
78
—
—
—
76
76
75
79
79
78
—
—
—
75
74
74
78
77
77
—
—
—
dB
dB
dB
73
73
73
—
77
77
77
125
—
—
—
—
73
73
73
—
77
77
77
125
—
—
—
—
71
71
71
—
75
75
74
125
—
—
—
—
dB
dB
dB
µVrms
—
–82
—
—
–82
—
—
–82
—
dB
—
—
—
—
—
—
30
10
85
±400
+5
2
—
—
—
—
—
—
—
—
—
—
—
—
30
10
85
±400
+5
2
—
—
—
—
—
—
—
—
—
—
—
—
30
10
85
±400
+5
2
—
—
—
—
—
—
MHz
MHz
dB
V/µs
ns
ps rms
DIGITAL INPUT
Logic Levels
Logic "1"
Logic "0"
Logic Loading "1"
Logic Loading "0"
Start Convert Positive Pulse Width ➂
STATIC PERFORMANCE
Resolution
Integral Nonlinearity (fin = 10kHz)
Differential Nonlinearity (fin = 10kHz)
Full Scale Absolute Accuracy
Bipolar Zero Error (Tech Note 2)
Gain Error (Tech Note 2)
No Missing Codes (fin = 10kHz)
DYNAMIC PERFORMANCE
Peak Harmonics (–0.5dB)
dc to 500kHz
500kHz to 1MHz
1MHz to 1.5MHz
Total Harmonic Distortion (–0.5dB)
dc to 500kHz
500kHz to 1MHz
1MHz to 1.5MHz
Signal-to-Noise Ratio
(w/o distortion, –0.5dB)
dc to 500kHz
500kHz to 1MHz
1MHz to 1.5MHz
Signal-to-Noise Ratio ➃
(& distortion, –0.5dB)
dc to 500kHz
500kHz to 1MHz
1MHz to 1.5MHz
Noise
Two-Tone Intermodulation
Distortion (fin = 975kHz,
1.2MHz, fs = 3MHz, –0.5dB)
Input Bandwidth (–3dB)
Small Signal (–20dB input)
Large Signal (–0dB input)
Feedthrough Rejection (fin = 1.5MHz)
Slew Rate
Aperture Delay Time
Aperture Uncertainty
2
®
®
ADS-943
+25°C
DYNAMIC PERFORMANCE cont.
0 to +70°C
–55 to +125°C
MIN.
TYP.
MAX.
MIN.
TYP.
MAX.
MIN.
TYP.
MAX.
—
—
3
208
100
—
215
333
—
—
—
3
208
100
—
215
333
—
—
—
3
208
100
—
215
333
—
ns
ns
MHz
+2.4
—
—
—
—
—
—
—
—
+0.4
–4
+4
+2.4
—
—
—
+2.4
—
—
—
—
—
—
—
—
+0.4
–4
+4
Volts
Volts
mA
mA
+4.75
–4.75
+5.0
–5.0
+5.25
–5.25
+4.75
–4.75
+5.0
–5.0
+5.25
–5.25
+4.9
–4.9
+5.0
–5.0
+5.25
–5.25
Volts
Volts
—
—
—
—
+210
–125
1.7
—
+230
–145
1.9
±0.05
—
—
—
—
+210
–125
1.7
—
+230
–145
1.9
±0.05
—
—
—
—
+210
–125
1.7
—
+230
–145
1.9
±0.05
mA
mA
Watts
%FSR/%V
S/H Acquisition Time
( to ±0.003%FSR, 4V step)
Overvoltage Recovery Time ➄
A/D Conversion Rate
UNITS
DIGITAL OUTPUTS
Logic Levels
Logic "1"
Logic "0"
Logic Loading "1"
Logic Loading "0"
Output Coding
—
—
—
+0.4
—
–4
—
+4
Offset Binary
POWER REQUIREMENTS
Power Supply Ranges ➅
+5V Supply
–5V Supply
Power Supply Currents
+5V Supply
–5V Supply
Power Dissipation
Power Supply Rejection
Footnotes:
➀ All power supplies should be on before applying a start convert pulse. All
supplies and the clock (start convert pulses) must be present during warmup
periods. The device must be continuously converting during this time.
➃ Effective bits is equal to:
(SNR + Distortion) – 1.76 +
➁ Contact DATEL for other input voltage ranges.
20 log
Full Scale Amplitude
Actual Input Amplitude
6.02
➂ A 3MHz clock with a 20nsec positive pulse width is used for all production testing.
When sampling at 3MHz, the start convert pulse must be between 10 and
110nsec wide or between 160 and 300nsec wide. The falling edge must not occur
between 110 and 160nsec. For lower sampling rates, wider start pulses may be
used.
➄ This is the time required before the A/D output data is valid once the analog input
is back within the specified range. This time is only guaranteed if the input does
not exceed ±2.2V (S/H Saturation Voltage).
➅ The minimum supply voltages of +4.9V and –4.9V for ±VDD are required for
–55°C operation only. The minumum limits are +4.75V and –4.75V when
operating at +125°C.
TECHNICAL NOTES
3. Applying a start convert pulse while a conversion is in
progress (EOC = logic "1") will initiate a new and inaccurate
conversion cycle. Data for the interrupted and subsequent
conversions will be invalid.
1. Obtaining fully specified performance from the ADS-943
requires careful attention to pc-card layout and power
supply decoupling. The device's analog and digital ground
systems are connected to each other internally. For optimal
performance, tie all ground pins (14, 19 and 24) directly to a
large analog ground plane beneath the package.
4. A passive bandpass filter is used at the input of the A/D for
all production testing.
Bypass all power supplies to ground with 4.7µF tantalum
capacitors in parallel with 0.1µF ceramic capacitors. Locate
the bypass capacitors as close to the unit as possible.
2k Ω
2. The ADS-943 achieves its specified accuracies without the
need for external calibration. If required, the device's small
initial offset and gain errors can be reduced to zero using
the adjustment circuitry shown in Figures 2 and 3.
GAIN
ADJUST
+5V
SIGNAL
INPUT
When using this circuitry, or any similar offset and gaincalibration hardware, make adjustments following warmup.
To avoid interaction, always adjust offset before gain.
1.98kΩ
To Pin21
of ADS-943
50Ω
–5V
Figure 2. Optional ADS-943 Gain Adjust Calibration Circuit
3
®
®
ADS-943
CALIBRATION PROCEDURE
Gain Adjust Procedure
Any offset and/or gain calibration procedures should not be
implemented until devices are fully warmed up. To avoid
interaction, offset must be adjusted before gain. The ranges of
adjustment for the circuits in Figures 2 and 3 are guaranteed to
compensate for the ADS-943's initial accuracy errors and may
not be able to compensate for additional system errors.
1. Apply +1.99963V to the ANALOG INPUT (pin 21).
2. Adjust the gain potentiometer until all output bits are 1's and
the LSB flickers between 1 and 0.
3. To confirm proper operation of the device, vary the input
signal to obtain the output coding listed in Table 2.
A/D converters are calibrated by positioning their digital outputs
exactly on the transition point between two adjacent digital
output codes. This can be accomplished by connecting LED's
to the digital outputs and adjusting until certain LED's "flicker"
equally between on and off. Other approaches employ digital
comparators or microcontrollers to detect when the outputs
change from one code to the next.
Table 1. Gain and Zero Adjust
INPUT VOLTAGE
RANGE
±2V
Offset adjusting for the ADS-943 is normally accomplished at
the point where the MSB is a 1 and all other output bits are 0's
and the LSB just changes from a 0 to a 1. This digital output
transition ideally occurs when the applied analog input is
+½ LSB (+122µV).
2. Apply +122µV to the ANALOG INPUT (pin 21).
3. Adjust the offset potentiometer until the output bits are
10 0000 0000 0000 and the LSB flickers between 0 and 1.
4.7µF
+
4.7µF 4.7µF
+ +
0.1µF
0.1µF
20
24
0.1µF
22, 13
21
+5V
ADS-943
20kΩ
–5V
START
CONVERT
+1.99976
+1.50000
+1.00000
0.00000
–1.00000
–1.50000
1.99976
–2.00000
+5V ➀
–5V
23
INPUT VOLTAGE
(±2V RANGE)
+FS – 1 LSB
+3/4FS
+1/2FS
0
–1/2 FS
–3/4 FS
–FS +1 LSB
–FS
1. Apply a train of pulses to the START CONVERT input
(pin 18) so the converter is continuously converting.
ZERO/
OFFSET
ADJUST
+122µV
BIPOLAR
SCALE
Zero/Offset Adjust Procedure
ANALOG
INPUT
GAIN ADJUST
+FS –1½ LSB
+1.99963V
Table 2. Output Coding for Bipolar Operation
Gain adjusting is accomplished when all bits are 1's and the
LSB just changes from a 1 to a 0. This transition ideally occurs
when the analog input is at +full scale minus 1½ LSB's
(+1.99963V).
19
ZERO ADJUST
+1/2 LSB
18
14
1
2
3
4
5
6
7
8
9
10
11
12
15
16
17
BIT 1 (MSB)
BIT 2
BIT 3
BIT 4
BIT 5
BIT 6
BIT 7
BIT 8
BIT 9
BIT 10
BIT 11
BIT 12
BIT 13
BIT 14 (LSB)
EOC
➀ A single +5V supply should be used for both the +5V analog and +5V digital.
If separate supplies are used, the difference between the two cannot exceed 100mV.
Figure 3. Connection Diagram
4
OFFSET BINARY
MSB
LSB
11
11
11
10
01
00
00
00
1111
1000
0000
0000
0000
1000
0000
0000
1111
0000
0000
0000
0000
0000
0000
0000
1111
0000
0000
0000
0000
0000
0001
0000
®
®
ADS-943
THERMAL REQUIREMENTS
All DATEL sampling A/D converters are fully characterized and
specified over operating temperature (case) ranges of 0 to
+70°C and –55 to +125°C. All room-temperature (TA = +25°C)
production testing is performed without the use of heat sinks or
forced-air cooling. Thermal impedance figures for each device
are listed in their respective specification tables.
Electrically-insulating, thermally-conductive "pads" may be
installed underneath the package. Devices should be soldered
to boards rather than "socketed", and of course, minimal air
flow over the surface can greatly help reduce the package
temperature.
In more severe ambient conditions, the package/junction
temperature of a given device can be reduced dramatically
(typically 35%) by using one of DATEL's HS Series heat sinks.
See Ordering Information for the assigned part number. See
page 1-183 of the DATEL Data Acquisition Components
Catalog for more information on the HS Series. Request
DATEL Application Note AN-8, "Heat Sinks for DIP Data
Converters", or contact DATEL directly, for additional
information.
These devices do not normally require heat sinks, however,
standard precautionary design and layout procedures should
be used to ensure devices do not overheat. The ground and
power planes beneath the package, as well as all pcb signal
runs to and from the device, should be as heavy as possible to
help conduct heat away from the package.
N
START
CONVERT
N+1
20ns typ.
333nsec
10ns typ.
INTERNAL S/H
125ns typ.
Hold
35ns typ.
EOC
130ns
Acquisition Time
208ns typ.
215ns max.
125ns typ.
Conversion Time
120ns min., 130ns typ.,
140ns max.
10ns max.
OUTPUT
DATA
Data N-1 Valid
30ns typ.
Invalid
Data
Data N Valid
283ns typ.
Data N+1 Valid
50ns typ.
Note: 1. Scale is approximately 20ns per division. Sampling rate = 3MHz.
2. The start convert positive pulse width must be between either 10 and 110nsec or
160 and 300nsec (when sampling at 3MHz) to ensure proper operation. For sampling
rates lower than 3MHz, the start pulse can be wider than 300nsec, however a minimum
pulse width low of 30nsec should be maintained. A 3MHz clock with a 20nsec positive
pulse width is used for all production testing.
Figure 4. ADS-943 Timing Diagram
5
SG10
SG3
SG2
SG1
P2
26
24
22
20
18
16
14
12
10
8
6
4
2
25
23
21
19
17
15
13
11
9
7
5
3
1
ANA. IN
20µH
L7
20µH
L6
20µH
L5
20µH
L4
20µH
L3
20µH
L2
20µH
L1
C8
0.01µF
C9
0.01µF
C1
2.2µF
C2
2.2µF
+5VF
C11
0.01µF
C12
0.01µF
2.2µF
C5
2.2µF
0.01µF
2.2µF
C4
C10
C3
2.2µF
C7
0.01µF
2.2µF
0.01µF
C14
C13
C6
–5V
+5VA
+15V
–15V
–5VA
+5V
5
+15V
10
12
11
13
-15V
SG8
U6
HCT7474
Q
9
8
5
4
13
12
SPARE GATES
0.1µF
11
U5
6
7
14
8
HCT7474
7
ADS-943
AGND
BIT1 1
OFFSET BIT2 2
+5VA
BIT3 3
AIN
BIT4 4
-5V
BIT5 5
AGND
BIT6 6
TRIG
BIT7 7
EOC
BIT8 8
BIT14
BIT9 9
BIT13
BIT10 10
DGND
BIT11 11
+5VD
BIT12 12
U1
3.2k
2.2µF
14
4
JPR1
PR
5
2
D U6 Q
6
3
1 2 3
CK
Q
1
R3
CLR
0.1µF
C24
+
C23
START CONVERT
24
23
22
21
20
19
18
17
16
15
14
13
+5V
15pF
C25
+5VA
–5V
X1
SG9
+5VF
2.2µF
C27
74HCT86
0.1µF
C15
7 GND
U5
14
+5VF
ANA. IN
SG4
0.1µF
C26
3MHz
CRYSTAL
+5VF
10
9
P3
U5
Figure 5. ADS-943 Evaluation Board Schematic
0.1µF
(Optional)
C19
(Optional)
-15V
C20
PR
D
CK
CLR
2
R1
C18
0.1µF
(Optional)
SG6
20k
CLC402
HI2541
10
+5VA
OFFSET
ADJUST
-5VA
SG7
6
U4
11
+5VF
+
(Optional)
4
–
R2
SG5
+15V
+
P4
ANA.
IN
+
+
+
+
+
+
6
+
OPTION
U5
+
0.1µF
2.2µF
C16
C22
3
2
3
4
5
6
7
8
9
11
2
3
4
5
6
7
8
9
11
74HCT573
C21
74HCT573
19
18
17
16
15
14
13
12
1
+5VF
19
18
17
16
15
14
13
12
1
2.2µF
Q1
1D
2D
Q2
Q3
3D
4D
Q4
U2 Q5
5D
6D
Q6
Q7
7D
Q8
8D
OE
CE
10
20
10
C17
0.1µF
Q1
1D
2D
Q2
Q3
3D
4D
Q4
5D U3 Q5
6D
Q6
Q7
7D
Q8
8D
OE
CE
20
+
+5VF
3. SEE DATEL DWG A-24546 FOR ADDITIONAL INFORMATION
ON ADS-B946 EVALUATION BOARD.
2. CLOSE SG1-SG3, SG9, SG10.
C1 - C7 ARE 20V.
ALL RESISTORS ARE IN OHMS.
1. UNLESS OTHERWISE SPECIFIED ALL CAPACITORS ARE 50V.
NOTES:
74HCT86
8
74HCT86
2
1
START
CONV.
2 3
JPR2
1
CE
B14
B13
B12
B11
B10
B9
B8
B7
B6
B5
B4
B3
B2
B1
TRIG
2
34
32
30
28
26
24
22
20
18
16
14
12
10
8
6
4
P1
1
33
31
29
27
25
23
21
19
17
15
13
11
9
7
5
3
®
®
ADS-943
®
®
ADS-943
0
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
–130
–140
–150
0
150
kHz
300
kHz
450
kHz
600
kHz
750
kHz
900
kHz
1.05
MHz
1.20
MHz
Frequency
(fs = 3MHz, fin = 1.485MHz, Vin = –0.5dB, 16,384-point FFT)
Figure 6. FFT Analysis of ADS-943
+0.60
DNL (LSB's)
0.00
–0.58
Number of Occurences
Amplitude Relative to Full Scale (dB)
–10
0
16,384
Digital Output Code
0
Digital Output Code
16,384
Figure 7. ADS-943 Histogram and Differential Nonlinearity
7
1.35
MHz
1.5
MHz
®
®
ADS-943
MECHANICAL DIMENSIONS INCHES (mm)
1.31 MAX.
(33.27)
24-Pin DDIP
Versions
24
Dimension Tolerances (unless otherwise indicated):
2 place decimal (.XX) ±0.010 (±0.254)
3 place decimal (.XXX) ±0.005 (±0.127)
13
Lead Material: Kovar alloy
0.80 MAX.
(20.32)
ADS-943MC
ADS-943MM
ADS-943/883
1
Lead Finish: 50 microinches (minimum) gold plating
over 100 microinches (nominal) nickel plating
12
0.100 TYP.
(2.540)
1.100
(27.940)
0.235 MAX.
(5.969)
PIN 1 INDEX
0.200 MAX.
(5.080)
0.010
(0.254)
0.190 MAX.
(4.826)
0.100
(2.540)
0.600 ±0.010
(15.240)
SEATING
PLANE
0.025
(0.635)
0.040
(1.016)
0.018 ±0.002
(0.457)
+0.002
–0.001
0.100
(2.540)
1.31 MAX.
(33.02)
24-Pin
Surface Mount
Versions
Dimension Tolerances (unless otherwise indicated):
2 place decimal (.XX) ±0.010 (±0.254)
3 place decimal (.XXX) ±0.005 (±0.127)
13
24
Lead Material: Kovar alloy
0.80 MAX.
(20.32)
ADS-943GC
ADS-943GM
ADS-943G/883
1
0.190 MAX.
(4.826)
Lead Finish: 50 microinches (minimum) gold plating
over 100 microinches (nominal) nickel plating
12
0.020 TYP.
(0.508)
0.060 TYP.
(1.524)
0.130 TYP.
(3.302)
PIN 1
INDEX
0.100
(2.540)
0.100 TYP.
(2.540)
0.020
(0.508)
0.015
(0.381)
MAX. radius
for any pin
0.010 TYP.
(0.254)
0.040
(1.016)
ORDERING INFORMATION
MODEL
OPERATING
TEMP. RANGE
24-PIN
PACKAGE
ADS-943MC
ADS-943MM
ADS-943/883
ADS-943GC
ADS-943GM
ADS-943G/883
0 to +70°C
–55 to +125°C
–55 to +125°C
0 to +70°C
–55 to +125°C
–55 to +125°C
DDIP
DDIP
DDIP
SMT
SMT
SMT
ACCESSORIES
ADS-B943
HS-24
Evaluation Board (without ADS-943)
Heat Sink for all ADS-943 DDIP models
Receptacles for PC board mounting can be ordered through AMP, Inc., Part # 3-331272-8 (Component Lead
Socket), 24 required. For MIL-STD-883 product specifcation, contact DATEL.
®
®
ISO 9001
R
E
DATEL, Inc. 11 Cabot Boulevard, Mansfield, MA 02048-1151
Tel: (508) 339-3000 (800) 233-2765
Fax: (508) 339-6356
Internet: www.datel.com E-mail:[email protected]
Data Sheet Fax Back: (508) 261-2857
G
I
S
T
E
R
E
D
DS-0333A
11/96
DATEL (UK) LTD. Tadley, England Tel: (01256)-880444
DATEL S.A.R.L. Montigny Le Bretonneux, France Tel: 1-34-60-01-01
DATEL GmbH München, Germany Tel: 89-544334-0
DATEL KK Tokyo, Japan Tel: 3-3779-1031, Osaka Tel: 6-354-2025
DATEL makes no representation that the use of its products in the circuits described herein, or the use of other technical information contained herein, will not infringe upon existing or future patent rights. The descriptions contained herein
do not imply the granting of licenses to make, use, or sell equipment constructed in accordance therewith. Specifications are subject to change without notice. The DATEL logo is a registered DATEL, Inc. trademark.