TI OPA2211SPWP

OPA2211-HT
www.ti.com
SBOS684A – AUGUST 2013 – REVISED AUGUST 2013
1.1 nV/√Hz Noise, Low Power, Precision Operational Amplifier
Check for Samples: OPA2211-HT
FEATURES
1
•
•
2
•
•
•
•
•
•
•
•
•
•
•
Low Voltage Noise: 1.1 nV/√Hz at 1 kHz
Input Voltage Noise:
80 nVPP (0.1 Hz to 10 Hz)
THD+N: –136dB (G = 1, f = 1 kHz)
Offset Voltage: 350 μV (max)
Offset Voltage Drift: 0.35 μV/°C (typ)
Low Supply Current: 6 mA/Ch (max)
Unity-Gain Stable
Gain Bandwidth Product:
80 MHz (G = 100)
45 MHz (G = 1)
Slew Rate: 27 V/μs
16-Bit Settling: 700 ns
Wide Supply Range:
±2.25 V to ±18 V, 4.5 V to 36 V
Rail-to-rail output
Output current: 30 mA
APPLICATIONS
•
•
Down-Hole Drilling
High Temperature Environments
SUPPORTS EXTREME TEMPERATURE
APPLICATIONS
•
•
•
•
•
•
•
•
(1)
Controlled Baseline
One Assembly/Test Site
One Fabrication Site
Available in Extreme (–55°C/150°C)
Temperature Range (1)
Extended Product Life Cycle
Extended Product-Change Notification
Product Traceability
Texas Instruments high temperature products
utilize highly optimized silicon (die) solutions
with design and process enhancements to
maximize performance over extended
temperatures.
Custom temperature ranges available
DESCRIPTION
The OPA2211 is a precision operational amplifier that achieves very low 1.1 nV/√Hz noise density with a supply
current of only 3.6 mA. This device also offers rail-to-rail output swing, which maximizes dynamic range.
The extremely low voltage and low current noise, high speed, and wide output swing of the OPA2211 make this
device an excellent choice as a loop filter amplifier in PLL applications.
In precision data acquisition applications, the OPA2211 provides 700-ns settling time to 16-bit accuracy
throughout 10-V output swings. This ac performance, combined with only 240-μV of offset and
0.35-μV/°C of drift over temperature, makes the OPA2211 ideal for driving high-precision 16-bit analog-to-digital
converters (ADCs) or buffering the output of high-resolution digital-to-analog converters (DACs).
The OPA2211 is specified over a wide dual-power supply range of ±2.25 V to ±18 V, or for single-supply
operation from 4.5 V to 36 V.
This op amp is specified from TJ = –55°C to 150°C.
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2013, Texas Instruments Incorporated
OPA2211-HT
SBOS684A – AUGUST 2013 – REVISED AUGUST 2013
www.ti.com
INPUT VOLTAGE NOISE DENSITY vs FREQUENCY
Voltage Noise Density (nV/ÖHz)
100
10
1
0.1
1
10
100
1k
10k
100k
Frequency (Hz)
Table 1. ORDERING INFORMATION (1)
(1)
TJ
PACKAGE
ORDERABLE PART NUMBER
TOP-SIDE MARKING
–55°C to 150°C
PWP
OPA2211SPWP
OP2211S
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
Web site at www.ti.com.
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
ABSOLUTE MAXIMUM RATINGS (1)
Over operating free-air temperature range (unless otherwise noted).
Supply Voltage
VS = (V+) – (V–)
Input Voltage
Input Current (Any pin except power-supply pins)
VALUE
UNIT
40
V
(V–) – 0.5 to (V+) + 0.5
V
±10
mA
Output Short-Circuit (2)
Continuous
Storage Temperature, (TS)
–65 to +165
°C
Junction Temperature, (TJ)
–55 to +165
°C
Human Body Model (HBM)
3000
V
Charged Device Model (CDM)
1000
V
ESD Ratings
(1)
(2)
2
Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may
degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond
those specified is not supported.
Short-circuit to VS/2 (ground in symmetrical dual supply setups), one amplifier per package.
Submit Documentation Feedback
Copyright © 2013, Texas Instruments Incorporated
Product Folder Links: OPA2211-HT
OPA2211-HT
www.ti.com
SBOS684A – AUGUST 2013 – REVISED AUGUST 2013
THERMAL INFORMATION
OPA2211-HT
THERMAL METRIC (1)
PWP
UNITS
20 PINS
Junction-to-ambient thermal resistance (2)
θJA
(3)
41.2
θJCtop
Junction-to-case (top) thermal resistance
θJB
Junction-to-board thermal resistance (4)
23.9
ψJT
Junction-to-top characterization parameter (5)
1.1
ψJB
Junction-to-board characterization parameter (6)
23.7
θJCbot
Junction-to-case (bottom) thermal resistance (7)
1.1
(1)
(2)
(3)
(4)
(5)
(6)
(7)
21.4
°C/W
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, high-K board, as
specified in JESD51-7, in an environment described in JESD51-2a.
The junction-to-case (top) thermal resistance is obtained by simulating a cold plate test on the package top. No specific JEDECstandard test exists, but a close description can be found in the ANSI SEMI standard G30-88.
The junction-to-board thermal resistance is obtained by simulating in an environment with a ring cold plate fixture to control the PCB
temperature, as described in JESD51-8.
The junction-to-top characterization parameter, ψJT, estimates the junction temperature of a device in a real system and is extracted
from the simulation data for obtaining θJA, using a procedure described in JESD51-2a (sections 6 and 7).
The junction-to-board characterization parameter, ψJB, estimates the junction temperature of a device in a real system and is extracted
from the simulation data for obtaining θJA , using a procedure described in JESD51-2a (sections 6 and 7).
The junction-to-case (bottom) thermal resistance is obtained by simulating a cold plate test on the exposed (power) pad. No specific
JEDEC standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.
Spacer
Submit Documentation Feedback
Copyright © 2013, Texas Instruments Incorporated
Product Folder Links: OPA2211-HT
3
OPA2211-HT
SBOS684A – AUGUST 2013 – REVISED AUGUST 2013
www.ti.com
PIN CONFIGURATION
PWP PACKAGE
(TOP VIEW)
OUTA
1
20
NC
2
19
NC
NC
3
18
NC
-INA
17
16
V+
NC
4
5
NC
6
+INA
7
NC
8
13
V-
9
12
NC
4
THERMAL PAD
15
10
14
11
NC
NC
NC
OUTB
NC
+INB
-INB
Submit Documentation Feedback
Copyright © 2013, Texas Instruments Incorporated
Product Folder Links: OPA2211-HT
OPA2211-HT
www.ti.com
SBOS684A – AUGUST 2013 – REVISED AUGUST 2013
ELECTRICAL CHARACTERISTICS: VS = ±2.25V to ±18V
BOLDFACE limits apply over the specified temperature range, TJ = –55°C to +150°C.
At TJ = +25°C, RL = 10kΩ connected to midsupply, VCM = VOUT = midsupply, unless otherwise noted.
Standard Grade
OPA2211
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNIT
±50
±175
μV
OFFSET VOLTAGE
Input Offset Voltage
VOS
VS = ±15V
Over Temperature
Drift
vs Power Supply
±350
dVOS/dT
PSRR
VS = ±2.25V to ±18V
0.1
Over Temperature
µV
μV/°C
0.35
1
μV/V
3
μV/V
INPUT BIAS CURRENT
Input Bias Current
IB
VCM = 0V
±60
Over Temperature
Offset Current
IOS
VCM = 0V
±25
Over Temperature
±215
nA
±350
nA
±120
nA
±200
nA
NOISE
Input Voltage Noise
en
Input Voltage Noise Density
Input Current Noise Density
In
f = 0.1Hz to 10Hz
80
nVPP
f = 10Hz
2
nV/√Hz
f = 100Hz
1.4
nV/√Hz
f = 1kHz
1.1
nV/√Hz
f = 10Hz
3.2
pA/√Hz
f = 1kHz
1.7
pA/√Hz
INPUT VOLTAGE RANGE
Common-Mode Voltage Range (1)
VS ≥ ±5V
(V–) + 1.8
(V+) – 1.4
VS < ±5V
(V–) + 2
(V+) – 1.4
VS ≥ ±5V, (V–) + 2V ≤ VCM ≤ (V+) – 2V
114
120
dB
VS < ±5V, (V–) + 2V ≤ VCM ≤ (V+) – 2V
106
120
dB
Differential
20k || 8
Ω || pF
Common-Mode
109 || 2
Ω || pF
Common-Mode Rejection Ratio
VCM
CMRR
V
V
INPUT IMPEDANCE
OPEN-LOOP GAIN
Open-Loop Voltage Gain
Over Temperature
AOL
(V–) + 0.2V ≤ VO ≤ (V+) – 0.2V,
RL = 10kΩ
114
130
dB
AOL
(V–) + 0.6V ≤ VO ≤ (V+) – 0.6V,
RL = 600Ω
110
114
dB
AOL
(V–) + 0.6V ≤ VO ≤ (V+) – 0.6V,
IO ≤ 15mA
100
dB
FREQUENCY RESPONSE
Gain-Bandwidth Product
G = 100
80
MHz
G=1
45
MHz
27
V/μs
VS = ±15V, G = –1, 10V Step, CL = 100pF
400
ns
0.0015% (16-bit)
VS = ±15V, G = –1, 10V Step, CL = 100pF
700
ns
Overload Recovery Time
G = –10
500
ns
G = +1, f = 1kHz,
VO = 3VRMS, RL = 600Ω
0.000015
%
–136
dB
Slew Rate
Settling Time, 0.01%
Total Harmonic Distortion + Noise
(1)
GBW
SR
tS
THD+N
The OPA2211-HT is not intended to be used as a comparator due to its limited differential input range capability. Refer to the INPUT
PROTECTION section of this data sheet.
Submit Documentation Feedback
Copyright © 2013, Texas Instruments Incorporated
Product Folder Links: OPA2211-HT
5
OPA2211-HT
SBOS684A – AUGUST 2013 – REVISED AUGUST 2013
www.ti.com
ELECTRICAL CHARACTERISTICS: VS = ±2.25V to ±18V (continued)
BOLDFACE limits apply over the specified temperature range, TJ = –55°C to +150°C.
At TJ = +25°C, RL = 10kΩ connected to midsupply, VCM = VOUT = midsupply, unless otherwise noted.
Standard Grade
OPA2211
PARAMETER
CONDITIONS
MIN
RL = 10kΩ, AOL ≥ 114dB
RL = 600Ω, AOL ≥ 110dB
IO < 15mA, AOL ≥ 100dB
TYP
MAX
UNIT
(V–) + 0.2
(V+) – 0.2
V
(V–) + 0.6
(V+) – 0.6
V
(V–) + 0.6
(V+) – 0.6
OUTPUT
Voltage Output
VOUT
Short-Circuit Current
ISC
Capacitive Load Drive
+30/–45
CLOAD
Open-Loop Output Impedance
See Typical Characteristics
ZO
f = 1MHz
V
mA
pF
Ω
5
POWER SUPPLY
Specified Voltage
VS
Quiescent Current
(per channel)
IQ
±2.25
IOUT = 0A
3.6
Over Temperature
±18
V
4.5
mA
6
mA
TEMPERATURE RANGE
Specified Range
TA
–55
+150
°C
Operating Range
TA
–55
+150
°C
100000.00
Estimated Life (Hours)
10000.00
Wirebond Fail Mode
1000.00
100.00
10.00
125
130
135
140
145
150
155
160
165
170
175
Continuous TJ (°C)
(1)
See Datasheet for Absolute Maximum and Minimum Recommended Operating Conditions.
(2)
Silicon operating life design goal is 10 years at 105°C junction temperature (does not include package interconnect
life).
(3)
The predicted operating lifetime vs. junction temperature is based on reliability modeling and available qualification
data.
(4)
Device is qualified for 1000 hour operation at 150°C. Device is functional at 175°C, but at reduced operating life.
Figure 1. OPA2211-HT Wirebond Life Derating Chart
6
Submit Documentation Feedback
Copyright © 2013, Texas Instruments Incorporated
Product Folder Links: OPA2211-HT
OPA2211-HT
www.ti.com
SBOS684A – AUGUST 2013 – REVISED AUGUST 2013
TYPICAL CHARACTERISTICS
At TA = +25°C, VS = ±18V, and RL = 10kΩ, unless otherwise noted.
INPUT VOLTAGE NOISE DENSITY
vs FREQUENCY
INPUT CURRENT NOISE DENSITY
vs FREQUENCY
100
Current Noise Density (pA/ÖHz)
Voltage Noise Density (nV/ÖHz)
100
10
10
1
1
0.1
1
10
100
1k
10k
0.1
100k
1
10
100
Frequency (Hz)
Figure 2.
-140
0.00001
100
1k
10k 20k
Total Harmonic Distortion + Noise (%)
Total Harmonic Distortion + Noise (%)
G=1
VOUT = 3VRMS
0.1
-60
0.01
-80
G = 11
-100
0.001
-120
0.0001
G=1
0.00001
VS = ±15V
RL = 600W
1kHz Signal
0.000001
0.01
-140
G = -1
0.1
1
10
Total Harmonic Distortion + Noise (dB)
-120
0.0001
Total Harmonic Distortion + Noise (dB)
G = 11
VOUT = 3VRMS
10
100k
THD+N RATIO vs OUTPUT VOLTAGE AMPLITUDE
-100
VS = ±15V
RL = 600W
G = -1
VOUT = 3VRMS
10k
Figure 3.
THD+N RATIO vs FREQUENCY
0.001
1k
Frequency (Hz)
-160
100
Output Voltage Amplitude (VRMS)
Frequency (Hz)
Figure 4.
Figure 5.
20nV/div
0.1Hz TO 10Hz NOISE
Time (1s/div)
Figure 6.
Submit Documentation Feedback
Copyright © 2013, Texas Instruments Incorporated
Product Folder Links: OPA2211-HT
7
OPA2211-HT
SBOS684A – AUGUST 2013 – REVISED AUGUST 2013
www.ti.com
TYPICAL CHARACTERISTICS (continued)
At TA = +25°C, VS = ±18V, and RL = 10kΩ, unless otherwise noted.
POWER-SUPPLY REJECTION RATIO
vs FREQUENCY (Referred to Input)
COMMON-MODE REJECTION RATIO
vs FREQUENCY
160
140
140
120
100
100
CMRR (dB)
PSRR (dB)
120
-PSRR
80
+PSRR
60
80
60
40
40
20
20
0
0
1
10
100
1k
10k
100k
1M
10M
10k
100M
100k
10M
1M
100M
Frequency (Hz)
Frequency (Hz)
Figure 7.
Figure 8.
OPEN-LOOP OUTPUT IMPEDANCE
vs FREQUENCY
GAIN AND PHASE vs FREQUENCY
180
140
10k
120
Gain (dB)
100
100
10
80
90
60
40
Gain
20
1
135
Phase
Phase (°)
ZO (W)
1k
45
0
-20
0.1
10
100
1k
10k
1M
100k
10M
100
100M
1k
10k
100k
1M
10M
0
100M
Frequency (Hz)
Frequency (Hz)
Figure 9.
Figure 10.
OPEN-LOOP GAIN vs TEMPERATURE
5
Open-Loop Gain (mV/V)
4
RL = 10kW
3
2
300mV Swing From Rails
1
0
-1
200mV Swing From Rails
-2
-3
-4
-5
-75 -50 -25
0
25
50
75 100 125 150 175 200
Temperature (°C)
Figure 11.
8
Submit Documentation Feedback
Copyright © 2013, Texas Instruments Incorporated
Product Folder Links: OPA2211-HT
OPA2211-HT
www.ti.com
SBOS684A – AUGUST 2013 – REVISED AUGUST 2013
TYPICAL CHARACTERISTICS (continued)
At TA = +25°C, VS = ±18V, and RL = 10kΩ, unless otherwise noted.
OFFSET VOLTAGE DRIFT PRODUCTION DISTRIBUTION
112.5
125.0
87.5
100.0
62.5
75.0
37.5
50.0
25.0
0
12.5
-12.5
-37.5
-25.0
-62.5
-50.0
-87.5
-75.0
-112.5
-100.0
-125.0
Population
Population
OFFSET VOLTAGE PRODUCTION DISTRIBUTION
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5
Offset Voltage Drift (mV/°C)
Offset Voltage (mV)
Figure 12.
Figure 13.
OFFSET VOLTAGE vs COMMON-MODE VOLTAGE
200
2000
150
1500
100
1000
±IB
+IB
50
500
VOS (mV)
IB and IOS Bias Current (nA)
IB AND IOS CURRENT
vs
TEMPERATURE
0
±50
IOS
±100
0
-500
-1000
-1500
±150
-2000
±200
±60 ±40 ±20
0
20
40
60
80
100 120 140
Ambient Temperature (ƒC)
(V-)+1.0 (V-)+1.5 (V-)+2.0
Figure 14.
Figure 15.
VOS WARMUP
12
10
INPUT OFFSET CURRENT vs SUPPLY VOLTAGE
100
20 Typical Units Shown
80
8
5 Typical Units Shown
60
6
4
40
2
IOS (nA)
VOS Shift (mV)
(V+)-1.5 (V+)-1.0 (V+)-0.5
VCM (V)
C001
0
-2
-4
-6
20
0
-20
-40
-60
-8
-80
-10
-12
0
10
20
30
40
50
60
-100
2.25
4
6
8
10
Time (s)
VS (±V)
Figure 16.
Figure 17.
12
14
16
Submit Documentation Feedback
Copyright © 2013, Texas Instruments Incorporated
Product Folder Links: OPA2211-HT
18
9
OPA2211-HT
SBOS684A – AUGUST 2013 – REVISED AUGUST 2013
www.ti.com
TYPICAL CHARACTERISTICS (continued)
At TA = +25°C, VS = ±18V, and RL = 10kΩ, unless otherwise noted.
INPUT OFFSET CURRENT vs COMMON-MODE VOLTAGE
INPUT BIAS CURRENT vs SUPPLY VOLTAGE
100
150
VS = 36V
3 Typical Units Shown
75
3 Typical Units Shown
100
Unit 1
Unit 2
50
25
IB (nA)
IOS (nA)
50
0
0
Unit 3
-25
-50
Common-Mode Range
-50
-100
-75
-IB
+IB
-100
1
5
10
15
20
25
30
-150
2.25
35
10
Figure 19.
+IB
16
18
5
4
Unit 2
Unit 1
14
QUIESCENT CURRENT vs TEMPERATURE
-IB
VS = 36V
3 Typical Units Shown
12
6
IQ (mA)
IB (nA)
8
Figure 18.
INPUT BIAS CURRENT vs COMMON-MODE VOLTAGE
50
6
VS (±V)
150
100
4
VCM (V)
0
-50
3
2
Unit 3
-100
1
Common-Mode Range
-150
0
1
5
10
15
20
25
30
35
-75 -50 -25
VCM (V)
50
75 100 125 150 175 200
Figure 20.
Figure 21.
QUIESCENT CURRENT vs
SUPPLY VOLTAGE
NORMALIZED QUIESCENT CURRENT
vs TIME
4.0
0.05
3.5
0
3.0
-0.05
IQ Shift (mA)
IQ (mA)
25
Temperature (°C)
2.5
2.0
1.5
-0.10
-0.15
-0.20
1.0
0.5
-0.25
0
-0.30
Average of 10 Typical Units
0
4
8
12
16
20
24
28
32
36
0
60
120 180 240 300 360 420 480 540
600
Time (s)
VS (V)
Figure 22.
10
0
Figure 23.
Submit Documentation Feedback
Copyright © 2013, Texas Instruments Incorporated
Product Folder Links: OPA2211-HT
OPA2211-HT
www.ti.com
SBOS684A – AUGUST 2013 – REVISED AUGUST 2013
TYPICAL CHARACTERISTICS (continued)
At TA = +25°C, VS = ±18V, and RL = 10kΩ, unless otherwise noted.
60
50
40
30
20
10
0
-10
-20
-30
-40
-50
SMALL-SIGNAL STEP RESPONSE
(100mV)
G = –1
RL = 600Ω
CL = 10pF
Sourcing
CF
5.6pF
20mV/div
ISC (mA)
SHORT-CIRCUIT CURRENT
vs TEMPERATURE
RF
604Ω
RI
604Ω
+18V
OPA2211
RL
CL
-18V
Sinking
-60
-75 -50 -25
0
25
50
Time (0.1μs/div)
100 125 150 175 200
75
Temperature (°C)
Figure 24.
Figure 25.
SMALL-SIGNAL STEP RESPONSE
(100mV)
SMALL-SIGNAL STEP RESPONSE
(100mV)
G = –1
RL = 600Ω
CL = 100pF
G = +1
RL = 600Ω
CL = 10pF
RI
604Ω
20mV/div
20mV/div
CF
5.6pF
RF
604Ω
+18V
OPA2211
+18V
OPA2211
-18V
CL
RL
CL
RL
-18V
Time (0.1μs/div)
Time (0.1μs/div)
Figure 26.
Figure 27.
SMALL-SIGNAL STEP RESPONSE
(100mV)
SMALL-SIGNAL OVERSHOOT
vs CAPACITIVE LOAD (100mV Output Step)
60
G = +1
50
CF
5.6pF
RI
604Ω
Overshoot (%)
20mV/div
G = –1
RL = 600Ω
CL = 10pF
RF
604Ω
+18V
40
G = -1
30
G = 10
20
OPA2211
CL
-18V
RL
10
0
Time (0.1μs/div)
0
200
400
600
800
1000
1200
1400
Capacitive Load (pF)
Figure 28.
Figure 29.
Submit Documentation Feedback
Copyright © 2013, Texas Instruments Incorporated
Product Folder Links: OPA2211-HT
11
OPA2211-HT
SBOS684A – AUGUST 2013 – REVISED AUGUST 2013
www.ti.com
TYPICAL CHARACTERISTICS (continued)
At TA = +25°C, VS = ±18V, and RL = 10kΩ, unless otherwise noted.
LARGE-SIGNAL STEP RESPONSE
LARGE-SIGNAL STEP RESPONSE
G = -1
CL = 100pF
RL = 600W
G = +1
CL = 100pF
RL = 600W
RF = 100W
2V/div
2V/div
RF = 0W
Note: See the
Applications Information
section, Input Protection.
Time (0.5ms/div)
Figure 31.
LARGE-SIGNAL POSITIVE SETTLING TIME
(10VPP, CL = 100pF)
LARGE-SIGNAL POSITIVE SETTLING TIME
(10VPP, CL = 10pF)
0.8
0.008
0.6
0.006
0.6
0.006
0.4
0.004
0.002
0
0
-0.002
-0.2
(±1/2 LSB = ±0.00075%)
-0.4
-0.004
0
-0.2
(±1/2 LSB = ±0.00075%)
-0.4
-0.008
0
100
200 300
400 500 600
Time (ns)
-0.010
700 800 900 1000
Figure 33.
LARGE-SIGNAL NEGATIVE SETTLING TIME
(10VPP, CL = 10pF)
0.8
0.008
0.8
0.008
0.6
0.006
0.6
0.006
0.4
0.004
0.002
0
0
-0.2
-0.002
(±1/2 LSB = ±0.00075%)
-0.4
-0.004
-0.6
-0.006
-0.8
-1.0
100
200 300
400 500 600
Time (ns)
0.010
0.4
16-Bit Settling
0.2
0
0.004
0.002
0
-0.2
-0.002
(±1/2 LSB = ±0.00075%)
-0.4
-0.004
-0.6
-0.006
-0.008
-0.8
-0.008
-0.010
700 800 900 1000
-1.0
0
100
Figure 34.
200 300
400 500 600
Time (ns)
D From Final Value (%)
16-Bit Settling
0.2
D From Final Value (mV)
0.010
1.0
D From Final Value (%)
D From Final Value (mV)
-0.004
-1.0
LARGE-SIGNAL NEGATIVE SETTLING TIME
(10VPP, CL = 100pF)
0
12
-0.002
-0.010
700 800 900 1000
Figure 32.
1.0
0.002
-0.006
-1.0
400 500 600
Time (ns)
0
0.004
-0.8
-0.8
200 300
16-Bit Settling
0.2
-0.008
-0.006
100
0.4
-0.6
-0.6
0
0.010
D From Final Value (%)
16-Bit Settling
0.2
D From Final Value (mV)
1.0
0.008
D From Final Value (%)
0.010
0.8
1.0
D From Final Value (mV)
Time (0.5ms/div)
Figure 30.
-0.010
700 800 900 1000
Figure 35.
Submit Documentation Feedback
Copyright © 2013, Texas Instruments Incorporated
Product Folder Links: OPA2211-HT
OPA2211-HT
www.ti.com
SBOS684A – AUGUST 2013 – REVISED AUGUST 2013
TYPICAL CHARACTERISTICS (continued)
At TA = +25°C, VS = ±18V, and RL = 10kΩ, unless otherwise noted.
NEGATIVE OVERLOAD RECOVERY
POSITIVE OVERLOAD RECOVERY
G = –10
VIN
G = –10
10kΩ
VOUT
1kΩ
0V
VOUT
OPA2211
VIN
5V/div
5V/div
10kΩ
1kΩ
OPA2211
VOUT
VIN
0V
VOUT
VIN
Time (0.5μs/div)
Time (0.5μs/div)
Figure 36.
Figure 37.
OUTPUT VOLTAGE vs OUTPUT CURRENT
NO PHASE REVERSAL
20
0°C
15
5
5V/div
VOUT (V)
Output
+85°C
+125°C
10
+125°C
0
-55°C
0°C
+150°C
-5
+18V
-10
OPA2211
Output
+85°C
-15
37VPP
(±18.5V)
-18V
-20
0
10
20
30
40
IOUT (mA)
50
60
70
Figure 38.
0.5ms/div
Figure 39.
Submit Documentation Feedback
Copyright © 2013, Texas Instruments Incorporated
Product Folder Links: OPA2211-HT
13
OPA2211-HT
SBOS684A – AUGUST 2013 – REVISED AUGUST 2013
www.ti.com
APPLICATION INFORMATION
The OPA2211 is a unity-gain stable, precision op
amp with very low noise. Applications with noisy or
high-impedance power supplies require decoupling
capacitors close to the device pins. In most cases,
0.1μF capacitors are adequate. Figure 40 shows a
simplified schematic of the OPA2211. This die uses a
SiGe bipolar process and contains 180 transistors.
OPERATING VOLTAGE
OPA2211 series op amps operate from ±2.25V to
±18V
supplies
while
maintaining
excellent
performance. The OPA2211 series can operate with
as little as +4.5V between the supplies and with up to
+36V between the supplies. However, some
applications do not require equal positive and
negative output voltage swing. With the OPA2211
series, power-supply voltages do not need to be
equal. For example, the positive supply could be set
to +25V with the negative supply at –5V or viceversa.
The common-mode voltage must be maintained
within the specified range. In addition, key
parameters are assured over the specified
temperature range, TJ = –55°C to +150°C.
Parameters that vary significantly with operating
voltage or temperature are shown in the Typical
Characteristics.
V+
Pre-Output Driver
IN-
OUT
IN+
V-
Figure 40. OPA2211 Simplified Schematic
14
Submit Documentation Feedback
Copyright © 2013, Texas Instruments Incorporated
Product Folder Links: OPA2211-HT
OPA2211-HT
www.ti.com
SBOS684A – AUGUST 2013 – REVISED AUGUST 2013
INPUT PROTECTION
-
OPA2211
Input
EO
1k
RS
OPA227
OPA2211
100
Resistor Noise
10
2
2
2
EO = en + (in RS) + 4kTRS
1
100
1k
10k
100k
1M
Source Resistance, RS (Ω)
Figure 42. Noise Performance of the OPA2211
and OPA227 in Unity-Gain Buffer Configuration
BASIC NOISE CALCULATIONS
RF
RI
10k
Votlage Noise Spectral Density, EO
The input terminals of the OPA2211 are protected
from excessive differential voltage with back-to-back
diodes, as shown in Figure 41. In most circuit
applications, the input protection circuitry has no
consequence. However, in low-gain or G = 1 circuits,
fast ramping input signals can forward bias these
diodes because the output of the amplifier cannot
respond rapidly enough to the input ramp. This effect
is illustrated in Figure 31 of the Typical
Characteristics. If the input signal is fast enough to
create this forward bias condition, the input signal
current must be limited to 10mA or less. If the input
signal current is not inherently limited, an input series
resistor can be used to limit the signal input current.
This input series resistor degrades the low-noise
performance of the OPA2211, and is discussed in the
Noise Performance section of this data sheet.
Figure 41 shows an example implementing a currentlimiting feedback resistor.
VOLTAGE NOISE SPECTRAL DENSITY
vs SOURCE RESISTANCE
Output
+
Figure 41. Pulsed Operation
NOISE PERFORMANCE
Figure 42 shows total circuit noise for varying source
impedances with the op amp in a unity-gain
configuration (no feedback resistor network, and
therefore no additional noise contributions). Two
different op amps are shown with total circuit noise
calculated. The OPA2211 has very low voltage noise,
making it ideal for low source impedances (less than
2kΩ). A similar precision op amp, the OPA227, has
somewhat higher voltage noise but lower current
noise. It provides excellent noise performance at
moderate source impedance (10kΩ to 100kΩ). Above
100kΩ, a FET-input op amp such as the OPA132
(very low current noise) may provide improved
performance. The equation in Figure 42 is shown for
the calculation of the total circuit noise. Note that en =
voltage noise, In = current noise, RS = source
impedance, k = Boltzmann’s constant = 1.38 × 10–23
J/K, and T is temperature in K.
Design of low-noise op amp circuits requires careful
consideration of a variety of possible noise
contributors: noise from the signal source, noise
generated in the op amp, and noise from the
feedback network resistors. The total noise of the
circuit is the root-sum-square combination of all noise
components.
The resistive portion of the source impedance
produces thermal noise proportional to the square
root of the resistance. This function is plotted in
Figure 42. The source impedance is usually fixed;
consequently, select the op amp and the feedback
resistors to minimize the respective contributions to
the total noise.
Figure 42 depicts total noise for varying source
impedances with the op amp in a unity-gain
configuration (no feedback resistor network, and
therefore no additional noise contributions). The
operational amplifier itself contributes both a voltage
noise component and a current noise component.
The voltage noise is commonly modeled as a timevarying component of the offset voltage. The current
noise is modeled as the time-varying component of
the input bias current and reacts with the source
resistance to create a voltage component of noise.
Therefore, the lowest noise op amp for a given
application depends on the source impedance. For
low source impedance, current noise is negligible and
voltage noise generally dominates. For high source
impedance, current noise may dominate.
Submit Documentation Feedback
Copyright © 2013, Texas Instruments Incorporated
Product Folder Links: OPA2211-HT
15
OPA2211-HT
SBOS684A – AUGUST 2013 – REVISED AUGUST 2013
www.ti.com
illustrates both inverting and noninverting op amp
circuit
configurations
with
gain.
In
circuit
configurations with gain, the feedback network
resistors also contribute noise. The current noise of
the op amp reacts with the feedback resistors to
create additional noise components. The feedback
resistor values can generally be chosen to make
these noise sources negligible. The equations for
total noise are shown for both configurations.
TOTAL HARMONIC DISTORTION
MEASUREMENTS
OPA2211 series op amps have excellent distortion
characteristics. THD + Noise is below 0.0001% (G =
+1, VO = 3VRMS) throughout the audio frequency
range, 20Hz to 20kHz, with a 600Ω load.
The distortion produced by OPA2211 series op amps
is below the measurement limit of many commercially
available distortion analyzers. However, a special test
circuit illustrated in can be used to extend the
measurement capabilities.
ELECTRICAL OVERSTRESS
Designers often ask questions about the capability of
an operational amplifier to withstand electrical
overstress. These questions tend to focus on the
device inputs, but may involve the supply voltage pins
or even the output pin. Each of these different pin
functions have electrical stress limits determined by
the voltage breakdown characteristics of the
particular semiconductor fabrication process and
specific circuits connected to the pin. Additionally,
internal electrostatic discharge (ESD) protection is
built into these circuits to protect them from
accidental ESD events both before and during
product assembly.
It is helpful to have a good understanding of this
basic ESD circuitry and its relevance to an electrical
overstress event. Figure 43 illustrates the ESD
circuits contained in the OPA2211 (indicated by the
dashed line area). The ESD protection circuitry
involves several current-steering diodes connected
from the input and output pins and routed back to the
internal power-supply lines, where they meet at an
absorption device internal to the operational amplifier.
This protection circuitry is intended to remain inactive
during normal circuit operation.
16
Op amp distortion can be considered an internal error
source that can be referred to the input. shows a
circuit that causes the op amp distortion to be 101
times greater than that normally produced by the op
amp. The addition of R3 to the otherwise standard
noninverting amplifier configuration alters the
feedback factor or noise gain of the circuit. The
closed-loop gain is unchanged, but the feedback
available for error correction is reduced by a factor of
101, thus extending the resolution by 101. Note that
the input signal and load applied to the op amp are
the same as with conventional feedback without R3.
The value of R3 should be kept small to minimize its
effect on the distortion measurements.
Validity of this technique can be verified by
duplicating measurements at high gain and/or high
frequency where the distortion is within the
measurement capability of the test equipment.
Measurements for this data sheet were made with an
Audio Precision System Two distortion/noise
analyzer, which greatly simplifies such repetitive
measurements. The measurement technique can,
however, be performed with manual distortion
measurement instruments.
An ESD event produces a short duration, highvoltage pulse that is transformed into a short
duration, high-current pulse as it discharges through
a semiconductor device. The ESD protection circuits
are designed to provide a current path around the
operational amplifier core to prevent it from being
damaged. The energy absorbed by the protection
circuitry is then dissipated as heat.
When an ESD voltage develops across two or more
of the amplifier device pins, current flows through one
or more of the steering diodes. Depending on the
path that the current takes, the absorption device
may activate. The absorption device has a trigger, or
threshold voltage, that is above the normal operating
voltage of the OPA2211 but below the device
breakdown voltage level. Once this threshold is
exceeded, the absorption device quickly activates
and clamps the voltage across the supply rails to a
safe level.
When the operational amplifier connects into a circuit
such as that illustrated in Figure 43, the ESD
protection components are intended to remain
inactive and not become involved in the application
circuit operation. However, circumstances may arise
where an applied voltage exceeds the operating
voltage range of a given pin. Should this condition
occur, there is a risk that some of the internal ESD
protection circuits may be biased on, and conduct
current. Any such current flow occurs through
steering diode paths and rarely involves the
absorption device.
Submit Documentation Feedback
Copyright © 2013, Texas Instruments Incorporated
Product Folder Links: OPA2211-HT
OPA2211-HT
www.ti.com
SBOS684A – AUGUST 2013 – REVISED AUGUST 2013
RF
+VS
+V
OPA2211
RI
ESD CurrentSteering Diodes
-In
+In
Op-Amp
Core
Edge-Triggered ESD
Absorption Circuit
ID
VIN
Out
RL
(1)
-V
-VS
(1) VIN = +VS + 500mV.
Figure 43. Equivalent Internal ESD Circuitry and Its Relation to a Typical Circuit Application
Figure 43 depicts a specific example where the input
voltage, VIN, exceeds the positive supply voltage
(+VS) by 500mV or more. Much of what happens in
the circuit depends on the supply characteristics. If
+VS can sink the current, one of the upper input
steering diodes conducts and directs current to +VS.
Excessively high current levels can flow with
increasingly higher VIN. As a result, the datasheet
specifications recommend that applications limit the
input current to 10mA.
If the supply is not capable of sinking the current, VIN
may begin sourcing current to the operational
amplifier, and then take over as the source of positive
supply voltage. The danger in this case is that the
voltage can rise to levels that exceed the operational
amplifier absolute maximum ratings. In extreme but
rare cases, the absorption device triggers on while
+VS and –VS are applied. If this event happens, a
direct current path is established between the +VS
and –VS supplies. The power dissipation of the
absorption device is quickly exceeded, and the
extreme internal heating destroys the operational
amplifier.
Another common question involves what happens to
the amplifier if an input signal is applied to the input
while the power supplies +VS and/or –VS are at 0V.
Again, it depends on the supply characteristic while at
0V, or at a level below the input signal amplitude. If
the supplies appear as high impedance, then the
operational amplifier supply current may be supplied
by the input source via the current steering diodes.
This state is not a normal bias condition; the amplifier
most likely will not operate normally. If the supplies
are low impedance, then the current through the
steering diodes can become quite high. The current
level depends on the ability of the input source to
deliver current, and any resistance in the input path.
Submit Documentation Feedback
Copyright © 2013, Texas Instruments Incorporated
Product Folder Links: OPA2211-HT
17
PACKAGE OPTION ADDENDUM
www.ti.com
28-Aug-2013
PACKAGING INFORMATION
Orderable Device
Status
(1)
OPA2211SPWP
ACTIVE
Package Type Package Pins Package
Drawing
Qty
HTSSOP
PWP
20
70
Eco Plan
Lead/Ball Finish
(2)
Green (RoHS
& no Sb/Br)
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
CU NIPDAU
Level-3-260C-168 HR
(4/5)
-55 to 150
OP2211S
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
Samples
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other
changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest
issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and
complete. All semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale
supplied at the time of order acknowledgment.
TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms
and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary
to support this warranty. Except where mandated by applicable law, testing of all parameters of each component is not necessarily
performed.
TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products and
applications using TI components. To minimize the risks associated with Buyers’ products and applications, Buyers should provide
adequate design and operating safeguards.
TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or
other intellectual property right relating to any combination, machine, or process in which TI components or services are used. Information
published by TI regarding third-party products or services does not constitute a license to use such products or services or a warranty or
endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the
third party, or a license from TI under the patents or other intellectual property of TI.
Reproduction of significant portions of TI information in TI data books or data sheets is permissible only if reproduction is without alteration
and is accompanied by all associated warranties, conditions, limitations, and notices. TI is not responsible or liable for such altered
documentation. Information of third parties may be subject to additional restrictions.
Resale of TI components or services with statements different from or beyond the parameters stated by TI for that component or service
voids all express and any implied warranties for the associated TI component or service and is an unfair and deceptive business practice.
TI is not responsible or liable for any such statements.
Buyer acknowledges and agrees that it is solely responsible for compliance with all legal, regulatory and safety-related requirements
concerning its products, and any use of TI components in its applications, notwithstanding any applications-related information or support
that may be provided by TI. Buyer represents and agrees that it has all the necessary expertise to create and implement safeguards which
anticipate dangerous consequences of failures, monitor failures and their consequences, lessen the likelihood of failures that might cause
harm and take appropriate remedial actions. Buyer will fully indemnify TI and its representatives against any damages arising out of the use
of any TI components in safety-critical applications.
In some cases, TI components may be promoted specifically to facilitate safety-related applications. With such components, TI’s goal is to
help enable customers to design and create their own end-product solutions that meet applicable functional safety standards and
requirements. Nonetheless, such components are subject to these terms.
No TI components are authorized for use in FDA Class III (or similar life-critical medical equipment) unless authorized officers of the parties
have executed a special agreement specifically governing such use.
Only those TI components which TI has specifically designated as military grade or “enhanced plastic” are designed and intended for use in
military/aerospace applications or environments. Buyer acknowledges and agrees that any military or aerospace use of TI components
which have not been so designated is solely at the Buyer's risk, and that Buyer is solely responsible for compliance with all legal and
regulatory requirements in connection with such use.
TI has specifically designated certain components as meeting ISO/TS16949 requirements, mainly for automotive use. In any case of use of
non-designated products, TI will not be responsible for any failure to meet ISO/TS16949.
Products
Applications
Audio
www.ti.com/audio
Automotive and Transportation
www.ti.com/automotive
Amplifiers
amplifier.ti.com
Communications and Telecom
www.ti.com/communications
Data Converters
dataconverter.ti.com
Computers and Peripherals
www.ti.com/computers
DLP® Products
www.dlp.com
Consumer Electronics
www.ti.com/consumer-apps
DSP
dsp.ti.com
Energy and Lighting
www.ti.com/energy
Clocks and Timers
www.ti.com/clocks
Industrial
www.ti.com/industrial
Interface
interface.ti.com
Medical
www.ti.com/medical
Logic
logic.ti.com
Security
www.ti.com/security
Power Mgmt
power.ti.com
Space, Avionics and Defense
www.ti.com/space-avionics-defense
Microcontrollers
microcontroller.ti.com
Video and Imaging
www.ti.com/video
RFID
www.ti-rfid.com
OMAP Applications Processors
www.ti.com/omap
TI E2E Community
e2e.ti.com
Wireless Connectivity
www.ti.com/wirelessconnectivity
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2013, Texas Instruments Incorporated