PANJIT PJ6676

PJ6676
25V N-Channel Enhancement Mode MOSFET
SOIC-08
FEATURES
• RDS(ON), VGS@10V,IDS@15A=8mΩ
• RDS(ON), [email protected],IDS@13A=12mΩ
• Advanced Trench Process Technology
• High Density Cell Design For Ultra Low On-Resistance
• Specially Designed for DC/DC Converters
• Fully Characterized Avalanche Voltage and Current
• Pb free product : 99% Sn above can meet RoHS environment
substance directive request
MECHANICALDATA
• Case: SOIC-08 Package
• Terminals : Solderable per MIL-STD-750D,Method 1036.3
• Marking : 6676
PIN Assignment
8
7
6
5
1
2
3
4
1. Source
2. Source
3. Source
4. Gate
5. Drain
6. Drain
7. Drain
8. Drain
Maximum RATINGS and Thermal Characteristics (TA=25OC unless otherwise noted )
PA RA M E TE R
S ym b o l
Li mi t
U ni t s
D r a i n- S o ur c e Vo l t a g e
V DS
25
V
G a t e - S o ur c e Vo l t a g e
V GS
+20
V
ID
15
A
ID M
50
A
PD
2 .5
1 .5
W
T J , T S TG
-5 5 to + 1 5 0
Avalanche Energy with Single Pulse
ID=40A, VDD=25V, L=0.5mH
E AS
400
Junction-to Ambient Thermal Resistance(PCB mounted)2
RθJA
50
C o nt i nuo us D r a i n C ur r e nt
P ul s e d D r a i n C ur r e nt
1)
M a xi m um P o w e r D i s s i p a t i o n
O p e r a t i n g J u n c t i o n a n d S t o r a g e Te m p e r a t u r e R a n g e
T A = 2 5 OC
T A = 7 5 OC
O
C
mJ
O
C /W
Note: 1. Maximum DC current limited by the package
2. Surface mounted on FR4 board, t < 10 sec
PAN JIT RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,FUNCTIONS AND RELIABILITY WITHOUT NOTICE
STAD-JUL.19.2006
PAGE . 1
PJ6676
ELECTRICALCHARACTERISTICS
P a ra me te r
S ym b o l
Te s t C o n d i t i o n
M i n.
Ty p .
M a x.
U ni t s
D r a i n- S o ur c e B r e a k d o w n Vo l t a g e
B V DSS
V G S = 0 V , ID = 2 5 0 u A
25
-
-
V
G a t e Thr e s ho l d Vo l t a g e
V G S ( t h)
V D S = V G S , ID = 2 5 0 u A
1
-
3
V
D r a i n- S o ur c e O n- S t a t e R e s i s t a nc e
R D S ( o n)
VGS=4.5V, ID=13A
-
9 .6
1 2 .0
D r a i n- S o ur c e O n- S t a t e R e s i s t a nc e
R D S ( o n)
VGS=10V, ID=15A
-
6.0
8.0
Ze r o G a t e Vo l t a g e D r a i n C ur r e nt
ID S S
VDS=25V, VGS=0V
-
-
1
uA
Gate Body Leakage
IG S S
V GS = + 2 0 V , V D S = 0 V
-
-
+100
nA
Forward Transconductance
g fS
V D S = 1 0 V , ID = 1 5 A
30
-
-
S
V D S = 1 5 V , ID = 1 5 A , V G S = 5 V
-
39
-
-
74
-
-
8 .3
-
S ta ti c
mΩ
D ynami c
To t a l G a t e C h a r g e
Qg
nC
V D S = 1 5 V , ID = 1 5 A
V GS = 1 0 V
G a t e - S o ur c e C ha r g e
Qgs
G a t e - D r a i n C ha r g e
Qgd
-
1 4 .2
-
Tu r n - O n D e l a y Ti m e
T d ( o n)
-
17.2
21
-
15
17
-
78
90
Tu r n - O n R i s e Ti m e
t rr
Tu r n - O f f D e l a y Ti m e
VDD=15V , RL=15Ω
ID=1A , VGEN=10V
RG=3.6Ω
t d (o ff)
ns
Tu r n - O f f F a l l Ti m e
tf
-
30
42
In p u t C a p a c i t a n c e
C iss
-
3750
-
O ut p ut C a p a c i t a nc e
C oss
-
650
-
R e v e r s e Tr a n s f e r C a p a c i t a n c e
C rss
-
500
-
V D S = 1 5 V , V GS = 0 V
f=1 .0 MHZ
pF
S o ur c e - D r a i n D i o d e
M a x. D i o d e F o r w a r d C ur r e nt
D i o d e F o rwa rd Vo lta g e
Is
-
-
-
2 .5
A
V SD
IS = 2 . 5 A , V G S = 0 V
-
0 .7 3
1 .2
V
V DD
Switching
Test Circuit
V IN
V DD
Gate Charge
Test Circuit
RL
V GS
RL
V OUT
RG
1mA
RG
STAD-JUL.19.2006
PAGE . 2
PJ6676
O
60
60
V GS= 4.5V, 5.0V, 6.0V, 10.0V
50
ID - Drain Source Current (A)
ID - Drain-to-Source Current (A)
Typical Characteristics Curves (TA=25 C,unless otherwise noted)
4.0V
40
3.5V
30
20
3.0V
10
2.5V
V DS=10V
50
40
30
T J=25 OC
20
T J=125 OC
10
T J=-55 OC
0
0
0
1
2
3
4
1.5
5
3
3.5
4
4.5
FIG.2- Transfer Characteristic
30
16
R DS(ON) - On-Resistance (m W )
R DS(ON) - On-Resistance (m W )
Fig. 1-TYPICAL
FORWARD
CHARACTERISTIC
FIG.1- Output
Characteristic
12
V GS=4.5V
8
V GS=10V
4
ID =15A
25
20
15
T J=125 OC
10
5
T J=25 OC
0
0
0
10
20
30
40
50
2
60
ID - Drain Current (A)
FIG.3- On Resistance vs Drain Current
4
6
8
VGS - Gate-to-Source Voltage (V)
5000
V GS=10V
I D=15A
1.5
1.3
1.1
0.9
10
FIG.4- On Resistance vs Gate to Source Voltage
C - Capacitance (pF)
RDS(ON) - On-Resistance (Normalized)
2.5
V GS - Gate-to-Source Voltage (V)
V DS - Drain-to-Source Voltage (V)
1.7
2
V GS=0V
f=1MH Z
4000
Ciss
3000
2000
Coss
1000
Crss
0
0.7
-50
-25
0
25
50
75
100
125
150
o
TJ - Junction Tem perature ( C)
FIG.5- On Resistance vs Junction Temperature
STAD-JUL.19.2006
0
5
10
15
20
25
V DS - Drain-to-Source Voltage (V)
FIG.6- Capacitance
PAGE . 3
VGS - Gate-to-Source Voltage (V)
PJ6676
Vgs
Qg
Qsw
Vgs(th)
10
V DS=15V
I D=15A
8
6
4
2
0
Qg(th)
0
Qgs
I D=250uA
1.2
1.1
1
0.9
0.8
0.7
40
50
60
70
80
32
I D=250uA
31
30
29
28
27
-25
0
25
50
75
100
125 150
TJ - Junction Tem perature (oC)
-50 -25
0
25
50
75 100 125 150
o
(
TJ - Junction Temperature C)
Fig.9 - Threshold Voltage vs Temperature
IS - Source Current (A)
30
Fig.8 - Gate Charge
BVDSS - Breakdown Voltage (V)
Vth - G-S Threshold Voltage (NORMALIZED)
1.3
100
20
Qg - Gate Charge (nC)
Fig.7 - Gate Charge Waveform
0.6
-50
10
Qg
Qgd
Fig.10 - Breakdown Voltage vs Junction Temperature
V GS=0V
10
T J=125 OC
1
0.1
T J=25 OC
T J=-55 OC
0.01
0.2
0.4
0.6
0.8
1
1.2
VSD - Source-to-Drain Voltage (V)
Fig.11 - Source-Drain Diode Forward Voltage
STAD-JUL.19.2006
PAGE . 4
PJ6676
MOUNTING PAD LAYOUT
ORDER INFORMATION
• Packing information
T/R - 3K per 13" plastic Reel
LEGALSTATEMENT
Copyright PanJit International, Inc 2006
The information presented in this document is believed to be accurate and reliable. The specifications and information herein
are subject to change without notice. Pan Jit makes no warranty, representation or guarantee regarding the suitability of its
products for any particular purpose. Pan Jit products are not authorized for use in life support devices or systems. Pan Jit
does not convey any license under its patent rights or rights of others.
STAD-JUL.19.2006
PAGE . 5