PL0301 300mA, Ultra-Low Noise, Ultra-Fast CMOS LDO Regulator FEATURES Guaranteed 300mA output High output initial voltage accuracy: ±1% Ultra low output noise: 138µVRMS Low ground current: 105µA Very low dropout: 160mV @300mA Zero shutdown supply current TTL-logic-controlled enable input Thermal and current limit protections Low ESR capacitor compatibility to achieve Ultra low droop load transient response Ultra fast line transient response Low profile 5-lead SOT25 and 3-lead SOT23 package Fixed options 1.5V, 1.8V, 2.5V, 2.8V, 3.0V and 3.3V APPLICATIONS Cellular and cordless phones Wireless LAN cards Palmtop computers Personal communication equipment Pen drives Bluetooth devices DESCRIPTION The PL0301 is a CMOS low dropout linear regulator with ultra-low-noise output, very low dropout voltage and very low ground current. The PL0301 operates from a 2.5V to 5.5V input voltage range and delivers up to 300mA, with low dropout of 160 mV at 300mA. The other features of PL0301 include short-circuit protection and thermalshutdown protection. The PL0301 is designed especially for batterypowered portable devices. Its low noise feature makes PL0301 ideal for noise-sensitive personal communication applications. Other key application areas for PL0301 also include palmtop computers, PCMCIA cards and WLAN cards. The PL0301 is available in small 5-lead SOT25 package and 3-lead SOT23 with fixed output voltage versions. TYPICAL APPLICATION CIRCUIT July 2007 www.picsemi.com © 2007 Power IC. All Rights Reserved. 1 PL0301 PIN CONFIGURATION PIN DESCRIPTION Name Pin NO. SOT-25 SOT-23 IN GND 1 2 EN 3 BYP 4 OUT 5 3 1 2 Type Function Supply Ground Supply voltage. 2.5V ~ 5.5V. Ground pin Enable/Shutdown. CMOS compatible input. Logic ‘H’ : enable, logic ‘L’ Logic input : shutdown. Reference voltage bypass pin. Connect 0.01uF ≦ CBYP ≦ 0.1uF to GND Bypass to reduce output noise. May be left open. Analog Regulator Output. output ORDERING INFORMATION Part Number Output Voltage PL0301 – 15VZ 1.5 PL0301 – 15UZ 1.5 PL0301 – 18VZ 1.8 PL0301 – 18UZ 1.8 PL0301 – 25VZ 2.5 PL0301 – 25UZ 2.5 PL0301 – 27VZ 2.7 PL0301 – 27UZ 2.7 PL0301 – 28VZ 2.8 PL0301 – 30VZ 3.0 PL0301 – 30UZ 3.0 PL0301 – 33VZ 3.3 PL0301 – 33UZ 3.3 Note 1: Contact the factory for other output voltages that July 2007 Marking DBAMW DBBMW DBCMW DBDMW DBEMW DBFMW DBGMW DBHMW DBIMW DBKMW DBLMW DBMMW DBNMW are not in the above table www.picsemi.com © 2007 Power IC. All Rights Reserved. Package SOT-23 SOT-25 SOT-23 SOT-25 SOT-23 SOT-25 SOT-23 SOT-25 SOT-23 SOT-23 SOT-25 SOT-23 SOT-25 2 PL0301 BLOCK DIAGRAM July 2007 www.picsemi.com © 2007 Power IC. All Rights Reserved. 3 PL0301 ABSOLUTE MAXIMUM RATINGS Symbol VIN VEN PBDB TSTG RθJA TJ,MAX TBLB ESD Parameter DC Supply Voltage at Pin 1 Enable Input Voltage at Pin 2 Continuous Power Dissipation Storage Temperature Range Thermal Resistance, Junction-To-Air Operating Junction Temperature Lead Temperature (Soldering, 5sec) ESD Capability, HBM model Value -0.3 to +6.0 -0.3 to +6.0 Internally limited -65 to +150 235 -40 to +125 260 2 Unit V V W ℃ ℃/W ℃ ℃ kV Value +2.5 to 5.5 0 to VIN -40 to +85 Unit V V ℃ RECOMMENDED OPERATING CONDITIONS Symbol VIN VEN TBAB July 2007 Parameter DC Supply Voltage at Pin 1 Enable Input Voltage at Pin 2 Operating Ambient Temperature www.picsemi.com © 2007 Power IC. All Rights Reserved. 4 PL0301 ELECTRICAL CHARACTERISTICS (VIN=VOUT(NOMINAL)+1V or 2.5V (whichever is greater), VEN=VIN, CIN=COUT=1µF, IO=1mA, TA=25°C, unless otherwise specified) Symbol Parameter VIN ΔVOUT ΔVLOAD Supply Voltage Output Voltage Accuracy Load Regulation Line Regulation dVOUT/( dVIN*VOUT(NOMINAL) )*100% Dropout Voltage (Note 1) ΔVline VDP IBOB ILIM IBQB IBGB PSRR PSRR Test Conditions IO = 1mA IO=1mA to 300mA VIN =VOUT(NOMINAL) +0.1V (or 2.5V, whichever is greater) to 5.5V, IO=1mA ILOAD = 300mA ILOAD = 100mA Maximum Output Current Continuous Current Limit/Output Current VIN-VOUT =1.3V Standby Current VEN = 0V Ground pin current Ripple Rejection, IOUT = 50mA, Output voltage noise VIH VIL Thermal Shutdown Temperature Thermal Shutdown Hysteresis Logic Input High Voltage (EN) Logic Input Low Voltage (EN\) Logic Input Current (SHDN\) Shutdown exit delay Shutdown discharge resistance July 2007 Typ. Max. Unit 0.4 5.5 1.0 0.5 V % % 0.015 0.05 %/V 160 56 220 100 mV mV mA RMS mA µA 2.5 -1.0 300 420 680 0.5 ILOAD =1mA f = 100Hz, Cout= 1µF, CBYP =10nF f = 10KHz, Cout= 1µF, CBYP =10nF COUT = 1µF, CBYP = 10nF, F = 10Hz to 100K Hz (Vp-p/2/√2) eNO IEN Min. 105 62 µA dB 60 dB 138 µVRMS 165 °C 20 °C V V 1.2 0.4 -1 VEN= 0 to 5.5V, CBYP=10nF COUT=1uF www.picsemi.com © 2007 Power IC. All Rights Reserved. 135 1 µA µs 400 Ω 5 PL0301 TYPICAL OPERATING CHARACTERSTICS (All specifications are at TA = 25°C , unless otherwise specified) July 2007 www.picsemi.com © 2007 Power IC. All Rights Reserved. 6 PL0301 TYPICAL OPERATING CHARACTERISTICS (continued) (All specifications are at TA = 25°C , unless otherwise specified) July 2007 www.picsemi.com © 2007 Power IC. All Rights Reserved. 7 PL0301 OPERATION The PL0301 are ultra-low-noise, low-dropout, lowquiescent current linear regulators designed for space-restricted applications. These devices can supply loads up to 300mA. As shown in the Block Diagram, the PL0301 consists of a highly accurate band gap core, noise bypass circuit, error amplifier, P-channel pass transistor and an internal feedback voltage divider. The 1.0V band gap reference is connected to the error amplifier’s inverting input. The error amplifier compares this reference with the feedback voltage and amplifies the difference. If the feedback voltage is lower than the reference voltage, the pass transistor gate is pulled low. This allows more current to pass to the output and increases the output voltage. If the feedback voltage is too high, the pass transistor gate is pulled high, allowing less current to pass to the output. The output voltage is feedback through an internal resistor voltage divider connected to the OUT pin. An external bypass capacitor connected to BYP reduces noise at the output. Additional blocks include a current limiter, over temperature protection, and shutdown logic. Internal P-Channel Pass Transistor The PL0301 feature a 1Ω (typ) P-channel MOSFET pass transistor. This provides several advantages over similar designs using a PNP pass transistor, including longer battery life. The P-channel MOSFET requires no base drive, which considerably reduces quiescent current. PNP-based regulators waste considerable current in dropout when the pass transistor saturates. They also use high base-drive current under heavy loads. The PL0301 does not suffer from these problems and consume only 90μA of quiescent current in light load and 220μA in dropout condition. Current Limit The PL0301 includes a current limiter. It monitors the output current and controls the pass transistor’s gate voltage to limit the output current under 676mA (typ). The output can be shorted to ground for an indefinite amount of time without damaging the part. July 2007 Enable Input The PL0301 features an active-high Enable input (EN) pin that allows on/off control of the regulator. The PL0301 bias current reduces to less than microampere of leakage current when it is shutdown. The Enable input is TTL/CMOS compatible threshold for simple logic interfacing. When EN is ‘H,’ the output voltage startup rising time is 135us typically at 300mA output current. Connect EN pin to IN pin for normal operation. Under Voltage Lockout When the input supply goes too low (below 2.0V) the PL0301 produces an internal UVLO (under voltage lockout) signal that generates a fault signal and shuts down the chip. This mechanism protects the chip from producing false logic due to low input supply. Quick Charging Mode The PL0301 has a quick charge block to get the reference up very quickly by charging the BYP capacitor with very high current when the chip comes out of shut down. This quick charge block stops charging the BYP capacitor when the reference reaches 95% of its nominal value and then the chip switches out of quick charging mode to normal operating mode. Over Temperature Protection Over temperature protection limits total power dissipation in the PL0301. When the junction temperature exceeds Tj= +165°C, the thermal sensor signals the shutdown logic and turns off the pass transistor. The thermal sensor turns the pass transistor on again after the IC’s junction temperature drops by 20°C, resulting in a pulsed output during continuous thermal-overload conditions. Thermal-Overload protection is design to protect the PL0301 in the event of a fault condition. For continual operation, do not exceed the absolute maximum junction temperature rating of Tj = +150°C. www.picsemi.com © 2007 Power IC. All Rights Reserved. 8 PL0301 APPLICATION INFORMATION Operating Region and Power Dissipation The PL0301 maximum power dissipation depends on 1) the thermal resistance of the case and circuit board, 2) the temperature difference between the die junction and ambient, and 3) the rate of airflow. The power dissipation across the device is: P = Iout ( Vin – Vout ) The maximum power dissipation is: Pmax = (Tj – Ta) / (θjc + θca) Where (Tj – Ta) is the temperature difference between the PL0301 die junction and the ambient air; θjc is the thermal resistance of the package; and θca is the thermal resistance through the PC board, copper traces, and other materials to the surrounding air. The GND pin of the PL0301 performs the dual function of providing an electrical connection to ground and channeling heat away. Connect the GND pin to ground using a large pad or ground plane. Noise Reduction For the PL0301, an external 0.01μF bypass capacitor between BYP and GND with innovative noise bypass scheme reduces output noises dramatically, exhibiting 138μVrms of output voltage noise with Cbyp = 0.01μF and Cout = 1μF. Capacitor Selection and Regulator Stability Use a 1μF capacitor on the PL0301 input and a 1μF capacitor on the output. Large input capacitor values and lower ESRs provide better noise rejection and line-transient response. Reduce output noise and improve load-transient response, stability, and power-supply rejection by using large output capacitors. Note that some ceramic dielectrics exhibit large capacitance and ESR variation with temperature. With dielectrics such as Z5U and Y5V, it may be necessary to use a 1μF or larger output capacitor to ensure stability at temperatures below -10°C. With X7R or X5R dielectrics, 1μF is sufficient at all operating temperatures. A graph of the region of stable Cout ESR vs. load current is shown in the Typical Characteristics. Use a 0.01μF bypass capacitor at BYP for lowoutput voltage noise. The leakage current going into the BYP pin should be less than 10nA. Noise, PSRR, and Transient Response The PL0301 are designed to deliver ultra-low noise and high PSRR, as well as low dropout and low quiescent currents in battery-powered systems. The PL0301 PSRR is 62dB at 100Hz and 60dB at 10kHz (see the Power-Supply Rejection Ratio vs. Frequency graph in the Typical Characteristic). When operating from sources other than batteries, improved supply-noise rejection and transient response can be achieved by increasing the values of the input and output bypass capacitors, and through passive filtering techniques. The Typical Characteristics show the PL0301 line and load transient responses. Dropout Voltage A regulator’s minimum dropout voltage determines the lowest usable supply voltage. In batterypowered systems, this determines the useful endof-life battery voltage. Because the PL0301 use a Pchannel MOSFET pass transistor, their dropout voltage is a function of drain-to-source on resistance (RDS (on)) multiplied by the load current (see the Typical Characteristics). July 2007 www.picsemi.com © 2007 Power IC. All Rights Reserved. 9 PL0301 PACKAGE INFORMATION 5-PIN SOT-252 OUTLINE DIMENSION D Detail A b 4 E E1 5 1 e c 3 e1 1 L2 R R θ A A2 1 L θ A1 θ L1 1 Detail A Dimension Symbol A A1 A2 b c D E E1 e e1 L L1 L2 R R1 July 2007 Millimeter Min. 0.90 0.30 0.08 0.30 Typ. 1.15 2.90 2.80 1.60 0.95 1.90 0.45 0.60 0.25 0.10 0.10 Max. 1.45 0.15 1.30 0.50 0.22 Inch Min. Typ. 0.036 0.011 0.003 0.60 0.020 0.25 0.004 0.004 0.045 0.114 0.110 0.063 0.037 0.075 0.018 0.024 0.010 Max. 0.057 0.006 0.051 0.020 0.009 0.024 0.010 θ˚ 0˚ 4˚ 8˚ 0˚ 4˚ 8˚ θ1˚ 5˚ 10˚ 15˚ 5˚ 10˚ 15˚ www.picsemi.com © 2007 Power IC. All Rights Reserved. 10 PL0301 D Detail A b E E1 3 1 c 2 e1 1 R θ A A2 1 L2 R L A1 θ e L1 θ 1 Detail A Symbol A A1 A2 b c D E E1 e e1 L L1 L2 R R1 July 2007 Millimeter Min. 0.90 0.30 0.08 0.30 Typ. 1.15 2.90 2.80 1.60 0.95 1.90 0.45 0.60 0.25 0.10 0.10 Max. 1.45 0.15 1.30 0.50 0.22 Inch Min. Typ. 0.036 0.011 0.003 0.60 0.020 0.25 0.004 0.004 0.045 0.114 0.110 0.063 0.037 0.075 0.018 0.024 0.010 Max. 0.057 0.006 0.051 0.020 0.009 0.024 0.010 θ˚ 0˚ 4˚ 8˚ 0˚ 4˚ 8˚ θ1˚ 5˚ 10˚ 15˚ 5˚ 10˚ 15˚ www.picsemi.com © 2007 Power IC. All Rights Reserved. 11 PL0301 DISCLAIMERS LIFE SUPPORT Power IC’s products are NOT designed to be used as components in devices intended to support or sustain human life. The use of Power IC’s products in components intended for surgical implants into the body or other applications, in which failure of Power IC’s products could create a situation where personal death or injury may occur, is NOT authorized without the express written approval of Power IC’s Chief Executive Officer. Power IC will NOT be held liable for any damages or claims resulting from the use of its products in medical applications. MILITARY Power IC’s products are NOT designed for use in military applications. The use of Power IC’s products in military applications is NOT authorized without the express written approval of Power IC’s Chief Executive Officer. Power IC will NOT be held liable for any damages or claims resulting from the use of its products in military applications. RIGHT TO MAKE CHANGES Power IC reserves the right to change this document and/or this product without notice. Customers are advised to consult their Power IC sales representative before ordering. July 2007 www.picsemi.com © 2007 Power IC. All Rights Reserved. 12