PLL130-68/-69 High Speed Translator Buffers: Single ended to PECL or LVDS FEATURES 3 NC 4 VDD NC 15 14 13 PLL130-6x 12 NC 11 Q 10 Q_bar 9 5 6 7 8 NC 2 NC REFIN 16 GND 1 Q NC NC • • • • • • Q_bar • (TOP VIEW) Differential PECL (PLL130-68) or LVDS (PLL130-69) output. Accepts any single-ended REFIN input (with as low as 100mV swing). Internal AC coupling of REFIN Input range from 1.0MHz to 1.0 GHz. No Vref required. No external current source required. 2.5 to 3.3V operation. Available in 3x3mm QFN. OECTRL • PIN CONFIGURATION OESEL DESCRIPTION OUTPUT ENABLE LOGICAL LEVELS The PLL130-68 and PLL130-69 are low cost, high performance, high speed, translator buffers that reproduce any input frequency from DC to 1.0GHz. They provide a pair of differential outputs (PECL for PLL130-68 or LVDS for PLL13069). Thanks to an internal AC coupling of the reference input (REFIN), any input signal with at least 100mV swing can be used as reference signal, regardless of its DC value. These chips are ideal for conversion from clipped sine wave, TTL, CMOS, or differential signal to LVDS or PECL. PLL130-68 OESEL 0 (Default) 1 OECTRL OUTPUT STATE 0 (Default) 1 0 1 (Default) Output enabled Tri-state Tri-state Output enabled OECTRL input: Logical states defined by PECL levels. PLL130-69 OESEL 0 (Default) 1 OECTRL OUTPUT STATE 0 1 (Default) 0 (Default) 1 Tri-state Output enabled Output enabled Tri-state OECTRL input: Logical states defined by CMOS levels. BLOCK DIAGRAM REFIN AC Coupling Input Amplifier Q_BAR Q 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/09/04 Page 1 PLL130-68/-69 High Speed Translator Buffers: Single ended to PECL or LVDS PIN DESCRIPTION Name Pin number Type NC 1, 3, 4, 6, 8, 12, 14 - REFIN 2 I OECTRL GND OESEL 5 7 9 I P I Q_BAR 10 O Q VDD 11 13 O P Q 15 O Q_BAR 16 O Description No connection. Reference input signal. The frequency of this signal will be reproduced at the output (after translation to PECL or LVDS level). Output enable input (See OE Logic Table on page 1). Ground connector. Output enable logic selector (See OE Logic Table on page 1). Complementary output. PECL_bar on PLL130-68, LVDS_bar on PLL130-69. True output. PECL on PLL130-68, LVDS on PLL130-69. 3.3V Power supply. Additional true output. PECL on PLL130-68, LVDS on PLL130-69. This output is the same as pin 11. Additional complementary output. PECL_bar on PLL130-68, LVDS_bar on PLL130-69. This output is the same as pin 10. ELECTRICAL SPECIFICATIONS 1. Absolute Maximum Ratings PARAMETERS SYMBOL Supply Voltage Input Voltage, dc Output Voltage, dc Storage Temperature Ambient Operating Temperature* Junction Temperature Lead Temperature (soldering, 10s) ESD Protection, Human Body Model V DD VI VO TS TA TJ MIN. -0.5 -0.5 -65 -40 MAX. UNITS 4.6 V DD +0.5 V DD +0.5 150 85 125 260 2 V V V °C °C °C °C kV Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent damage to the device and affect product reliability. These conditions represent a stress rating only, and functional operations of the device at these or any other conditions above the operational limits noted in this specification is not implied. * Note: Operating Temperature is guaranteed by design for all parts (COMMERCIAL and INDUSTRIAL), but tested for COMMERCIAL grade only. 2. General Electrical Specifications PARAMETERS SYMBOL Supply Current (both outputs loaded) I DD Operating Voltage V DD Output Clock Duty Cycle Short Circuit Current CONDITIONS Fout = 156.25MHz, PECL Fout = 156.25MHz, LVDS @ Vdd – 1.3V (PECL) @ 1.25V (LVDS) MIN. TYP. MAX. 45 22 2.97 48 25 51 28 3.63 UNITS mA V Same as input Same as input % ±50 mA 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 11/29/04 Page 2 PLL130-68/-69 High Speed Translator Buffers: Single ended to PECL or LVDS 3. AC Specifications PARAMETERS CONDITIONS Input Frequency Input signal swing Output Frequency MIN. TYP. 0 100 0 REFIN input MAX. UNITS 1000 MHz mV MHz 1000 4. PECL Electrical Characteristics PARAMETERS Output High Voltage Output Low Voltage SYMBOL CONDITIONS MIN. MAX. UNITS V OH V OL R L = 50 Ω to (V DD – 2V) (see figure) V DD – 1.025 V DD – 1.810 V DD – 0.880 V DD – 1.620 V V 5. PECL Switching Characteristics PARAMETERS SYMBOL Clock Rise Time Clock Fall Time CONDITIONS tr tf @20/80% - PECL @80/20% - PECL PECL Levels Test Circuit OUT TYP. MAX. UNITS 0.2 0.2 0.5 0.5 ns ns PECL Output Skew OUT VDD 50Ω MIN. 2.0V 50% 50Ω OUT tSKEW OUT PECL Transistion Time Waveform DUTY CYCLE 45 - 55% 55 - 45% OUT 80% 50% 20% OUT tR tF 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 11/29/04 Page 3 PLL130-68/-69 High Speed Translator Buffers: Single ended to PECL or LVDS 6. LVDS Electrical Characteristics PARAMETERS SYMBOL Output Differential Voltage V DD Magnitude Change Output High Voltage Output Low Voltage Offset Voltage Offset Magnitude Change V OD ∆V OD V OH V OL V OS ∆V OS Power-off Leakage I OXD Output Short Circuit Current I OSD CONDITIONS R L = 100 Ω (see figure) MIN. TYP. MAX. UNITS 247 -50 355 454 50 1.6 0.9 1.125 0 V out = V DD or GND V DD = 0V 1.4 1.1 1.2 3 1.375 25 mV mV V V V mV ±1 ±10 uA -5.7 -8 mA 7. LVDS Switching Characteristics PARAMETERS SYMBOL Differential Clock Rise Time CONDITIONS MIN. TYP. MAX. UNITS R L = 100 Ω 0.2 0.5 1.0 ns 0.2 0.5 1.0 ns tr Differential Clock Fall Time C L = 10 pF (see figure) tf LVDS Levels Test Circuit LVDS Switching Test Circuit OUT OUT CL = 10pF 50Ω VOD VDIFF VOS RL = 100Ω 50Ω CL = 10pF OUT OUT LVDS Transistion Time Waveform OUT 0V (Differential) OUT 80% VDIFF 80% 0V 20% 20% tR tF 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 11/29/04 Page 4 PLL130-68/-69 High Speed Translator Buffers: Single ended to PECL or LVDS PACKAGE INFORMATION Important note: pin 1 indicator (bottom side) is metallized and connected to GND through the leadframe. Traces in contact with the pin 1 indicator may result is short circuit to GND. ORDERING INFORMATION For part ordering, please contact our Sales Department: 47745 Fremont Blvd., Fremont, CA 94538, USA Tel: (510) 492-0990 Fax: (510) 492-0991 PART NUMBER The order number for this device is a combination of the following: Device number, Package type and Operating temperature range PLL130-6X PART NUMBER QC TEMPERATURE C=COMMERCIAL I=INDUSTRIAL PACKAGE TYPE Q=QFN Order Number Marking Package Option PLL130-68QC-R PLL130-68QC PLL130-69QC-R PLL130-69QC P130-68 P130-68 P130-69 P130-69 QFN QFN QFN QFN - Tape and Reel Tube Tape and Reel Tube PhaseLink Corporation, reserves the right to make changes in its products or specifications, or both at any time without notice. The information furnished by Phaselink is believed to be accurate and reliable. However, PhaseLink makes no guarantee or warranty concerning the accuracy of said information and shall not be responsible for any loss or damage of whatever nature resulting from the use of, or reliance upon this product. LIFE SUPPORT POLICY: PhaseLink’s products are not authorized for use as critical components in life support devices or systems without the express written approval of the President of PhaseLink Corporation. 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 11/29/04 Page 5