PO74G2309A 3.3V 1:9 CMOS Clock Buffered Driver 08/02/06 700MHz TTL/CMOS Potato Chip FEATURES: DESCRIPTION: . Patented technology . Operating frequency up to 700MHz with 2pf load . Operating frequency up to 550MHz with 5pf load . Operating frequency up to 350MHz with 15pf load . Operating frequency up to 100MHz with 50pf load . Very low output pin to pin skew < 100ps . Very low pulse skew < 200ps . VCC = 1.65V to 3.6V . Propagation delay < 1.9ns max with 15pf load . Low input capacitance: 3pf typical . 1:9 fanout . Available in 16pin 150mil wide SOIC package . Available in 16pin 173mil wide TSSOP package Potato Semiconductor’s PO74G2309A is designed for world top performance using submicron CMOS technology to achieve 700MHz output frequency with less than 100ps output pin to pin skew. Pin Configuration PO74G2309A is a 1.65V to 3.6V CMOS 1 input to 9 Output Buffered Driver to achieve 700MHz output frequency. Typical applications are clock and signal distribution. Inputs can be driven from either 3.3V or 5V devices. This feature allows the use of these devices as translators in a mixed 3.3V/5V system environment. Logic Block Diagram BUF_IN OUTPUT1 BUF_IN 1 16 OUTPUT9 OUTPUT2 OUTPUT1 2 15 OUTPUT2 VDD 14 OUTPUT8 OUTPUT7 OUTPUT3 3 4 13 VDD GND 5 12 GND OUTPUT3 6 11 OUTPUT6 OUTPUT6 OUTPUT4 V DD 7 10 OUTPUT5 OUTPUT7 8 9 GND OUTPUT8 OUTPUT4 OUTPUT5 OUTPUT9 Pin Description Pin Name Description BUF_IN Input OUTPUT 1 to OUTPUT 9 Outputs 1 Copyright © Potato Semiconductor Corporation PO74G2309A 3.3V 1:9 CMOS Clock Buffered Driver 08/01/06 700MHz TTL/CMOS Potato Chip Maximum Ratings Description Max Unit Storage Temperature -65 to 150 °C Operation Temperature -40 to 85 °C Operation Voltage -0.5 to +4.6 V Input Voltage -0.5 to +5.5 V Output Voltage -0.5 to Vcc+0.5 V Note: stresses greater than listed under Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability specification is not implied. DC Electrical Characteristics Symbol Description VOH Output High voltage VOL Test Conditions Min Typ Max Unit Vcc=3V Vin=VIH or VIL, IOH= -12mA 2.4 3 - V Output Low voltage Vcc=3V Vin=VIH or VIL, IOH=12mA - 0.3 0.5 V VIH Input High voltage Guaranteed Logic HIGH Level (Input Pin) 2 - 5.5 V VIL Input Low voltage Guaranteed Logic LOW Level (Input Pin) -0.5 - 0.8 V IIH Input High current Vcc = 3.6V and Vin = 5.5V - - 50 uA IIL Input Low current Vcc = 3.6V and Vin = 0V - - -50 uA VIK Clamp diode voltage Vcc = Min. And IIN = -18mA - -0.7 -1.2 V Notes: 1. 2. 3. 4. 5. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. Typical values are at Vcc = 3.3V, 25 °C ambient. This parameter is guaranteed but not tested. Not more than one output should be shorted at one time. Duration of the test should not exceed one second. VoH = Vcc – 0.6V at rated current 2 Copyright © 2005, Potato Semiconductor Corporation PO74G2309A 3.3V 1:9 CMOS Clock Buffered Driver 08/02/06 700MHz TTL/CMOS Potato Chip Power Supply Characteristics Symbol IccQ Description Quiescent Power Supply Current Test Conditions (1) Min Typ Max Unit Vcc=Max, Vin=Vcc or GND - 0.1 60 uA Notes: 1. 2. 3. 4. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. Typical values are at Vcc = 3.3V, 25°C ambient. This parameter is guaranteed but not tested. Not more than one output should be shorted at one time. Duration of the test should not exceed one second. Capacitance Parameters (1) Cin Cout Description Test Conditions Typ Max Unit Input Capacitance Vin = 0V 3 4 pF Output Capacitance Vout = 0V - 6 pF Notes: 1 This parameter is determined by device characterization but not production tested. Switching Characteristics Symbol Description Test Conditions (1) M ax Unit tPLH Propagation Delay Buf_in to Output1 to Output9 CL = 15pF 1.9 ns tPHL tr/tf Propagation Delay Buf_in to Output1 to Output9 CL = 15pF 1.9 ns Rise/Fall Time 0.8V – 2.0V 0.8 tsk(p) Pulse Skew (Same Package) CL = 15pF, 125MHz 200 ns ps tsk(o) Output Pin to Pin Skew (Same Package) CL = 15pF, 125MHz 100 ps Output Skew (Different Package) CL = 15pF, 125MHz 400 ps tsk(pp) fmax Input Frequency CL = 5 0 p F 100 MHz fmax Input Frequency CL =15pF 350 MHz fmax Input Frequency CL = 5pF 550 MHz fmax Input Frequency CL = 2pF 700 MHz Notes: 1. See test circuits and waveforms. 2. tpLH, tpHL, tsk(p), and tsk(o) are production tested. All other parameters guaranteed but not production tested. 3. Airflow of 1m/s is recommended for frequencies above 133MHz 3 Copyright © Potato Semiconductor Corporation PO74G2309A 3.3V 1:9 CMOS Clock Buffered Driver 700MHz TTL/CMOS Potato Chip 08/01/06 Test Waveforms Test Circuit 50Ω 4 Copyright © Potato Semiconductor Corporation PO74G2309A 3.3V 1:9 CMOS Clock Buffered Driver 08/09/06 700MHz TTL/CMOS Potato Chip Packaging Mechanical Drawing: 16 pin SOIC 16 .149 .157 .2284 .2440 3.78 3.99 1 .0075 .0098 .386 .393 9.80 10.00 .016 .050 5.80 6.20 0.41 1.27 0.19 0.25 .0155 0.393 .0260 0.660 .053 .068 .050 BSC 1.27 .013 .020 0.330 0.508 .0040 .0098 1.35 1.75 0.10 0.25 X.XX DENOTES DIMENSIONS X.XX IN MILLIMETERS Packaging Mechanical Drawing: 16 pin TSSOP X.XX DENOTES DIMENSIONS X.XX IN MILLIMETERS 5 Copyright © Potato Semiconductor Corporation PO74G2309A 3.3V 1:9 CMOS Clock Buffered Driver 08/14/06 700MHz TTL/CMOS Potato Chip Ordering Information Ordering Code Package Top-Marking TA PO74G2309ASU 16-pin SOIC Tube Pb-free & Green PO74G2309AS -40°C to 85°C PO74G2309ASR 16-pin SOIC Tape and reel Pb-free & Green PO74G2309AS -40°C to 85°C PO74G2309ATU 16-pin TSSOP Tube Pb-free & Green PO74G2309AT -40°C to 85°C PO74G2309ATR 16-pin TSSOP Tape and reel Pb-free & Green PO74G2309AT -40°C to 85°C 6 Copyright © Potato Semiconductor Corporation