POTATO PO74G244ASU

PO74G244A
OCTAL 3-STATE BUS BUFFERS
10/21/07
74 Series GHz Logic
FEATURES:
DESCRIPTION:
. Patented technology
. Operating frequency up to 1.125GHz with 2pf load
. Operating frequency up to 700MHz with 5pf load
. Operating frequency up to 300MHz with 15pf load
Potato Semiconductor’s PO74G244A is designed for
world top performance using submicron CMOS
technology to achieve 1.125GHz TTL /CMOS output
frequency with less than 1.5ns propagation delay.
This Octal bus buffer gate is designed for 1.65-V to
3.6-V VCC operation.
. Operating frequency up to 100MHz with 50pf load
. VCC Operates from 1.65V to 3.6V
. Propagation delay < 1.5ns max with 15pf load
. Low input capacitance: 4pf typical
. Available in 20pin TSSOP package
The PO74G244A features independent line driver swith
3-state outputs. Each output is disabled when the
associated output- enable(OE) input is high.
Pin Configuration
Logic Block Diagram
1OE
1A1
2Y4
1A2
2Y3
1A3
2Y2
1A4
2Y1
GND
1
20
2
19
3
18
4
17
5
16
6
15
7
14
8
13
9
10
12
11
VCC
2OE
1Y1
2A4
1Y2
2A3
1Y3
2A2
1Y4
2A1
Inputs can be driven from either 3.3V or 5V devices.
This feature allows the use of these devices as
translators in a mixed 3.3V/5V system environment.
1OE
1A1
1A2
1A3
1A4
2OE
2A1
Pin Description
INPUTS
OE
A
OUTPUT
Y
L
H
H
L
L
L
H
X
Z
2A2
2A3
2A4
1
2
18
4
16
6
14
8
12
1Y1
1Y2
1Y3
1Y4
19
11
9
13
7
15
5
17
3
2Y1
2Y2
2Y3
2Y4
1
Copyright © Potato Semiconductor Corporation
PO74G244A
OCTAL 3-STATE BUS BUFFERS
10/21/07
74 Series GHz Logic
Maximum Ratings
Description
Max
Unit
Storage Temperature
-65 to 150
°C
Operation Temperature
-40 to 85
°C
Operation Voltage
-0.5 to +4.6
V
Input Voltage
-0.5 to +5.5
V
Output Voltage
-0.5 to Vcc+0.5
V
Note:
stresses greater than listed under
Maximum
Ratings
may
cause
permanent damage to the device. This
is a stress rating only and functional
operation of the device at these or any
other conditions above those indicated
in the operational sections of this
specification is not implied. Exposure
to absolute maximum rating conditions
for extended periods may affect
reliability specification is not implied.
DC Electrical Characteristics
Symbol
Description
VOH
Output High voltage
VOL
Test Conditions
Min
Typ
Max
Unit
Vcc=3V Vin=VIH or VIL, IOH= -12mA
2.4
3
-
V
Output Low voltage
Vcc=3V Vin=VIH or VIL, IOH=12mA
-
0.3
0.5
V
VIH
Input High voltage
Guaranteed Logic HIGH Level (Input Pin)
2
-
5.5
V
VIL
Input Low voltage
Guaranteed Logic LOW Level (Input Pin)
-0.5
-
0.8
V
IIH
Input High current
Vcc = 3.6V and Vin = 5.5V
-
-
1
uA
IIL
Input Low current
Vcc = 3.6V and Vin = 0V
-
-
-1
uA
VIK
Clamp diode voltage
Vcc = Min. And IIN = -18mA
-
-0.7
-1.2
V
Notes:
1.
2.
3.
4.
5.
For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
Typical values are at Vcc = 3.3V, 25 °C ambient.
This parameter is guaranteed but not tested.
Not more than one output should be shorted at one time. Duration of the test should not exceed one second.
VoH = Vcc – 0.6V at rated current
2
Copyright © Potato Semiconductor Corporation
PO74G244A
OCTAL 3-STATE BUS BUFFERS
10/21/07
74 Series GHz Logic
Power Supply Characteristics
Symbol
Description
Test Conditions (1)
Min
Typ
Max
Unit
IccQ
Quiescent Power Supply Current
Vcc=Max, Vin=Vcc or GND
-
0.1
30
uA
∆Icc
Power Supply Current per Input High
Vcc=Max, Vin= Vcc-0.6V
-
50
300
uA
Notes:
1.
2.
3.
4.
5.
For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
Typical values are at Vcc = 3.3V, 25°C ambient.
This parameter is guaranteed but not tested.
Not more than one output should be shorted at one time. Duration of the test should not exceed one second.
VoH = Vcc – 0.6V at rated current
Capacitance
Parameters (1)
Cin
Cout
Description
Test Conditions
Typ
Unit
Input Capacitance
Vin = 0V
pF
Output Capacitance
Vout = 0V
4
6
Test Conditions (1)
M ax
Unit
pF
Notes:
1 This parameter is determined by device characterization but not production tested.
Switching Characteristics
Symbol
Description
tPLH
Propagation Delay A to Y
CL = 15pF
1.5
ns
tPHL
Propagation Delay A to Y
CL = 15pF
1.5
ns
tPZH or tPZL
Output Enable Time
CL = 15pF
2.5
ns
tPHZ or tPLZ
Output Disable Time
CL = 15pF
2.5
ns
tr/tf
Rise/Fall Time
0.8V – 2.0V
fmax
Input Frequency
CL = 50 pF
0.8
100
ns
MHz
fmax
Input Frequency
CL =15pF
300
MHz
fmax
fmax
Input Frequency
CL = 5pF
750
MHz
Input Frequency
CL = 2pF
1125
MHz
Notes:
1. See test circuits and waveforms.
2. tpLH, tpHL, tsk(p), and tsk(o) are production tested. All other parameters guaranteed but not production tested.
3. Airflow of 1m/s is recommended for frequencies above 133MHz
3
Copyright © 2005-2006, Potato Semiconductor Corporation
PO74G244A
OCTAL 3-STATE BUS BUFFERS
10/21/07
74 Series GHz Logic
Test Waveforms
Test Circuit
500 Ω
50Ω
50pF
to
2pF
50 Ω
500 Ω
4
Copyright © Potato Semiconductor Corporation
PO74G244A
OCTAL 3-STATE BUS BUFFERS
10/21/07
74 Series GHz Logic
Packaging Mechanical Drawing: 20 pin TSSOP
20
.169
.177
1
.252
.260
6.4
6.6
.0256
BSC
0.65
4.3
4.5
.047
1.20
Max
.007
.012
0.19
0.30
.018
.030
0.45
0.75
.238
.269
6.1
6.7
.004 0.09
.008 0.20
SEATING
PLANE
.002 0.05
.006 0.15
X.XX DENOTES DIMENSIONS
X.XX IN MILLIMETERS
5
Copyright © Potato Semiconductor Corporation
PO74G244A
OCTAL 3-STATE BUS BUFFERS
10/21/07
74 Series GHz Logic
Ordering Information
Ordering Code
Package
Top-Marking
TA
PO74G244ASU
20pin TSSOP
Tube
Pb-free & Green
PO74G244AS
-40°C to 85°C
PO74G244ASR
20pin TSSOP
Tape and reel
Pb-free & Green
PO74G244AS
-40°C to 85°C
IC Package Information
PACKAGE
CODE
T
PACKAGE
TYPE
TSSOP 20
TAPE
WIDTH
(mm)
16
TAPE
PITCH
(mm)
8
PIN 1 LOCATION
Top Left Corner
TAPE TRAILER
LENGTH
39 (12”)
QTY
PER REEL
TAPE LEADER
LENGTH
3000
64 (20”)
QTY
PER
TUBE
74
6
Copyright © Potato Semiconductor Corporation