POWER LP3205

Preliminary
Datasheet
LP3205
1.5MHZ,800mA,High Efficiency Synchronous
PWM Step-Down DC/DC Convert
General Description
Features
The LP3205 is a constant frequency, current mode,
PWM step-down converter. The device integrates a
main switch and a synchronous rectifier for high
efficiency. The 2.5V to 5.5V input voltage range makes
the LP3205 is ideally suited for portable electronic
devices that are powered from 1-cell Li-ion battery or
from other power sources within the range such as
cellular phones, PDAs and handy-terminals. Internal
synchronous rectifier with low RDS(ON) dramatically
reduces conduction loss at PWM mode. The internal
synchronous
switch
increases
efficiency
while
eliminate the need for an external Schottky diode.The
switching ripple is easily smoothed-out by small
package filtering elements due to a fixed operation
frequency of 1.5MHz. This along with small SOT-23-5
◆ High Efficiency: 93% ◆ 1.5MHz Fixed-Frequency PWM Operation
◆ Adjustable Output From 0.6V to VIN ◆ 1.2V, 1.5V, 1.8V, 2.5V, 3.0Vand 3.3V Fixed
◆ 800mA Output Current, 1.1A Peak Current
◆ No Schottky Diode Required
◆ 95% Duty Cycle Low Dropout Operation
◆ Available in SOT23-5/TSOT23-5 Package ◆ Short Circuit and Thermal Protection ◆ Low than 1µA Shutdown Current
Applications
Portable Media Players
Cellular and Smart mobile phone
PDA
DSC
Wireless Card
package provide small PCB area application. Other
features include soft start, lower internal reference
Pin Configurations
voltage with 2% accuracy, over temperature protection,
and over current protection。
Ordering Information
LP3205 -
□ □ □ □
□
F: Pb-Free
Package Type
B5: SOT23-5
J5: SOT23-5
Marking Information
Please see website.
Output Voltage Type
A: Adjustable type
12: 1.2V
15: 1.5V
18: 1.8V
25: 2.5V
33: 3.3V
LP3205 – Ver. 1.0 Datasheet
Feb.-2007
Page 1 of 10
Preliminary
Datasheet
LP3205
Typical Application Circuit
LP3205
LP3205
VREF(Typ.)=0.6V
MURATA LQH32CN2R2M33
TAIYO YUDEN JMK212BJ475MG
TAIYO YUDEN JAK316BJ106ML
LP3205 – Ver. 1.0 Datasheet
Feb.-2007
Page 2 of 10
Preliminary
Functional Pin Description
Pin Number
Datasheet
LP3205
Pin Name
Pin Function
1
VIN
Power Input
2
GND
Ground.
3
EN
Chip Enable(Active High).
4
FB/Vout
Feedback Input Pin,Reference voltage is 0.6 V
5
LX
Pin For Switching
Function Block Diagram
Absolute Maximum Ratings
■
■
■
■
■
■
■
■
■
■
Input Supply Voltage
EN,VFB Voltage
P-Channel Switch Source Current(DC)
N-Channel Switch Current(DC)
Peak SW Sink and Source Current
Operation Temperature Range
Junction Temperature
Storage Temperture
Lead Temp(Soldering,10sec)
ESD Rating(HBM)
LP3205 – Ver. 1.0 Datasheet
Feb.-2007
-0.3V to 6.5V
-0.3V to Vin
1100mA
1100mA
1.4A
0℃ to 85℃
125℃
-65℃ to 150℃
260℃
2KV
Page 3 of 10
Preliminary
Electrical Characteristics
Datasheet
LP3205
(VIN = 3.6V, VOUT = 2.5V, VREF = 0.6V, L = 4.7µH, CIN= 4.7µF, COUT= 10µF, TA= 25°C, IMAX = 800mA
unless otherwise specified)
Parameter
Symbol
Input Voltage Range
VIN
Operating Supply Current
Standby Mode Supply
Current
Shutdown Current
Test Conditions
Min
Typ
2.5
Max
Units
5.5
V
IOUT=0mA,VFB=0.5V or VOUT=90%
300
400
IOUT=0mA,VFB=0.62V or VOUT=103%
22
35
ISHDN
EN = GND,Vin=4.2V
0.1
1
Reference Voltage
VREF
For adjustable output voltage
0.6
Adjustable Output Range
VOUT
0.62
VIN −
0.2
ΔVOUT
ΔVOUT
Output
Voltage
Accuracy
Fixed
ΔVOUT
ΔVOUT
ΔVOUT
Adjustable
FB Input
Current
PMOSFET
RON
NMOSFET
RON
P-Channel
Current Limit
EN
Threshold
EN Leakage
Current
IFB
PRDS(ON)
NRDS(ON)
IP(LM)
ΔVOUT
ΔVOUT
0.58
VREF
VIN = 2.2 to 5.5V, VOUT = 1.2V 0A <
IOUT < 800mA
VIN = 2.2 to 5.5V, VOUT = 1.5V 0A <
IOUT < 800mA
VIN = 2.2 to 5.5V, VOUT = 1.8V 0A <
IOUT < 800mA
VIN = 2.8 to 5.5V, VOUT = 2.5V 0A <
IOUT < 800mA
VIN = 3.5 to 5.5V, VOUT = 3.3V 0A <
IOUT < 800mA
VIN = VOUT + 0.2V to 5.5V, VIN ≧
3.5V 0A < IOUT < 800mA
VIN = VOUT + 0.4V to 5.5V, VIN ≧
2.2V 0A < IOUT < 800mA
%
−3
+3
%
−3
+3
%
−3
+3
%
−3
+3
%
−3
+3
%
−3
+3
%
-30
30
nA
0.58
Ω
VIN = 3.6V
0.4
IOUT =
200mA
VIN = 3.6V
0.35
0.9
0.4
VENL
--
Feb.-2007
V
+3
VEN
LP3205 – Ver. 1.0 Datasheet
V
−3
VFB =
VIN
IOUT =
200mA
VIN =2.2
to 5.5V
uA
1
Ω
1.5
A
1.5
V
2
uA
Page 4 of 10
Preliminary
Datasheet
LP3205
Typical Operating Characteristics
LP3205 – Ver. 1.0 Datasheet
Feb.-2007
Page 5 of 10
Preliminary
LP3205 – Ver. 1.0 Datasheet
Feb.-2007
Datasheet
LP3205
Page 6 of 10
Preliminary Datasheet
Applications Information
The basic LP3205 application circuit is shown in Typical
Application Circuit. External component selection is
determined by the maximum load current and begins with
the selection of the inductor value and operating
frequency followed by CIN and COUT.
Inductor selection
The output inductor is selected to limit the ripple
current to some predetermined value. typically 20%~40%
of the full load current at the maximum input voltage.
Large value inductors lower ripple currents. Higher Vin or
VOUT also increases the ripple current as shown in
equation. A reasonable starting point for setting ripple
current is △IL=240mA(40% of 800mA).
The DC current rating of the inductor should be at least
equal to the maximum load current plus half the ripple
current to prevent core saturation. Thus, a 720mA rated
Inductor should be enough for most applications
(800mA+120mA). For better efficiency, choose a low
DC-resistance inductor.
LP3205
series resistance(ESR) that is required to minimize
voltage ripple and load step transients, an well as the
amount or bulk capacitance that is necessary to ensure
that the control loop is stable. Loop stability can be
checked by vie sing the load transient response as
described in later section. the output ripple,△VOUT, is
determined by:
Using ceramic input and output capacitors
Higher values, lower cost ceramic capacitors are now
becoming .Available in smaller case sizes ,their high
ripple current ,high voltage rating and low ESR make
them ideal for switching regulator applications. however
care must be taken when these capacitors are used at the
input and output. When a ceramic capacitor is use at
input and the power is supplied by a wall adapter through
long wires, a load step at the output can induce ringing at
the input ,VIN, At worst, a sudden inrush of current
through the long wires can potentially cause a voltage
spike at VIN large enough to damage the part.
Output voltage programming
CIN and COUT Selection
The input capacitance, CIN ,is needed to filter the
trapezoidal current at the source of the top MOSFET. To
prevent large ripple voltage, a low ESR input capacitor
Sized for the maximum RMS current should be used.
RMS current is given by:
The output voltage is set by a resistive divider according
to the
Following formula:
The external resistive divider is connected to the output,
allowing Remote voltage sensing as shown in figure3.
This formula has a maximum at VIN=2VOUT, where
IRMS=IOUT/2.this
simple
worst-case
condition
is
commonly.Used for design because even significant
deviations do not offer much relief. Note that ripple
current ratings from capacitor manufacturers are often
based on only 2000 hours of life which makes it advisable
to further derate the Capacitor, or choose a capacitor
rated at a higher temperature Than required. Several
capacitors may also be paralleled to meet size or height
requirements in the design.
The selection of COUT is determined by the effective
LP3205 – Ver. 1.0 Datasheet
Feb.-2007
Efficiency considerations
The efficiency of a switching regulator is equal to the output
Power divided by the input power times 100%.it is often useful
to analyze individual losses to determine what is limiting the
efficiency and which change would produce the most
improvement efficiency can be expressed as :
Page 7 of 10
Preliminary Datasheet
Efficiency= 100%- (L1+L2+L3…)
Where L1、L2, etc. are the individual losses as a percentage of
Input power .although all dissipative elements in the for most
of losses: VIN quiescent current and 12R loss dominates the
efficiency loss at medium to high load currents. In a typical
efficiency plot, the efficiency curve at very low load currents
can be misleading since the actual power lost is of no
consequence.
1.The VIN quiescent current is due to two components:
the DC Bias current as given in the electrical
characteristics and the Internal main switch and
synchronous switch gate charge currents. the gate
charge current results from switching the gate
capacitance of the internal power MOSFET
switches .Each time the gate charge current. results
from switching the gate capacitance of the internal
power MOSFET switches. Each time the gate is
switches from high to low to high again, a packet of
charge △Q moves from VIN to ground.
LP3205
2. 12Rlosses tae calculated from the resistances of the internal
switches, RSW and external inductor RL. in continuous mode
the average output current flowing through inductor L is
“chopped” between the main switch and the synchronous
switch. Thus, the series resistance looking into the LX pin is a
function of both top and bottom MOSFER RDS(ON) and the duty
cycle (DC) as follows:
The RDS(ON) for both the top and bottom MOSFETS can be
obtained from the typical performance characteristics curves.
thus, to obtain 12R losses, simply add RSW to RL and multiply
the square of the average output current.
Other losses including CIN and COUT ESR dissipative
losses and inductor core losses generally account for
less than 2% of the total loss.
The resulting △Q/△t is the current out of VIN that is typically
larger than the DC bias current. In continuous mode.
LGATCHG=f(QT+QB)
Where QT and QB are the gate charges of the internal top and
bottom switches. Both the DC bias and gate charge losses are
proportional to VIN and thus their effects will be more
pronounced at higher supply voltages.
LP3205 – Ver. 1.0 Datasheet
Feb.-2007
Page 8 of 10
Preliminary
Datasheet
LP3205
Checking Transient Response
The regulator loop response can be checked by looking at the load transient response. Switching
regulators take several cycles to respond to a step in load current. When a load step occurs, VOUT
immediately shifts by an amount equal to ∆ILOAD (ESR), where ESR is the effective series
resistance of COUT. ∆ILOAD also begins to charge or discharge COUT generating a feedback error
signal used by the regulator to return VOUT to its steady-state value. During this recovery time,
VOUT can be monitored for overshoot or ringing that would indicate a stability problem.
Layout Considerations
Follow the PCB layout guidelines for optimal performance of LP3205.
For the main current paths as indicated in bold lines, keep their traces short and wide.
Put the input capacitor as close as possible to the device pins (VIN and GND).
LX node is with high frequency voltage swing and should be kept small area. Keep analog
components away from LX node to prevent stray capacitive noise pick-up.
Connect feedback network behind the output capacitors. Keep the loop area small. Place the
feedback components near the LP3205.
Connect all analog grounds to a command node and then connect the command node to the
power ground behind the output capacitors.
LP3205 – Ver. 1.0 Datasheet
Feb.-2007
Page 9 of 10
Preliminary
Datasheet
LP3205
Packaging Information
SOT23-5
LP3205 – Ver. 1.0 Datasheet
Feb.-2007
Page 10 of 10