LP78086 Preliminary Datasheet 650mA High Efficiency Synchronous Buck with Dual Channel General Description Features The LP78086 are PMU, and contain a 650mA Buck DC/DC and dual channel 350mA Linear Regulator, Buck DC/DC is a constant frequency, current mode, PWM step-down converter. The device integrates a main switch and a synchronous rectifier for high efficiency. The 2.1V to 6.5V input voltage range makes the LP78086 is ideally suited for portable electronic devices that are powered from 1-cell Li-ion battery or from other power sources within the range such as cellular phones, PDAs and handy-terminals. Internal synchronous rectifier with low RDS(ON) dramatically reduces conduction loss at PWM mode. The internal synchronous switch increases efficiency while eliminate the need for an external Schottky diode.The switching ripple is easily smoothed-out by small package filtering elements due to a fixed operation frequency of 1.5MHz. This along with small TDFN-10 package provide small PCB area application. Other features include soft start, lower internal reference voltage with 2% accuracy, over temperature protection, and over current protection。 Ordering Information LP78086 - □ □ □ F: Pb-Free Package Type QV: TDFN-10 Applications Portable Media Players/MP3 players Cellular and Smart mobile phone PDA DSC Wireless Card LP78086 –00 Ver. 1.0 Datasheet LDO Feb.-2008 650mA Buck High Efficiency: 93% 1.5MHz Fixed-Frequency PWM Operation Adjustable Output From 0.6V to VIN Dual Channel 350mA LDO 100% Duty Cycle Low Dropout Operation Available in TDFN-10 Package Low than 1µA Shutdown Current Pin Configurations PIN NO 1 2 3 4 5 6 7 8 9 10 Function VDD SW GND OUT2 FB2 VINL OUT3 FB3 EN FB1 Marking Information Please see website. Page 1 of 9 LP78086 Preliminary Datasheet Typical Application Circuit VIN OUT1-1.8V + Cout1 + Cout1 1uF 10uF 4.7uH 2 9 EN 6 VIN VINL 1 + CIN 10uF OUT2 SW R3 450K LP78086 R2 200K FB2 10 OUT2-3.3V 4 5 R4 100K FB1 R1 100K 3 11 GND + Cout2 10uF OUT3 OUT3-2.5V 7 R5 316K PGND FB3 + Cout3 10uF 8 R5 100K Figure 1. LP78086 High Efficiency Step-Down Converter Functional Pin Description Pin Number 1 Pin Name Pin Function VDD Chip Power Input. 2 SW Pin For Switching. 3 GND Ground. 4 OUT2 Output2,LDO output. 5 FB2 Feedback2(OUT2) Input Pin, Reference voltage is 1.21V. 6 VINL LDO2,LDO3 Power Input. 7 OUT3 Output3,LDO output LDO Chip Enable(Active High). 8 FB3 Feedback3(OUT3) Input Pin, Reference voltage is 1.21V. 9 EN Chip Enable(Active High). 10 FB1 Feedback1(OUT1) Input Pin, Reference voltage is 0.6V. 11 PGND Power Ground. LP78086 –00 Ver. 1.0 Datasheet Feb.-2008 Page 2 of 9 Preliminary Datasheet LP78086 Function Block Diagram Absolute Maximum Ratings ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Input Supply Voltage LDO Current P-Channel Switch Source Current(DC) N-Channel Switch Current(DC) Peak SW Sink and Source Current Operation Temperature Range Junction Temperature Storage Temperature Lead Temp(Soldering,10sec) ESD Rating(HBM) LP78086 –00 Ver. 1.0 Datasheet Feb.-2008 -0.3V to 6V 400mA 800mA 800mA 1100mA --40℃ to 85℃ 125℃ --65℃ to 150℃ 260℃ 2KV Page 3 of 9 LP78086 Preliminary Datasheet Electrical Characteristics (VIN = 3.6V, VOUT1 = 2.5V, VREF = 0.6V, L = 2.2µH, CIN= 4.7µF, COUT= 10µF, TA= 25°C, IMAX = 600mA unless otherwise specified) Parameter Symbol Input Voltage Range VIN Test Conditions Min Typ Max Units 5.5 350 35 1 V 270 25 0.1 uA 2.5 Quiescent Current IQ Shutdown Current ISHDN IOUT = 0mA, VFB =0.5V IOUT = 0mA, VFB =0.7V EN = GND VFB1 For DC/DC adjustable output voltage 0.588 0.60 0.612 V VFB2 For LDO2 adjustable output voltage 1.18 1.21 1.24 V VFB3 For LDO3 adjustable output voltage 1.18 1.21 1.24 VIN − 0.2 V −3 +3 % −3 +3 % −3 +3 % −3 +3 % −3 +3 % −3 +3 % −3 +3 % 350 400 mA 0.53 Ω Reference Voltage Adjustable Output Range VOUT ΔVOUT ΔVOUT Output Voltage Accuracy Fixed ΔVOUT ΔVOUT ΔVOUT Adjustable LDO Output current PMOSFET RON NMOSFET RON P-Channel Current Limit EN Threshold EN Leakage Current LP78086 –00 ΔVOUT ΔVOUT VREF VIN = 2.2 to 5.5V, VOUT = 1.2V 0A < IOUT < 650mA VIN = 2.2 to 5.5V, VOUT = 1.5V 0A < IOUT < 650mA VIN = 2.2 to 5.5V, VOUT = 1.8V 0A < IOUT < 650mA VIN = 2.8 to 5.5V, VOUT = 2.5V 0A < IOUT < 650mA VIN = 3.5 to 5.5V, VOUT = 3.3V 0A < IOUT < 650mA VIN = VOUT + 0.2V to 5.5V, VIN ≧ 3.5V 0A < IOUT < 650mA VIN = VOUT + 0.4V to 5.5V, VIN ≧ 2.2V 0A < IOUT < 650mA ILDO PRDS(ON) NRDS(ON) IP(LM) 300 IOUT = 200mA VIN = 3.6V 0.45 IOUT = 200mA VIN = 3.6V 0.45 VIN =2.2 to 5.5V uA V Ω 600 800 1000 mA VEN 0.8 1.2 1.5 V VENL -- 2 Ver. 1.0 Datasheet Feb.-2008 uA Page 4 of 9 Preliminary Datasheet LP78086 Typical Operating Characteristics LP78086 –00 Ver. 1.0 Datasheet Feb.-2008 Page 5 of 9 Preliminary Datasheet series resistance(ESR) Applications Information The basic LP78086 applicaton circuit is shown inTypical Application Circuit. External component selection is determined by the maximum load current and begins with the selection of the inductor value and operating frequency followed by CIN and COUT. Inductor selection The output inductor is selected to limit the ripple current to some predetermined value. typically 20%~40% of the full load current at the maximum input voltage. Large value inductors lower ripple currents. Higher Vin or VOUT also increases the ripple current as shown in equation. A reasonable starting point for setting ripple current is △IL=180mA(40% of 650mA). The DC current rating of the inductor should be at least equal to the maximum load current plus half the ripple current to prevent core saturation. Thus, a 720Ma rated Inductor should be enough for most applications (650mA+120mA). For better efficiency, choose a low DC-resistance inductor. CIN and COUT Selection LP78086 that is required to minimize voltage ripple and load step transients, an well as the amount or bulk capacitance that is necessary to ensure that the control loop is stable. Loop stability can be checked by viesing the load transient response as described in later section.the output ripple, △ VOUT, is determined by: Using ceramic input and output capacitors Higher values, lower cost ceramic capacitors are now becoming .Available in smaller case sizes ,their high ripple current ,high voltage rating and low ESR make them ideal for switching regulator applications. however care must be taken when these capacitors are used at the input and output. When a ceramic capacitor is use at input and the power is supplied by a wall adapter through long wires, a load step at the output can induce ringing at the input ,VIN, At worst,a sudden inrush of current through the long wires can potentially cause a voltage spike at VIN large enough to damage the part. Output voltage programming The output voltage is set by a resistive divider according to the Following formula: The input capacitance, CIN ,is needed to filter the trapezoidal current at the source of the top MOSFET. To prevent large ripple voltage, a low ESR input capacitor Sized for the maximum RMS current should be used. RMS current is given by: Vout=VFB X (1+R2/R1) The external resistive divider is connected to the output, allowing Remote voltage sensing as shown in figure3. This formula has a maximum at VIN=2VOUT, where IRMS=IOUT/2.this simple worst-case condition is commonly.Used for design because even significant deviations do not offer much relief. Note that ripple current ratings from capacitor manufacturers are often based on only 2000 hours of life which makes it advisable to further derate the Capacitor, or choose a capacitor rated at a higher temperature Than required. Several capacitors may also be paralleled to meet size or height requirements in the design. Efficiency considerations The selection of COUT is determined by the effective LP78086 –00 Ver. 1.0 Datasheet Feb.-2008 The efficiency of a switching regulator is equal to the output Power divided by the input power times 100%.it is often useful to analyze individual losses to determine what is limiting the Page 6 of 9 Preliminary Datasheet efficiency and which change would produce the most improvement efficiency can be expressed as : Efficiency= 100%- (L1+L2+L3…) Where L1、L2, etc. are the individual losses as a percentage of Input power .although all dissipative elements in the for most of losses: VIN quiescent current and 12R loss dominates the efficiency loss at medium to high load currents. In a typical efficiency plot, the efficiency curve at very low load currents can be misleading since the actual power lost is of no consequence. 1.The VIN quiescent current is due to two components: the DC Bias current as given in the electrical characteristics and the Internal main switch and synchronous switch gate charge currents. the gate charge current results from switching the gate capacitance of the internal power MOSFET switches .Each time the gate charge current.results from switching the gate capacitance of the internal power MOSFET switches. Each time the gate is switches from high to low to high again, a packet of charge △Q moves from VIN to ground. LP78086 2. 12Rlosses tae calculated from the resistances of the internal switches, RSW and external inductor RL. in continuous mode the average output current flowing through inductor L is “chopped” between the main switch and the synchronous switch. Thus, the series resistance looking into the LX pin is a function of both top and bottom MOSFER RDS(ON) and the duty cycle (DC) as follows: RSW=RDS(ON)TOP×DC+RDS(ON)BOT×(1-DC) The RDS(ON) for both the top and bottom MOSFETS can be obtained from the typical performance characteristics curves. thus, to obtain 12R losses, simply add RSW to RL and multiply the square of the average output current. Other losses including CIN and COUT ESR dissipative losses and inductor core losses generally account for less than 2% of the total loss. The resulting △Q/△t is the current out of VIN that is typically larger than the DC bias current. In continuous mode. LGATCHG=f(QT+QB) Where QT and QB are the gate charges of the internal top and bottom switches. Both the DC bias and gate charge losses are proportional to VIN and thus their effects will be more pronounced at higher supply voltages. LP78086 –00 Ver. 1.0 Datasheet Feb.-2008 Page 7 of 9 Preliminary Datasheet LP78086 Checking Transient Response The regulator loop response can be checked by looking at the load transient response. Switching regulators take several cycles to respond to a step in load current. When a load step occurs, VOUT immediately shifts by an amount equal to ∆ILOAD (ESR), where ESR is the effective series resistance of COUT. ∆ILOAD also begins to charge or discharge COUT generating a feedback error signal used by the regulator to return VOUT to its steady-state value. During this recovery time, VOUT can be monitored for overshoot or ringing that would indicate a stability problem. Layout Considerations Follow the PCB layout guidelines for optimal performance of LP78086. For the main current paths as indicated in bold lines, keep their traces short and wide. Put the input capacitor as close as possible to the device pins (VIN and GND). LX node is with high frequency voltage swing and should be kept small area. Keep analog components away from LX node to prevent stray capacitive noise pick-up. Connect feedback network behind the output capacitors. Keep the loop area small. Place the feedback components near the LP78086. Connect all analog grounds to a command node and then connect the command node to the power ground behind the output capacitors. LP78086 –00 Ver. 1.0 Datasheet Feb.-2008 Page 8 of 9 Preliminary Datasheet LP78086 Packaging Information LP78086 –00 Ver. 1.0 Datasheet Feb.-2008 Page 9 of 9