PCS2P2309NZ May 2008 rev 0.4 3.3V 1:9 Clock Buffer Features Functional Description • One-Input to Nine-Output Buffer/Driver PCS2P2309NZ is a low-cost high-speed buffer designed to • Buffers all frequencies from DC to 133.33MHz accept one clock input and distribute up to nine clocks in Low power consumption for mobile applications mobile PC systems and desktop PC systems. The device Less than 32mA at 66.6MHz with unloaded operates at 3.3V and outputs can run up to 133.33MHz. • outputs • Input-Output delay: 6nS(max) PCS2P2309NZ is designed for low EMI and power • Output-output skew less than 250pS optimization and consumes less than 32mA at 66.6MHz, • 16 pin SOIC Package making it ideal for the low-power requirements of mobile • Supply Voltage:3.3V±0.3V systems. It is available in an 16 pin SOIC Package over • Commercial and Industrial temperature range Commercial and Industrial temperature range. Block Diagram BUF_IN OUTPUT1 OUTPUT2 OUTPUT3 OUTPUT4 OUTPUT5 OUTPUT6 OUTPUT7 OUTPUT8 OUTPUT9 PulseCore Semiconductor 1715,S.Bascom Avenue,Suite200,Campbell,CA 95008• Tel: 408-879-9077 • Fax: 408-8879-9018 • www.pulsecoresemi.com Notice: The information in this document is subject to change without notice. PCS2P2309NZ May 2008 rev 0.4 Pin Configuration BUF_IN 1 16 OUTPUT9 OUTPUT1 2 15 OUTPUT8 OUTPUT2 3 14 OUTPUT7 VDD 4 13 VDD GND 5 12 GND OUTPUT3 6 11 OUTPUT6 OUTPUT4 7 10 OUTPUT5 VDD 8 9 PCS2P2309NZ GND Pin Description Pin# Pin Name 4, 8, 13 VDD 5, 9, 12 GND 1 2, 3, 6, 7, 10, 11, 14, 15, 16 Description 3.3V Digital Voltage Supply Ground BUF_IN Input Clock OUTPUT [1:9] Outputs Absolute Maximum Ratings Parameter Min Max Unit Supply Voltage to Ground Potential -0.5 +4.6 V DC Input Voltage (Except REF) -0.5 VDD + 0.5 V DC Input Voltage (REF) -0.5 7 V Storage Temperature -65 +150 °C Max. Soldering Temperature (10 sec) 260 °C Junction Temperature 150 °C 2000 V Static Discharge Voltage (As per JEDEC STD22- A114-B) Note: These are stress ratings only and functional usage is not implied. Exposure to absolute maximum ratings for prolonged periods can affect device reliability. 3.3V 1:9 Clock Buffer Notice: The information in this document is subject to change without notice. 2 of 8 PCS2P2309NZ May 2008 rev 0.4 Operating Conditions Parameter VDD TA CL CIN BUF_IN, OUTPUT [1:9] tPU Description Min Max Unit 3.0 3.6 V 0 70 °C -40 85 °C Load Capacitance, Fout < 100MHz 30 pF Load Capacitance,100MHz < Fout < 133.33MHz 15 pF Input Capacitance 7 pF Supply Voltage Commercial Temp. Industrial Temp. Operating Frequency DC 133.33 MHz Power-up time for all VDD's to reach minimum specified voltage (power ramps must be monotonic) 0.05 50 mS Min Max Unit 0.8 V Electrical Characteristics for Commercial and Industrial Temperature Devices Symbol Parameter VIL Input LOW Voltage1 VIH 1 Input HIGH Voltage IIL Input LOW Current IIH Input HIGH Current VOL VOH IDD Test Conditions 2.2 VIN = 0V 50.0 µA VIN= VDD 100.0 µA 2 IOL= 12 mA 0.4 V 2 IOH = -12 mA Output LOW Voltage Output HIGH Voltage Supply Current V Commercial temp. Industrial temp. 2.4 V 30 Unloaded outputs at 66.66MHz 32 mA Switching Characteristics for Commercial and Industrial Temperature Devices3 Symbol Parameter Test Conditions Min Typ Max Unit t3 2 Rise Time Measured between 0.8V and 2.0V 1.5 2 nS t4 Fall Time2 1.5 2 nS tD Duty Cycle2= t2 ÷t1 Measured between 2.0V and 0.8V Measured at 1.4V (For an Input Clock Duty Cycle 50%) 50 55 % t5 Output to Output Skew2 All outputs equally loaded ±250 pS t6 Propagation Delay, BUF_IN Rising Edge to 2 OUTPUT Rising Edge Measured at VDD/2 6 nS 45 4 Note: 1. BUF_IN input has a threshold voltage of VDD/2. 2. Parameter is guaranteed by design and characterization. It is not 100% tested in production. 3. All parameters specified with loaded outputs. 3.3V 1:9 Clock Buffer Notice: The information in this document is subject to change without notice. 3 of 8 PCS2P2309NZ May 2008 rev 0.4 Switching Waveforms Duty Cycle Timing t1 t2 1.4V 1.4V 1.4V OUTPUT All Outputs Rise/Fall Time 2V 2V VDD 0.8V 0.8V OUTPUT 0V t3 t4 Output-Output Skew 1.4V OUTPUT 1.4V OUTPUT t5 Input-Output Propagation Delay VDD/2 INPUT VDD/2 OUTPUT 3.3V 1:9 Clock Buffer Notice: The information in this document is subject to change without notice. 4 of 8 PCS2P2309NZ May 2008 rev 0.4 Test Circuit VDD BUF-IN +3.3V 3 0.1uF PCS2P2309NZ GND 3 OUTPUT CL 3.3V 1:9 Clock Buffer Notice: The information in this document is subject to change without notice. 5 of 8 PCS2P2309NZ May 2008 rev 0.4 Package Information 16-lead (150 Mil) Molded SOIC PIN 1 ID 1 8 H E 9 16 D h Seating Plane A2 D A e C θ 0.004 L A1 B Dimensions Symbol Inches Millimeters Min Max Min Max A 0.053 0.069 1.35 1.75 A1 0.004 0.010 0.10 0.25 A2 0.049 0.059 1.25 1.50 B 0.013 0.022 0.33 0.53 C 0.008 0.012 0.19 0.27 D 0.386 0.394 9.80 10.01 E 0.150 0.157 3.80 4.00 e 0.050 BSC 1.27 BSC H 0.228 0.244 5.80 6.20 h 0.010 0.016 0.25 0.41 L 0.016 0.035 0.40 0.89 θ 0° 8° 0° 8° 3.3V 1:9 Clock Buffer Notice: The information in this document is subject to change without notice. 6 of 8 PCS2P2309NZ May 2008 rev 0.4 Ordering Code Part Number Marking Package Type Temperature PCS2P2309NZF-16-ST 2P2309NZF 16-pin 150-mil SOIC, Pb Free Commercial PCS2P2309NZF-16-SR 2P2309NZF 16-pin 150-mil SOIC, Tape and Reel, Pb Free Commercial PCS2I2309NZF-16-ST 2I2309NZF 16-pin 150-mil SOIC, Pb Free Industrial PCS2I2309NZF-16-SR 2I2309NZF 16-pin 150-mil SOIC, Tape and Reel, Pb Free Industrial PCS2P2309NZG-16-ST 2P2309NZG 16-pin 150-mil SOIC, Green Commercial PCS2P2309NZG-16-SR 2P2309NZG 16-pin 150-mil SOIC, Tape and Reel, Green Commercial PCS2I2309NZG-16-ST 2I2309NZG 16-pin 150-mil SOIC, Green Industrial PCS2I2309NZG-16-SR 2I2309NZG 16-pin 150-mil SOIC ,Tape and Reel, Green Industrial Device Ordering Information P C S 2 P 2 3 0 9 N Z G - 1 6 - S R R = Tape & Reel, T = Tube or Tray O = SOT S = SOIC T = TSSOP A = SSOP V = TVSOP B = BGA Q = QFN U = MSOP E = TQFP L = LQFP U = MSOP P = PDIP D = QSOP X = SC-70 DEVICE PIN COUNT F = LEAD FREE AND RoHS COMPLIANT PART G = GREEN PACKAGE, LEAD FREE, and RoHS PART NUMBER X= Automotive I= Industrial P or n/c = Commercial (-40C to +125C) (-40C to +85C) (0C to +70C) 1 = Clock Generator 2 = Non PLL based 3 = EMI Reduction 4 = DDR support products 5 = STD Zero Delay Buffer 6 = Power Management 7 = Power Management 8 = Power Management 9 = Hi Performance 0 = Reserved PulseCore Semiconductor Mixed Signal Product Licensed under US patent #5,488,627, #6,646,463 and #5,631,920. 3.3V 1:9 Clock Buffer Notice: The information in this document is subject to change without notice. 7 of 8 PCS2P2309NZ May 2008 rev 0.4 Copyright © PulseCore Semiconductor All Rights Reserved Part Number: PCS2P2309NZ Document Version: 0.4 PulseCore Semiconductor Corporation 1715 S. Bascom Ave Suite 200 Campbell, CA 95008 Tel: 408-879-9077 Fax: 408-879-9018 www.pulsecoresemi.com Note: This product utilizes US Patent # 6,646,463 Impedance Emulator Patent issued to PulseCore Semiconductor, dated 11-11-2003 Many PulseCore Semiconductor products are protected by issued patents or by applications for patent © Copyright 2006 PulseCore Semiconductor Corporation. All rights reserved. Our logo and name are trademarks or registered trademarks of PulseCore Semiconductor. All other brand and product names may be the trademarks of their respective companies. PulseCore reserves the right to make changes to this document and its products at any time without notice. PulseCore assumes no responsibility for any errors that may appear in this document. The data contained herein represents PulseCore’s best data and/or estimates at the time of issuance. PulseCore reserves the right to change or correct this data at any time, without notice. If the product described herein is under development, significant changes to these specifications are possible. The information in this product data sheet is intended to be general descriptive information for potential customers and users, and is not intended to operate as, or provide, any guarantee or warrantee to any user or customer. PulseCore does not assume any responsibility or liability arising out of the application or use of any product described herein, and disclaims any express or implied warranties related to the sale and/or use of PulseCore products including liability or warranties related to fitness for a particular purpose, merchantability, or infringement of any intellectual property rights, except as express agreed to in PulseCore’s Terms and Conditions of Sale (which are available from PulseCore). All sales of PulseCore products are made exclusively according to PulseCore’s Terms and Conditions of Sale. The purchase of products from PulseCore does not convey a license under any patent rights, copyrights; mask works rights, trademarks, or any other intellectual property rights of PulseCore or third parties. PulseCore does not authorize its products for use as critical components in life-supporting systems where a malfunction or failure may reasonably be expected to result in significant injury to the user, and the inclusion of PulseCore products in such life-supporting systems implies that the manufacturer assumes all risk of such use and agrees to indemnify PulseCore against all claims arising from such use. 3.3V 1:9 Clock Buffer Notice: The information in this document is subject to change without notice. 8 of 8