PURDY AND711AST-30

AND711AST-30/-EO
240 x 64 Dots
Intelligent Graphic Display
The AND711AST-30/-EO is a full dot matrix LCD module
including an LCD controller and display RAM. This device
can display graphic patterns and symbols and is suitable for
a message display for various instruments such as business
machine terminals.
Features
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• RoHS Compliant
Super twist
40 character x 8 line capability
Excellent readability and high contrast ratio
8-bit parallel bus for read/write data by CPU interface
Built-in LCD controller and display RAM (8k byte)
Character mode, graphic mode, and character and graphic
combination mode
RoHS compliant
Wide operating temperatures range (0°C to + 50°C)
Compact and easily mounted on any equipment
User-selectable font–6 x 8 or 8 x 8
Available with EL backlighting attached (-EO option)
Absolute Maximum Ratings
Symbol
Rating
VDD
5.5
VEE
-19
EL Drive Voltage
(fEL = 1 kHz)
VEL
130
Vrms
Input Voltage
VIN
–.3 ≤ VIN ≤ +.3
V
Operating Temperature
Top
0 to +50
°C
Storage Temperature
Tstg
-20 to +70
˚C
EL Driving Freq. (EO)
fEL
1
kHz
Item
Supply Voltage
Unit
V
Dot Matrix Dimensions
Electrical Characteristics (TA = 25°C)
Item
Symbol
Min.
Typ.
Max.
VDD
4.5
5.0
5.5
VEE
–5.75
–8.5
–11.5
High Level In Voltage
(VDD = 5.0V)
VIN
2.8
–
5
Low Level In Voltage
(VDD = 5.0V)
VIL
–
–
0.8
High Level Output Volt.
(VDD = 5.0V)
VOH
VDD
–0.3
–
–
V
Low Level Output Volt.
(VDD = 5.0V)
VOL
–
–
0.3
V
IDD
–
16.0
25.0
IEE
–
2.4
3.0
IEL
–
4.0
10
Supply Voltage
Mechanical Characteristics
Item
Outline
Dimensions
Specification
Unit
180 (W) x 65 (H) x 10 (D)
mm
Number of Dots
240 (W) x 64 (H)
# of Characters
40 x 8 (320) Characters
6 x 8 dot format, alpha-numeric
Power Consumption(1)
Viewing Area
132 (W) x 39 (H)
mm
Bezel Opening
132 (W) x 39 (H)
mm
Dot Size
0.49 (W) x 0.49 (H)
mm
Dot Pitch
0.53 (W) x 0.53 (H)
mm
I20/150 (ST/EO)
gram
Weight (approx.)
1
Unit
V
V
mA
(2)
1. All dots on. (V DD = .5V, V EE = –8.5V, V EL=110, fEL = 500 Hz or at Typ.)
2. mA rms
Product specifications contained herein may be changed
without prior notice. It is therefore advisable to contact
Purdy Electronics before proceeding with the design of
equipment incorporating this product.
Purdy Electronics Corporation • 720 Palomar Avenue • Sunnyvale, CA 94085
Tel: 408.523.8200 • Fax: 408.733.1287 • [email protected] • www.purdyelectronics.com
7/20/07
AND711AST-30/-EO
Intelligent Graphics Display
Optical Characteristics (TA = 25˚C, φ = 0°, θ = 0)
Power Supply
Symbol
Min.
Typ.
Max.
Right to Left
–
80
–
Up & Down
–
55
–
Contrast
K
2.5
4.8
-
-
Turn On
Ton
-
200
350
ms
Turn Off
Toff
-
250
300
ms
Item
Viewing Angle
Unit
degree
The LCD panel is driven by the voltage VDD –VEE, so an
adjustable VEE is required for contrast control and
temperature compensation.
Temperature Variations
Temperature
V DD –V EE
0°C
13.9
+25°C
12.5
+50°C
10.8
Note: Refer to Applications Section for definitions of viewing
angle, contrast ratio, response time (on and off) and
luminance.
Connector Pin Assignment
Pin No.
Signal
Function
1
FGND
Frame Ground (connected to metal bezel)
2
GND
Ground (signal)
Example of Variable Negative Voltage Supply
V DD
GND
LCD Module
R1
TR
3
VDD
Power Supply for logic (5V)
4
VEE
Power Supply for LCD Drive (–8.5 ±3V)
5
WR
Data Write
6
RD
Data Read
7
CE
Chip Enable
Timing Relationships and Diagram
Signal Timing Relationships
8
C/D
WR = “L”, C/D = “H”: Command Write
WR = “L”, C/D = “L”: Data Write
RD = “L”, C/D = “H”: Status Read
RD = “L”, C/D = “L”: Data Read
9
NC
No connection
10
RESET
11
D0
Data Input/Output
Pulse Width
12
D1
Data Input/Output
13
D2
14
R2
V EE
R1 = 10k, R2 = 10k, TR 2SA1102 or equivalent
Symbol
Min.
Max.
C/D Set Up Time
tCDS
100
–
C/D Hold Time
tCDH
10
–
tCE, tRD, tWR
80
–
Data Set Up Time
tDS
80
–
Data Input/Output
Data Hold Time
tDH
40
–
D3
Data Input/Output
Access Time
tACC
–
150
15
D4
Data Input/Output
Output Hold Time
tOH
10
50
16
D5
Data Input/Output
17
D6
Data Input/Output
18
D7
Data Input/Output
19
FS
Font select. Open or connect to VDD : 6 x 8 dot
Connect to ground: 8 x 8 dot
20
NC
No connection
Controller Reset (Active Pullup Required)
Item
CE , RD, WR
Unit
ns
Timing Diagram
C/D
tCDH
tCDS
CE
tCP,tRD,tWP
RD, WR
tDS
D0-D7
(WRITE)
tDH
D0-D7
(READ)
tACC
7/20/07
Purdy Electronics Corporation • 720 Palomar Avenue • Sunnyvale, CA 94085
Tel: 408.523.8200 • Fax: 408.733.1287 • [email protected] • www.purdyelectronics.com
tOH
2
AND711AST-30/-EO
Intelligent Graphics Display
Block Diagram
Because signal lines are directly connected
to C-MOS and are not pull-up or pull-down
internally, except RESET which is pull-up to
VDD, you must guard all signals from
external noise.
8
D0-D7
D0-D7
WR
AD0-AD12
13
RD
CE
C/D
I/O0-I/O7
R/W
T6963C
RESET
CE
A0-A12
RAM
(8K byte)
ED
HSCP
FR
LP
CDATA
Control Lines
64
Y-Driver
VEL
VEL
X-Driver
X-Driver
X-Driver
80
80
80
LCD Panel
240 x 64 Dots
EL Backlight
Dimensional Outline
3
Purdy Electronics Corporation • 720 Palomar Avenue • Sunnyvale, CA 94085
Tel: 408.523.8200 • Fax: 408.733.1287 • [email protected] • www.purdyelectronics.com
7/20/07