RT9263 Preliminary High Efficiency, Low Supply Current, Step-Up DC/DC Converter General Description Features The RT9263 is a compact, high efficient, step-up DC/DC converter with an adaptive current mode PWM control loop, providing a stable and high efficient operation over a wide range of load currents. It operates in both continuous and discontinuous current modes in stable waveforms without external compensation. z The low start-up input voltage below 1V makes RT9263 suitable for 1 to 4 battery cell applications providing up to 400mA output current. The 550kHz high switching rate minimized the size of external components. Besides, the 17μA low quiescent current together with high efficiency maintains long battery lifetime. z z z z z z z Applications z Ordering Information 1.0V Low Start-up Input Voltage High Supply Capability to Deliver 3.3V 100mA with 1V Input Voltage 17μ μA Quiescent (Switch-off) Supply Current 90% Efficiency 550kHz Fixed Switching Rate Providing Flexibility for Using Internal and External Power Switches SOT-89-5 Package RoHS Compliant and 100% Lead (Pb)-Free z z PDA Portable Instrument DSC RT9263 Package Type X5 : SOT-89-5 Operating Temperature Range P : Pb Free with Commercial Standard G : Green (Halogen Free with Commercial Standard) C : Chip enable control E : Driver for external power devices Note : Pin Configurations (TOP VIEW) EN 1 VDD 2 FB 3 RichTek Pb-free and Green products are : `RoHS compliant and compatible with the current require- 5 GND 4 LX RT9263CCX5 SOT-89-5 ments of IPC/JEDEC J-STD-020. `Suitable for use in SnPb or Pb-free soldering processes. `100%matte tin (Sn) plating. Marking Information For marking information, contact our sales representative directly or through a RichTek distributor located in your area, otherwise visit our website for detail. EXT 1 VDD 2 FB 3 5 GND 4 LX RT9263ECX5 SOT-89-5 DS9263-09 March 2007 www.richtek.com 1 RT9263 Preliminary Typical Application Circuit C3 100uF VIN C4 100pF VDD EN R1 1.6M L1 4.7uF RT9263CCX5 EXT D1 3.3V VOUT LX FB + GND 1N5819 R2 C2 980K 1uF C1 100uF Figure 1. RT9263CCX5 Typical Application for Portable Instruments below 400mA VIN C4 100pF VDD L1 4.7uF 1N5819 R1 1.6M LX RT9263ECX5 3.3V VOUT1 Q1 D1 N MOS EXT FB + GND C3 100uF R2 980K C2 1uF C1 100uF Figure 2. 0.4A to 1A Output Current Application 5V VIN L1 C4 100uF D1 10uF VDD RT9263ECX5 EXT LX C3 0.1uF FB 15V VOUT1 R1 2.2M + GND Q1 N MOS Rm 0.05 ~ 0.1 C2 R2 200K 1uF C1 100uF Figure 3. High Voltage Application (Rm should be added when IL > 100mA) www.richtek.com 2 DS9263-09 March 2007 RT9263 Preliminary 5V VIN L1 D1 10uF C4 100uF Q1 N MOS 15V VOUT1 VDD RT9263ECX5 EN FB R1 2.2M + Chip Enable C3 0.1uF LX GND C2 R2 200K 1uF C1 100uF Figure 4. High Voltage Application with Shutdown Control Function Block Diagram RT9263CCX5 LX VDD - FB EN 1.25V + Loop Control Circuit Q1 N MOS R1 GND RT9263ECX5 VDD EXT LX - FB 1.25V + Loop Control Circuit Q1 N MOS R1 GND DS9263-09 March 2007 www.richtek.com 3 RT9263 Preliminary Functional Pin Description Pin No. Pin Name Pin Function RT9263CCX5 RT9263ECX5 Output Pin for Driving External NMOS or NPN -- 1 EXT 1 -- EN Chip Enable Pin (Active High) 2 2 VDD Input Positive Power Pin of RT9263 3 3 FB 4 4 LX Pin for Switching 5 5 GND Ground www.richtek.com 4 When driving an NPN, a resistor should be added for limiting base Feedback Input Pin Internal reference voltage for the error amplifier is 1.25V. DS9263-09 March 2007 RT9263 Preliminary Absolute Maximum Ratings z z z z z z z z z Supply Voltage ----------------------------------------------------------------------------------------------------- −0.3V to 7V LX Pin Switch Voltage -------------------------------------------------------------------------------------------- −0.3V to (VDD + 0.8V) Other I/O Pin Voltages ------------------------------------------------------------------------------------------- −0.3V to (VDD + 0.3V) LX Pin Switch Current -------------------------------------------------------------------------------------------- 2.5A EXT Pin Driver Current -------------------------------------------------------------------------------------------- 30mA Power Dissipation, PD @ TA = 25°C SOT89-5 ------------------------------------------------------------------------------------------------------------- 0.5W Package Thermal Resistance SOT89-5, θJA ---------------------------------------------------------------------------------------------------------------------------------------------------- 300°C/W Operating Junction Temperature ------------------------------------------------------------------------------- 150°C Storage Temperature Range ------------------------------------------------------------------------------------ −65°C to +150°C Electrical Characteristics (VIN = 1.5V, VDD set to 3.3V, Load Current = 0, TA = 25°C, unless otherwise specified) Parameter Start-UP Voltage Symbol VST Test Conditions IL = 1mA Min Typ Max Units -- 0.98 1.05 V * V Operating VDD Range VDD Start-up to IDD1 > 250μA 0.8 -- 6.5 No Load Current I (VIN) INO LOAD VIN = 1.5V, VOUT = 3.3V -- 47 -- μA Switch-off Current I (VDD) ISWITCH OFF VIN = 6V -- 17 -- μA Shutdown Current I (VIN) IOFF EN Pin = 0V, VIN = 4.5V -- 0.1 1 μA Feedback Reference Voltage VREF Close Loop, VDD = 3.3V 1.225 1.25 1.275 V Switching Rate FS VDD = 3.3V -- 550 -- kHz Maximum Duty DMAX VDD = 3.3V -- 92 -- % VDD = 3.3V -- 0.25 -- Ω VDD = 3.3V -- 2 -- A EXT ON Resistance to VDD VDD = 3.3V -- 40 -- Ω EXT ON Resistance to GND VDD = 3.3V -- 30 -- Ω LX ON Resistance Current Limit Setting ILIM Line Regulation ΔVLINE VIN = 1.5 ~ 2.5V, IL = 1mA -- 10 -- mV/V Load Regulation ΔVLOAD VIN = 2.5V, IL = 1 ~ 100mA -- 0.25 -- mV/mA 0.2 0.8 1.4 V Guaranteed by Design -- 50 -- ppm/°C EN Pin Trip Level VDD = 3.3V Temperature Stability for FB, LFB, LBI TS Thermal Shutdown TSD Guaranteed by Design -- 165 -- °C Thermal Shutdown Hysterises ΔTSD Guaranteed by Design -- 10 -- °C * Note: The EN pin shall be tied to VDD pin and inhibit to act the ON/OFF state whenever the VDD pin voltage may reach to 5.5V or above. DS9263-09 March 2007 www.richtek.com 5 RT9263 Preliminary Typical Operating Characteristics Efficiency for 3.3V Output Efficiency for 5.0V Output 100 100 TA = 25°C 90 80 80 70 Efficiency (%) Efficiency (%) TA = 25°C 90 VIN = 3.0V 2.5V 2.0V 1.5V 1.2V 1.0V 60 50 40 30 0.1 1 10 VIN = 4.0V 3.0V 2.0V 1.5V 1.2V 1.0V 60 50 40 30 Refer to Application Circuit Figure 1 20 0.01 70 100 Refer to Application Circuit Figure 1 20 0.01 0.1 1 10 1000 100 1000 I LOAD (mA) I LOAD (mA) No Load Current No Load Current 140 90 TA = 25°C VOUT = 3.3V 80 TA = 25°C VOUT = 5.0V 120 70 100 I DD (uA) I DD (uA) 60 50 40 80 60 30 40 20 20 10 Refer to Application Circuit Figure 1 Refer to Application Circuit Figure 1 0 0 1 1.2 1.5 2 2.5 1 3 1.2 1.5 2 2.5 3 4 Input Voltage (V) Input Voltage (V) Start Up Voltage Start Up Voltage 1.25 1.4 TA = 25°C VOUT = 3.3V 1.3 TA = 25°C VOUT = 5.0V 1.20 Input Voltage (V) Input Voltage (V) 1.15 1.2 1.1 1.0 1.10 1.05 1.00 0.95 0.90 0.9 0.85 Refer to Application Circuit Figure 1 Refer to Application Circuit Figure 1 0.80 0.8 0 20 40 60 I LOAD (mA) www.richtek.com 6 80 100 0 25 50 75 100 I LOAD (mA) DS9263-09 March 2007 RT9263 Preliminary Application Information Output Voltage Setting Referring to application circuits Figure 1 to Figure 4 the output voltage of the switching regulator (VOUT1) can be set with Equation (1). R1 (1) VOUT1 = (1+ ) × 1.25V R2 PRECAUTION 1: Improper probing to FB pin will cause fluctuation at VOUT1. It may damage RT9263 and system chips because VOUT1 may drastically rise to an over-rated level due to unexpected interference or parasitics being added to FB pin. Feedback Loop Design PRECAUTION 2: Disconnecting R1 or short circuit across R2 may also cause similar IC damage as described in precaution 1. Referring to application circuits Figure 1 to Figure 4. The selection of R1 and R2 based on the trade-off between quiescent current consumption and interference immunity is stated below: z Follow Equation (1) z Higher R reduces the quiescent current (Path current = 1.25V/R2), however resistors beyond 5MW are not recommended. z Lower R gives better noise immunity, and is less sensitive to interference, layout parasitics, FB node leakage, and improper probing to FB pins. z A proper value of feed forward capacitor parallel with R1 on Figure 1 to Figure 4 can improve the noise immunity of the feedback loops, especially in an improper layout. An empirical suggestion is around 100pF ~ 1nF for feedback resistors of MΩ, and 10nF ~ 0.1μF for feedback resistors of tens to hundreds KΩ. For applications without standby or suspend modes, lower values of R1, and R2 are preferred. For applications concerning the current consumption in standby or suspend modes, the higher values of R1, and R2 are needed. Such “ high impedance feedback loops” are sensitive to any interference, which require careful layout and avoid any interference, e.g. probing to FB pins. PRECAUTION 3: When large R values were used in feedback loops, any leakage in FB node may also cause VOUT1 voltage fluctuation, and IC damage. To be especially highlight here is when the air moisture frozen and re-melt on the circuit board may cause several mA leakage between IC or component pins. So, when large R values are used in feedback loops, post coating, or some other moisture-preventing processes are recommended. VOUT1 Prober Parasitics FB Pin _ Q + R2 Layout Guide z z z DS9263-09 March 2007 R1 A full GND plane without gap break. VOUT1 to GND noise bypass − Short and wide connection for C2 to Pin2 and Pin5. VIN to GND noise bypass − Add a 100μF capacitor close to L1 inductor, when VIN is not an idea voltage source. z Minimized FB node copper area and keep far away from noise sources. z Minimized parasitic capacitance connecting to LX and EXT nodes, which may cause additional switching loss. www.richtek.com 7 RT9263 Preliminary Outline Dimension D D1 b1 A C B C1 e e H A b Symbol b1 b Dimensions In Millimeters Dimensions In Inches Min Max Min Max A 1.400 1.600 0.055 0.063 b 0.360 0.508 0.014 0.020 B 2.400 2.600 0.094 0.102 b1 0.406 0.533 0.016 0.021 C 3.937 4.250 0.155 0.167 C1 0.800 1.194 0.031 0.047 D 4.400 4.600 0.173 0.181 D1 1.397 1.700 0.055 0.067 e 1.400 1.600 0.055 0.063 H 0.356 0.430 0.014 0.017 5-Lead SOT-89 Surface Mount Package Richtek Technology Corporation Richtek Technology Corporation Headquarter Taipei Office (Marketing) 5F, No. 20, Taiyuen Street, Chupei City 8F, No. 137, Lane 235, Paochiao Road, Hsintien City Hsinchu, Taiwan, R.O.C. Taipei County, Taiwan, R.O.C. Tel: (8863)5526789 Fax: (8863)5526611 Tel: (8862)89191466 Fax: (8862)89191465 Email: [email protected] www.richtek.com 8 DS9263-09 March 2007