SONY CXG1144AEN

CXG1144AEN
High Power DPDT Switch with Logic Control
Description
The CXG1144AEN is a high power DPDT switch
MMIC. This IC can be used in wireless communication
systems, for example, CDMA handsets with GPS.
The CXG1144AEN can be operated by one CMOS
control line. The Sony's J-FET process is used for low
insertion loss and on-chip logic circuit.
10 pin VSON (Plastic)
Features
• Low insertion loss: 0.30dB @900MHz,
0.45dB @1900MHz
• High linearity: IIP3 (Typ.) = 65dBm
• 1 CMOS compatible control line
• Small package size: 10-pin VSON
Applications
• Dual-band cellular handsets
• CDMA with GPS, dual-band CDMA
Structure
GaAs J-FET MMIC
Absolute Maximum Ratings (Ta = 25°C)
• Bias voltage
VDD
7
• Control voltage
• Operating temperature
• Storage temperature
Vctl
Topr
Tstg
5
–35 to +85
–65 to +150
V
V
°C
°C
GaAs MMICs are ESD sensitive devices. Special handling precautions are required.
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
–1–
E04Z04
CXG1144AEN
Block Diagram and Terminal Arrangement Figure
GND (recommended)
RF3
6
5
RF2
4
GND
3
GND
2
RF1
1
CTL
F2
GND
7
F3
GND
8
RF4
9
F1
F4
VDD 10
VDD
Logic
GND (recommended)
Truth Table
CTL
ON state
OFF state
F1
F2
F3
F4
L
RF1 – RF2, RF3 – RF4
RF2 – RF3, RF4 – RF1
ON
OFF
ON
OFF
H
RF2 – RF3, RF4 – RF1
RF1 – RF2, RF3 – RF4
OFF
ON
OFF
ON
Pin Description 1
Pin No.
Symbol
Description
1
CTL
Control signal input
2
RF1
RF signal input
3
GND
GND
4
GND
GND
5
RF2
RF signal output
6
RF3
RF signal input
7
GND
GND
8
GND
GND
9
RF4
RF signal output
10
VDD
Power supply input
–2–
CXG1144AEN
Pin Description 2
Pin No. Symbol
Equivalent circuit
Logic
1
1
CTL
F1 to F4
10
10
VDD
DC Bias Condition
Item
(Ta = 25°C)
Min.
Typ.
Max.
Unit
Vctl (H)
2.0
3.0
3.6
V
Vctl (L)
0
—
0.4
V
2.7
3.0
3.6
V
VDD
–3–
CXG1144AEN
Electrical Characteristics
Item
(Ta = 25°C, VDD = 3.0V)
Symbol
Insertion loss
IL
Isolation
ISO.
VSWR
VSWR
2fo
Harmonics
3fo
Typ.
Max.
Unit
900MHz
0.30
0.55
dB
1.9GHz
0.45
0.70
dB
Condition
Min.
900MHz
18
21
dB
1.9GHz
14
16
dB
1.2
—
50Ω
∗1
–75
–60
dBc
∗3
–75
–60
dBc
∗1
–75
–60
dBc
∗3
–75
–60
dBc
∗2
Input IP3
IIP3
55
65
dBm
∗4
55
65
dBm
1dB compression input power
P1dB
VDD = 2.8V
32
35
dBm
Switching speed
TSW
Bias current
IDD
Control current
Ictl
1
5
µs
VDD = 3.0V
55
200
µA
Vctl (H) = 3V
40
100
µA
Condition
∗1 Pin = 25dBm, 0/3V control, VDD = 3.0V, 900MHz
∗2 Pin = 25dBm (900MHz) +25dBm (901MHz), 0/3V control, VDD = 3.0V
∗3 Pin = 25dBm, 0/3V control, VDD = 3.0V, 1.9GHz
∗4 Pin = 25dBm (1.9GHz) +25dBm (1.901GHz), 0/3V control, VDD = 3.0V
–4–
CXG1144AEN
Electrical Characteristics Measurement Circuit
GND (recommended)
5
6
RF3
CRF (100pF)
RF2
CRF (100pF)
GND
7
4
GND
GND
8
3
GND
9
2
RF4
RF1
CRF (100pF)
CRF (100pF)
Rctl (1kΩ)
VDD
Cbypass (100pF)
10
1
CTL
Cbypass (100pF)
GND (recommended)
When using this IC, the following external components should be used:
Rctl:
This resistor is used to improve ESD performance. 1kΩ is recommended.
CRF:
This capacitor is used for RF de-coupling and must be used for all applications.
100pF is recommended.
Cbypass: This capacitor is used for DC line filtering. 100pF is recommended.
–5–
CXG1144AEN
Typical Characteristics
Frequency vs. Insertion loss
0
Insertion loss [dB]
0.5
1.0
1.5
2.0
2.5
3.0
0
0.5
1.0
1.5
2.0
1.5
2.0
Frequency [GHz]
Frequency vs. Isolation
0
5
10
Isolation [dB]
15
20
25
30
35
40
45
50
0
0.5
1.0
Frequency [GHz]
–6–
CXG1144AEN
Package Outline
Unit: mm
10PIN VSON(PLASTIC)
+ 0.1
0.8 – 0.05
0.6
2.5
0.05 S
A
2.5
5
B
0.4
0.8
x2
0.35 ± 0.1
0.15 S B
x4
0.15 S A B
0.03 ± 0.03
(Stand Off)
0.05 M S AB
0.225 ± 0.03
1
0.2 ± 0.01
PIN 1 INDEX
2.7
6
10
0.5 ± 0.2
0.35 ± 0.1
S
Solder Plating
0.13 ± 0.025
+ 0.09
0.14 – 0.03
TERMINAL SECTION
NOTE: 1) The dimensions of the terminal section apply to the
ranges of 0.1mm and 0.25mm from the end of a terminal.
PACKAGE STRUCTURE
PACKAGE MATERIAL
EPOXY RESIN
LEAD TREATMENT
SOLDER PLATING
EIAJ CODE
LEAD MATERIAL
COPPER ALLOY
JEDEC CODE
PACKAGE MASS
0.013g
SONY CODE
VSON-10P-01
LEAD SPECIFICATIONS
ITEM
–7–
SPEC.
LEAD MATERIAL
COPPER ALLOY
LEAD TREATMENT
Sn-Bi 2.5%
LEAD TREATMENT THICKNESS
5-18µm
Sony Corporation