SS6730 150mA Low-Noise, Low-Dropout Linear Regulator FEATURES DESCRIPTION Output tolerance of ±2%. The SS6730 is a low noise, low dropout linear Output voltage of 1.8V to 3.3V with 0.1V increments. regulator, Active-low shutdown control. housed in a small SOT-23-5 o r SOT-23-6W package. The device is in the “ON” Very low quiescent current. Very low dropout voltage. state when the SHDN pin is set to a logic-high Miniature package (SOT-23-5 & SOT-23-6W) level. An internal P-MOSFET pass transistor is Short-circuit and thermal protection. used to achieve a low dropout voltage of 90mV at Very low noise. 50mA load current. It offers a high precision output voltage of ±2%. The very low quiescent current APPLICATIONS and low dropout voltage make this device ideal Cellular Telephones. for battery powered applications. The internal Pagers. reverse Personal Communication Equipment. bias protection eliminates the Cordless Telephones. requirement for a reverse voltage protection Portable Instrumentation. diode. The high ripple rejection and low noise Portable Consumer Equipment. provide Radio Control Systems. enhanced applications. Low Voltage Systems. An performance external for capacitor critical can be connected to the noise bypass pin to reduce the Battery Powered Systems. output noise level. TYP ICAL APPLICATION CIRCUIT VIN VIN VOUT + CIN 1µF COUT 1µF GND SHDN V VOUT + BP CBP SHDN SS6730 0.1µF Low Noise Low Dropout Linear Regulator 1/26/2004 Rev.2.02 www.SiliconStandard.com 1 of 11 SS6730 PIN CONFIGURATION ORDERING INFORMATION SS6730-XX CXXX Packing type TR: Tape and reel SOT-23-5 (CV) TOP VIEW 1: VIN 2: GND 3: SHDN 4: BP 5: VOUT Package type V: SOT-23-5 Q: SOT-23-6W Output voltage 18: 1.8V . . . 285: 2.85V . . 33: 3.3V The output voltage is available in 0.1V increments. SOT-23-6W (CQ) TOP VIEW 1: SHDN 2: GND 3: BP 4: VOUT 5: GND 6: VIN 5 4 1 2 3 6 5 4 1 2 3 Example: SS6730-18CVTR 1.8V version, in SOT-23-5 package shipped on tape and reel. ABSOLUTE MAXIMUM RATINGS Supply Voltage .................… … … … … … … … … … … … ..… … … … … … … ....................12V Operating Temperature Range .… … … … … … … … … … … … … … … … … … … .....-40ºC~85ºC Storage Temperature Range ................… … … … … … … … … … … … … … .........-65ºC~150ºC Shutdown Terminal Voltage ..… … … … … … … … … … … … … … … … … … … … … ..............12V Noise Bypass Terminal Voltage .… … … … … … … … … … … .… … … … … … … … … ..............5V Thermal Resistance (Junction to Case) SOT-23-5 … ....… … … ..… … … ..… … … ..130°C /W Thermal Resistance Junction to Ambient SOT-23-5 … ....… … ..… … … … ..… … … ..220°C /W (Assume no ambient airflow, no heatsink) 1/26/2004 Rev.2.02 www.SiliconStandard.com 2 of 11 SS6730 ELECTRICAL CHARACTERISTICS (CIN=1µF , COUT =10µF, TJ=25° C, unless otherwise specified) PARAMETER TEST CONDITIONS SYMBOL Quiescent Current IOUT = 0mA, VIN = 3.6~12V IQ Standby Current VIN = 3.6~8V , output OFF ISTBY GND Pin Current IOUT = 0.1~150mA IGND Continuous Output Current VIN = VOUT + 1V IOUT Output Current Limit VIN = VOUT + 1V , VOUT = 0V Output Voltage Tolerance VIN = VOUT + 1V , no load Temperature Coefficient Line Regulation VIN = VOUT(TYP) + 1V to VOUT(TYP) + 6V Load Regulation VIN = 5V , IOUT = 0.1~150mA MIN. IOUT = 100 mA VOUT≥2.5V IIL 150 VOUT -2 IOUT=150 mA VOUT <2.5V Noise Bypass Terminal Voltage Output Noise CBP = 0.1µF , f = 1KHz VIN = 5V UNIT 55 80 µA 0.1 µA 80 µA 150 mA 220 mA 2 % TC 50 150 ppm/ºC ∆VLIR 2 7 mV ∆VLOR 7 25 mV 90 160 mV 140 230 mV 200 350 mV 700 mV VDROP1 IOUT = 150 mA Dropout Voltage (2) MAX. 55 IOUT = 50 mA Dropout Voltage (1) TYP. VDROP2 VREF 1.23 ∆n 0.46 V µV Hz SHUTDOWN TERMINAL SPECIFICATIONS Shutdown Pin Current I SHDN 0.1 µA V SHDN Shutdown Pin Voltage (ON) Output ON 1.6 V (ON) V SHDN Shutdown Pin Voltage (OFF) Output OFF Shutdown Exit Delay Time CBP = 0.1µF , COUT = 1µF, IOUT=30mA 0.6 (OFF) V ∆t 300 µS TSD 155 ºC THERMAL PROTECTION Thermal Shutdown Temperature 1/26/2004 Rev.2.02 www.SiliconStandard.com 3 of 11 SS6730 TYPICAL PERFORMANCE CHARACTERISTICS IOUT=1mA,CBP=0.1µF COUT=10µF IOUT=1mA,CBP =0.1 µF COUT=1µF VOUT VOUT 50mV/DIV 50mV/DIV VOUT +3V VOUT+3V VOUT+1V VOUT+1V VIN VIN 2V/DIV 2V/DIV Time (100µ S/DIV) TIME (100 µS/DIV) Fig. 1 Line Transient Response Fig. 2 Line Transient Response IOUT=1mA,CBP =1µF COUT=1µF IOUT=1mA,CB P=1µF COUT=10µF VOUT VOUT 50mV/DIV 50mV/DIV VOUT+3V VOUT+3V VOUT+1V VIN VOUT+1V VIN 2V/DIV 2V/DIV Time (100µ S/DIV) Time (100µS/DIV) Fig. 3 Line Transient Response Fig. 4 Line Transient Response I OUT =30mA,C BP=0.01µF V OUT IOUT=30mA,CBP=0.1µF VOUT C OUT =3.3µF 2V/DIV COUT=3.3 µF 2V/DIV VSHDN VSHDN 2V/DIV 2V/DIV Time (250µS/DIV) Fig. 5 1/26/2004 Rev.2.02 Time (250µ S/DIV) Shutdown Exit Delay Fig. 6 Shutdown Exit Delay www.SiliconStandard.com 4 of 12 SS6730 TYPICAL PERFORMANCE CHARACTERISTICS (Continued) IOUT=10mA,CBP =0.1 µF COUT=1µF VOUT 2V/DIV IOUT=10mA,C BP=0.1µF COUT =10µF VOUT 2V/DIV VSHDN 2V/DIV VSHDN 2V/DIV Time (250 µS/DIV) Fig. 7 TIME (250 µS/DIV) Shutdown Exit Delay Fig. 8 CB P=0.1 µF Shutdown Exit Delay CBP =0.1 µF COUT=1µF COUT=10µF VOUT VOUT 20mV/DIV 20mV/DIV IOUT=60mA IOUT=60mA IOUT=0mA I OUT =0mA IOUT I OUT TIME (1mS/DIV) Time (1mS/DIV) Fig. 9 Load Transient Response Fig. 10 Load Transient Response C BP =0.1 µF C OUT=10µF CB P=0.1 µF COUT=1µF VOUT VOUT 20mV/DIV 20mV/DIV I OUT=90mA IOUT=90mA I OUT=0mA I OUT =0mA I OUT I OUT 1/26/2004 Rev.2.02 Time (1mS/DIV) Time (1mS/DIV) Fig. 11 Load Transient Response Fig. 12 Load Transient Response www.SiliconStandard.com 5 of 12 SS6730 TYPICAL PERFORMANCE CHARACTERISTICS (Continued) 250 70 IOUT =50mA 60 VOUT=3.0V 200 IOUT=0mA IGND (uA) VDROP (mV) 50 150 100 40 30 20 50 10 0 0 50 100 0 150 0 1 2 3 5 6 VIN (V) IOUT (mA) Fig. 13 4 Fig. 14 Dropout Voltage vs. Output Current 80 Ground Current vs. Input Voltage (VOUT=3.0V) 70 IOUT=90mA 68 70 66 60 IGND (mA) IQ (µA) 64 IOUT =0mA 50 40 30 IOUT =60mA 62 60 IOUT =30mA 58 56 20 54 10 0 0 52 2 4 6 8 10 12 14 50 -40 16 -20 0 20 VIN (V) 60 80 100 120 140 160 TA (°C) Fig. 15 Quiescent Current (ON Mode) vs. Input Voltage Fig. 16 2.0 Ground Current vs. Temperature 400 1.5 300 Output ON IOUT (mA) VSHDN (V) 40 1.0 200 VOUT is connected to GND 0.5 100 Output OFF 0.0 -40 0 0 40 80 120 0 2 Fig. 17 1/26/2004 Rev.2.02 4 6 8 V IN (V) TA (°C) Shutdown Voltage vs. Temperature Fig. 18 www.SiliconStandard.com Short Circuit Current vs. Input Voltage 6 of 12 SS6730 TYPICAL PERFORMANCE CHARACTERISTICS (Continued) IGND (µA) 70 65 60 55 0 50 100 150 IOUT (mA) Fig. 19 Ground Current vs. Output Current BLOCK DIAGRAM VIN Current Limiting BP VREF 1.23V SHDN Power Shutdown + Error Amp. VOUT Thermal Limiting GND 1/26/2004 Rev.2.02 www.SiliconStandard.com 7 of 12 SS6730 PIN DESCRIPTIONS SOT-23-5 PIN 1 : VIN SOT-23-6W - PIN 2 : GND - Power supply input pin. Bypass PIN 1 : SHDN with a 1µF capacitor to GND PIN 2 : GND Ground functions pin. as This a pin - Active-low shutdown input pin. - also heatsink. Ground functions To pin. as This a pin also heatsink. To maximize power dissipation, use maximize power dissipation, use of of circuit-board ground plane is a large pad or the circuit-board ground plane is recommended. a large pad or the recommended. PIN 3 : BP - Noise bypass pin. An external PIN 3 : SHDN - Active-low shutdown input pin. bypass capacitor connected to PIN 4 : BP the BP pin reduces noise at the - Noise bypass pin. An external bypass capacitor connected to the BP pin reduces noise at the output. PIN 4 : VOUT - Output pin. Sources up to 150 output. mA. PIN 5 : VOUT - Output pin. Sources up to 150 PIN 5 : GND - mA. Ground functions pin. as This a pin also heatsink. To maximize power dissipation, use of a large pad or the circuit-board ground plane is recommended. PIN 6 : VIN - Power supply input pin. Bypass with a 1µF capacitor to GND. DETAILED DESCRIPTION OF TECHNICAL TERMS OUTPUT VOLTAGE (V OUT) which the output voltage drops 100mV below the The SS6730 provides factory-set output voltages value measured with a 1V difference. from 1.8V to 3.3V, in 100mV increments. The output voltage is specified with VIN = VOUT (TYP) CONTINUOUS OUTPUT CURRENT (IOUT) Normal rated output current. This is limited by + 1V and IOUT = 0mA package power dissipation. DROPOUT VOLTAGE (VDROP) The dropout voltage is defined as the difference between the input voltage and output voltage at which point the regulator starts to fall out of regulation. Below this value, the output voltage will fall as the input voltage is reduced. It depends on the load current and junction temperature. The dropout voltage is specified at 1/26/2004 Rev.2.02 LINE REGULATION Line regulation is the ability of the regulator to maintain a constant output voltage as the input voltage changes. The line regulation is specified as the input voltage is changed from VIN = VOUT + 1 V to VIN = VOUT + 6 V and IOUT = 1mA. www.SiliconStandard.com 8 of 12 SS6730 LOAD REGULATION CURRENT LIMIT (I IL) Load regulation is the ability of the regulator to The SS6730 includes a current limiter, to maintain a constant output voltage as the load monitor and control the maximum output current changes. To minimize temperature effects, current to be 300mA typically if the output is it is a pulsed measurement with the input voltage shorted to ground. This can protect the device set to VIN = VOUT + 1 V. The load regulation is from being damaged. specified under the output current step of 0.1mA to 150mA. THERMAL PROTECTION The thermal sensor protects the device when the QUIESCENT CURRENT (I Q ) junction temperature exceeds TJ = +155ºC. It The quiescent current is the current flowing signals the shutdown logic, turning off the pass through the ground pin under no load. transistor and allowing the IC to cool. After the IC’s junction temperature cools by 15ºC, the GROUND CURRENT (I GND) Ground current is the current flowing through the thermal sensor will turn on the pass transistor again. Thermal protection is designed to protect ground pin under loading. the device in the event of fault conditions. For STANDBY CURRENT (I STBY) continuous operation do not exceed the absolute Standby current is the current flowing into the maximum junction-temperature rating of TJ = regulator when the output is shutdown by setting 150ºC, or damage may occur to the device. V SHDN = 0V, VIN = 8 V. APPLICATION INFORMATION INPUT-OUTPUT CAPACITORS Linear regulators capacitors require to input maintain 1µF(tantalum) and be rated for the actual and output stability. The ambient operating temperature range. Note: It is very important to check the selected recommended minimum value of input capacitor manufacturers’ is 0.22µF. The output capacitor should be (capacitance and ESR) over temperature. electrical characteristics selected within the Equivalent Series Resistance (ESR) range shown in the graphs below for stability. Because a ceramic capacitor’s ESR is lower and (capacitance its and electrical ESR) vary characteristics widely over temperature, a tantalum output capacitor is recommended, especially for heavier loads. In general, the capacitor should be at least 1/26/2004 Rev.2.02 NOISE BYPASS CAPACITOR Use a 0.1µF bypass capacitor at BP pin for low output voltage noise. Increasing the capacitance up to 1µF will decrease the output noise. However, values performance above advantage 1µF and provide are no not recommended. www.SiliconStandard.com 9 of 12 SS6730 POWER DISSIPATION where The maximum dissipation of the SS6730 between the die junction and the surrounding air, depends on the thermal resistance of the case TJ -TA is the temperature difference RθJB is the thermal resistance of the package, and circuit board, the temperature difference and Rθ BA is the thermal resistance through the between the die junction and ambient air, and PCB, copper traces, and other materials to the the rate of air flow. The rate of temperature rise surrounding air. is As a general rule, the lower the temperature, greatly affected by the mounting pad configuration on the PCB, the board material, the better the reliability of the device, so the and the ambient temperature. When the IC PCB mounting pad should provide maximum mounting with good thermal conductivity is used, thermal conductivity to maintain low device the junction will be low even if the power temperature. dissipation is great. The GND pin performs the dual function of The power dissipation across the device is providing an electrical connection to ground and P = IOUT (V IN -VOUT). channeling heat away. Therefore, connecting the The maximum power dissipation is: GND pin to ground with a large pad or ground PMAX = (TJ − TA) (R?JB + R? BA) plane would increase the power dissipation and reduce the device temperature. 100 100 COUT=1µF COUT=2.2µ F 10 ESR (Ω) ESR(Ω) 10 1 STABLE REGION 1 Stable Region 0.1 0.1 0.01 50 100 IOUT (mA) 150 0.01 50 Fig. 20 Max Power Dissipation, COUT=1µF 100 150 Fig. 21 Max Power Dissipation, COUT=2.2 µF 100 100 COUT =10µF COUT=3.3µF 10 ESR( Ω) 10 ESR(Ω) IOUT (mA) 1 1 Stable Region Stable Region 0.1 0.1 0.01 100 50 IOUT (mA) 150 Fig. 22 Max Power Dissipation, C OUT =3.3µF 1/26/2004 Rev.2.02 0.01 100 50 150 IOUT (mA) Fig. 23 Max Power Dissipation, C OUT=10µF www.SiliconStandard.com 10 of 12 SS6730 PHYSICAL DIMENSIONS SOT-23-5 (unit: mm) C D SYMBOL MIN MAX A 1.00 1.30 A1 — 0.10 A2 0.70 0.90 b 0.35 0.50 C 0.10 0.25 D 2.70 3.10 E 1.40 1.80 L H E θ1 e A A2 e 1.90 (TYP) H 2.60 3.00 L 0.37 — θ1 1° 9° A1 b SOT-23-5 Marking Part No. SS6730-18CV SS6730-19CV SS6730-20CV SS6730-21CV SS6730-22CV SS6730-23CV SS6730-24CV SS6730-25CV SS6730-26CV 1/26/2004 Rev.2.02 Marking EC18 EC19 EC20 EC21 EC22 EC23 EC24 EC25 EC26 Part No. SS6730-27CV SS6730-28CV SS6730-285CV SS6730-29CV SS6730-30CV SS6730-31CV SS6730-32CV SS6730-33CV www.SiliconStandard.com Marking EC27 EC28 EC2J EC29 EC30 EC31 EC32 EC33 11 of 12 SS6730 SOT-23-6W (unit: mm) C D SYMBOL MIN MAX A 1.00 1.30 A1 — 0.10 A2 0.70 0.90 b 0.35 0.50 C 0.10 0.25 D 2.70 3.10 E 1.60 2.00 L H E θ1 e A A2 e A1 b 1.90 (TYP) H 2.60 3.00 L 0.37 — θ1 1° 9° SOT-23-6W Marking Part No. SS6730-18CQ SS6730-19CQ SS6730-20CQ SS6730-21CQ SS6730-22CQ SS6730-23CQ SS6730-24CQ SS6730-25CQ SS6730-26CQ Marking EB18 EB19 EB20 EB21 EB22 EB23 EB24 EB25 EB26 Part No. SS6730-27CQ SS6730-28CQ SS6730-285CQ SS6730-29CQ SS6730-30CQ SS6730-31CQ SS6730-32CQ SS6730-33CQ Marking EB27 EB28 EB2J EB29 EB30 EB31 EB32 EB33 Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no guarantee or warranty, express or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of Silicon Standard Corporation or any third parties. 1/26/2004 Rev.2.02 www.SiliconStandard.com 12 of 12