SSM3310GH,J
P-channel Enhancement-mode Power MOSFET
2.5V low gate drive capability
D
Simple drive requirement
Fast switching
G
Pb-free; RoHS compliant.
BV DSS
-20V
R DS(ON)
150mΩ
ID
-10A
S
DESCRIPTION
G D
S
The SSM3310GH is in a TO-252 package, which is widely used for
commercial and industrial surface mount applications, and is well suited
for use in low voltage battery applications. The through-hole version,
the SSM3310GJ in TO-251, is available for low-footprint vertical
mounting. These devices are manufactured with an advanced process,
providing improved on-resistance and switching performance.
G
D
S
TO-252 (H)
TO-251 (J)
ABSOLUTE MAXIMUM RATINGS
Parameter
Symbol
Rating
Units
VDS
Drain-Source Voltage
-20
V
VGS
Gate-Source Voltage
± 12
V
ID @ TC=25°C
Continuous Drain Current
-10
A
ID @ TC=100°C
Continuous Drain Current
-6.2
A
1
IDM
Pulsed Drain Current
-24
A
PD @ TC=25°C
Total Power Dissipation
25
W
Linear Derating Factor
0.2
W/°C
TSTG
Storage Temperature Range
-55 to 150
°C
TJ
Operating Junction Temperature Range
-55 to 150
°C
THERMAL DATA
Symbol
Parameter
Value
Unit
Rthj-c
Thermal Resistance Junction-case
Max.
5
°C/W
Rthj-a
Thermal Resistance Junction-ambient
Max.
110
°C/W
2/16/2005 Rev.2.1
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SSM3310GH,J
Electrical Characteristics @ Tj=25°C (unless otherwise specified)
Symbol
Parameter
Test Conditions
BVDSS
Drain-Source Breakdown Voltage
∆ BV DSS/∆ Tj
RDS(ON)
-20
-
-
V
Breakdown Voltage Temperature Coefficient Reference to 25°C, ID=-1mA
-
-0.1
-
V/°C
Static Drain-Source On-Resistance
VGS=-4.5V, ID=-2.8A
-
-
150 mΩ
VGS=-2.5V, ID=-2.0A
-
-
250 mΩ
VDS=VGS, ID=-250uA
-0.5
-
-
V
VDS=-5V, ID=-2.8A
-
4.4
-
S
VDS=-20V, VGS=0V
-
-
-1
uA
Drain-Source Leakage Current (Tj=150 C)
VDS=-16V, VGS=0V
-
-
-25
uA
Gate-Source Leakage
VGS= ± 12V
-
-
ID=-2.8A
-
6
-
nC
VGS(th)
Gate Threshold Voltage
gfs
Forward Transconductance
VGS=0V, ID=-250uA
o
IDSS
Drain-Source Leakage Current (Tj=25 C)
o
IGSS
Min. Typ. Max. Units
2
±100 nA
Qg
Total Gate Charge
Qgs
Gate-Source Charge
VDS=-6V
-
1.5
-
nC
Qgd
Gate-Drain ("Miller") Charge
VGS=-5V
-
0.6
-
nC
VDS=-6V
-
25
-
ns
2
td(on)
Turn-on Delay Time
tr
Rise Time
ID=-1A
-
60
-
ns
td(off)
Turn-off Delay Time
RG=6Ω, VGS=-5V
-
70
-
ns
tf
Fall Time
RD=6Ω
-
60
-
ns
Ciss
Input Capacitance
VGS=0V
-
300
-
pF
Coss
Output Capacitance
VDS=-6V
-
180
-
pF
Crss
Reverse Transfer Capacitance
f=1.0MHz
-
60
-
pF
Source-Drain Diode
Symbol
IS
ISM
VSD
Parameter
Test Conditions
VD=VG=0V , VS=-1.2V
Continuous Source Current ( Body Diode )
Pulsed Source Current ( Body Diode )
2
Forward On Voltage
1
Tj=25°C, IS=-10A, VGS=0V
Min. Typ. Max. Units
-
-
-10
A
-
-
-24
A
-
-
-1.2
V
Notes:
1.Pulse width limited by safe operating area.
2.Pulse width <300us , duty cycle <2%.
2/16/2005 Rev.2.1
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SSM3310GH,J
24
20
-4.5V
T C =150 o C
o
T C =25 C
-4.0V
-3.5V
12
-3.0V
6
-4.0V
15
-ID , Drain Current (A)
-ID , Drain Current (A)
18
-4.5V
-3.5V
10
-3.0V
-2.5V
5
-2.5V
V GS = -2.0V
V GS = -2.0V
0
0
2.5
0.0
5.0
7.5
0
10.0
2
-V DS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
6
8
Fig 2. Typical Output Characteristics
800
1.8
I D = -2.8A
T C =25°C
I D = -2.8A
V GS = -4.5V
600
1.5
Normalized R DS(ON)
RDS(ON) (mΩ )
4
-V DS , Drain-to-Source Voltage (V)
400
200
1.2
0.9
0
0.6
0
2
4
6
8
10
-50
-V GS (V)
50
100
150
T j , Junction Temperature ( o C)
Fig 3. On-Resistance vs. Gate Voltage
2/16/2005 Rev.2.1
0
Fig 4. Normalized On-Resistance
vs. Junction Temperature
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SSM3310GH,J
10
30
25
20
6
PD (W)
-ID , Drain Current (A)
8
15
4
10
2
5
0
0
25
50
75
100
125
0
150
50
T c , Case Temperature ( o C)
100
150
T c , Case Temperature ( o C)
Fig 5. Maximum Drain Current vs.
Case Temperature
Fig 6. Typical Power Dissipation
100
1
Normalized Thermal Response (R thjc)
Duty Factor = 0.5
-ID (A)
100us
10
1ms
10ms
0.2
0.1
0.1
0.05
PDM
0.02
Single Pulse
t
0.01
T
Duty Factor = t/T
Peak T j = PDM x Rthjc + TC
T C =25 °C
Single Pulse
100ms
0.01
1
1
10
100
0.00001
-V DS (V)
0.001
0.01
0.1
1
t , Pulse Width (s)
Fig 7. Maximum Safe Operating Area
2/16/2005 Rev.2.1
0.0001
Fig 8. Effective Transient Thermal Impedance
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SSM3310GH,J
f=1.0MHz
1000
5
4
Ciss
3
Coss
C (pF)
-VGS , Gate to Source Voltage (V)
I D =-2.8A
V DS =-6V
100
2
Crss
1
0
10
0
2
4
6
8
1
3
5
7
9
11
13
-V DS (V)
Q G , Total Gate Charge (nC)
Fig 9. Gate Charge Characteristics
Fig 10. Typical Capacitance Characteristics
1.5
10
T j =150 o C
T j =25 o C
-VGS(th) (V)
-IS(A)
1
1
0.5
0
0
0.3
0.5
0.7
0.9
1.1
1.3
1.5
-50
0
-V SD (V)
100
150
o
T j , Junction Temperature ( C)
Fig 11. Forward Characteristic of
Reverse Diode
2/16/2005 Rev.2.1
50
Fig 12. Gate Threshold Voltage vs.
Junction Temperature
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SSM3310GH,J
VDS
90%
RD
VDS
D
TO THE
OSCILLOSCOPE
0.3 x RATED VDS
G
RG
10%
S
VGS
VGS
-5 V
td(on)
Fig 13. Switching Time Circuit
td(off) tf
tr
Fig 14. Switching Time Waveform
VG
VDS
TO THE
OSCILLOSCOPE
D
0.3 x RATED VDS
G
S
QG
-5V
QGS
QGD
VGS
-1~-3mA
I
G
ID
Charge
Fig 15. Gate Charge Circuit
2/16/2005 Rev.2.1
Q
Fig 16. Gate Charge Waveform
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SSM3310GH,J
Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no
guarantee or warranty, express or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no
responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its
use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including
without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to
the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of
Silicon Standard Corporation or any third parties.
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