SSM4800M
N-CHANNEL ENHANCEMENT MODE
POWER MOSFET
Low On-Resistance
D
Fast Switching
D
D
D
G
S
S
25V
R DS(ON)
18mΩ
ID
Simple Drive Requirement
SO-8
BV DSS
9A
S
Description
D D
Power MOSFETs from Silicon Standard provide the
designer with the best combination of fast switching,
ruggedized device design, low on-resistance and cost-effectiveness.
G
G
S S
The SSM4800M is in the SO-8 package, which is widely preferred for
commercial and industrial surface mount applications, and is well suited
for low-voltage applications such as DC/DC converters.
Absolute Maximum Ratings
Parameter
Symbol
Rating
Units
VDS
Drain-Source Voltage
25
V
VGS
Gate-Source Voltage
V
ID@TA=25℃
Continuous Drain Current, VGS @ 10V
± 20
9
A
ID@TA=70℃
Continuous Drain Current, VGS @ 10V
7
A
1
IDM
Pulsed Drain Current
40
A
PD@TA=25℃
Total Power Dissipation
2.5
W
Linear Derating Factor
0.02
W/℃
TSTG
Storage Temperature Range
-55 to 150
℃
TJ
Operating Junction Temperature Range
-55 to 150
℃
Thermal Data
Symbol
Rthj-amb
Rev.2.01 6/26/2003
Parameter
Thermal Resistance Junction-ambient
Max.
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Value
Unit
50
℃/W
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SSM4800M
Electrical Characteristics @ T j=25oC (unless otherwise specified)
Symbol
Parameter
Test Conditions
Typ.
Max. Units
25
-
-
V
BVDSS
Drain-Source Breakdown Voltage
ΔBVDSS/ΔTj
Breakdown Voltage Temperature Coefficient Reference to 25℃, ID=1mA
-
0.037
-
V/℃
RDS(ON)
Static Drain-Source On-Resistance
VGS=10V, ID=9A
-
-
18
mΩ
VGS=4.5V, ID=7A
-
-
33
mΩ
VDS=VGS, ID=250uA
1
-
3
V
VGS(th)
Gate Threshold Voltage
gfs
Forward Transconductance
IDSS
IGSS
VGS=0V, ID=250uA
Min.
VDS=15V, ID=10A
-
20
-
S
o
VDS=25V, VGS=0V
-
-
1
uA
o
Drain-Source Leakage Current (Tj=55 C)
VDS=20V, VGS=0V
-
-
25
uA
Gate-Source Leakage
VGS= ± 20V
-
-
Drain-Source Leakage Current (Tj=25 C)
nA
Qg
Total Gate Charge
ID=9A
-
±100
10.9
-
Qgs
Gate-Source Charge
VDS=15V
-
1.9
-
nC
Qgd
Gate-Drain ("Miller") Charge
VGS=5V
-
7.4
-
nC
VDS=15V
-
7
-
ns
2
2
nC
td(on)
Turn-on Delay Time
tr
Rise Time
ID=1A
-
10.5
-
ns
td(off)
Turn-off Delay Time
RG=6.2Ω,VGS=10V
-
20
-
ns
tf
Fall Time
RD=15Ω
-
17.5
-
ns
Ciss
Input Capacitance
VGS=0V
-
390
-
pF
Coss
Output Capacitance
VDS=25V
-
245
-
pF
Crss
Reverse Transfer Capacitance
f=1.0MHz
-
100
-
pF
Min.
Typ.
-
-
2.3
A
-
-
40
A
-
-
1.3
V
Source-Drain Diode
Symbol
IS
ISM
VSD
Parameter
Test Conditions
VD=VG=0V , VS=1.3V
Continuous Source Current ( Body Diode )
1
Pulsed Source Current ( Body Diode )
2
Forward On Voltage
Tj=25℃, IS=2.3A, VGS=0V
Max. Units
Notes:
1.Pulse width limited by safe operating area.
2.Pulse width <300us , duty cycle <2%.
Rev.2.01 6/26/2003
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2 of 6
SSM4800M
40
40
T C =25 o C
T C =150 o C
V G =10V
V G =8.0V
V G =8.0V
30
V G =6.0V
ID , Drain Current (A)
V G =6.0V
ID , Drain Current (A)
30
V G =10V
20
20
V G =4.0V
V G =4.0V
10
10
0
0
0
0
1
2
3
4
5
1
3
4
5
6
V DS , Drain-to-Source Voltage (V)
V DS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1.80
34
I D =9A
I D =9A
T c =25 ℃
1.60
Normalized R DS(ON)
30
26
RDSON (mΩ )
2
6
22
18
V G =10V
1.40
1.20
1.00
0.80
14
0.60
10
2
3
4
5
6
7
8
9
10
-50
0
50
100
150
T j , Junction Temperature ( o C)
V GS (V)
Fig 3. On-Resistance v.s. Gate Voltage
Rev.2.01 6/26/2003
11
Fig 4. Normalized On-Resistance
v.s. Junction Temperature
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3 of 6
SSM4800M
10
3
9
2.5
8
2
6
PD (W)
ID , Drain Current (A)
7
5
1.5
4
1
3
2
0.5
1
0
25
50
75
100
125
0
150
0
o
50
100
150
o
T c , Case Temperature ( C)
T c , Case Temperature ( C)
Fig 5. Maximum Drain Current v.s.
Fig 6. Typical Power Dissipation
Case Temperature
1
100
Normalized Thermal Response (R thjc)
DUTY=0.5
10
ID (A)
10us
100us
1
1ms
10ms
T c =25 o C
Single Pulse
0.2
0.1
0.1
0.05
0.02
0.01
PDM
t
0.01
T
SINGLE PULSE
Duty factor = t/T
Peak Tj = P DM x Rthjc + TC
100ms
0
0.001
0.1
1
10
100
0.0001
0.001
V DS (V)
0.1
1
10
100
1000
t , Pulse Width (s)
Fig 7. Maximum Safe Operating Area
Rev.2.01 6/26/2003
0.01
Fig 8. Effective Transient Thermal Impedance
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4 of 6
SSM4800M
f=1.0MHz
16
10000
I D =9A
V DS =15V
12
1000
10
Ciss
C (pF)
VGS , Gate to Source Voltage (V)
14
8
Coss
6
Crss
100
4
2
0
0
5
10
15
20
25
30
10
1
6
11
16
21
26
V DS (V)
Q G , Total Gate Charge (nC)
Fig 9. Gate Charge Characteristics
Fig 10. Typical Capacitance Characteristics
100
3
10
2
VGS(th) (V)
T j =150 o C
IS(A)
T j =25 o C
1
1
0.1
0
0.1
0.3
0.5
0.7
0.9
1.1
1.3
1.5
-50
0
V SD (V)
Rev.2.01 6/26/2003
100
150
o
T j , Junction Temperature( C)
Fig 11. Forward Characteristic of
Reverse Diode
50
Fig 12. Gate Threshold Voltage v.s.
Junction Temperature
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5 of 6
SSM4800M
VDS
90%
RD
VDS
D
RG
TO THE
OSCILLOSCOPE
0.6 x RATED VDS
G
+
10%
VGS
S
10 V
VGS
-
td(on)
Fig 13. Switching Time Circuit
td(off) tf
tr
Fig 14. Switching Time Waveform
VG
VDS
5V
0.6 x RATED VDS
G
S
QG
TO THE
OSCILLOSCOPE
D
QGS
QGD
VGS
+
1~ 3 mA
IG
ID
Charge
Fig 15. Gate Charge Circuit
Q
Fig 16. Gate Charge Waveform
Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no
guarantee or warranty, express or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no
responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its
use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including
without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to
the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of
Silicon Standard Corporation or any third parties.
Rev.2.01 6/26/2003
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