SSM4924GM
Dual N-channel Enhancement-mode Power MOSFETs
BVD2
Simple drive requirement
D2
Lower gate charge
D1
D1
Fast switching characteristics
R
I
G2
S2
Pb-free; RoHS compliant.
SO-8
S1
BVDSS
20V
R DS(ON)
35mΩ
ID
6A
G1
DESCRIPTION
Advanced Power MOSFETs from Silicon Standard provide the
designer with the best combination of fast switching, ruggedized
device design, low on-resistance and cost-effectiveness.
D2
D1
G2
G1
The SSM4924GM is in an SO-8 package, which is widely preferred for
commercial and industrial surface mount applications. This device is
suitable for low voltage applications such as DC/DC converters.
S1
S2
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
VDS
Drain-Source Voltage
VGS
Gate-Source Voltage
ID@TA=25°C
Units
20
V
±8
V
3
6
A
3
4.8
A
Continuous Drain Current
ID@TA=70°C
Rating
Continuous Drain Current
1,4
IDM
Pulsed Drain Current
35
A
PD@TA=25°C
Total Power Dissipation
2
W
0.016
W/°C
Linear Derating Factor
TSTG
Storage Temperature Range
-55 to 150
°C
TJ
Operating Junction Temperature Range
-55 to 150
°C
THERMAL DATA
Symbol
Rthj-amb
12/10/2004 Rev.2.01
Parameter
Thermal Resistance Junction-ambient
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Max.
Value
Unit
62.5
°C/W
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SSM4924GM
o
ELECTRICAL CHARACTERISTICS @ Tj = 25 C (unless otherwise specified)
Symbol
Parameter
Test Conditions
BVDSS
Drain-Source Breakdown Voltage
∆ BV DSS/∆ Tj
RDS(ON)
20
-
-
V
Breakdown Voltage Temperature Coefficient Reference to 25°C, ID=1mA
-
0.037
-
V/°C
Static Drain-Source On-Resistance
VGS=4.5V, ID=6A
-
-
35
mΩ
VGS=2.5V, ID=5.2A
-
-
50
mΩ
VDS=VGS, ID=250uA
0.5
-
1.2
V
VDS=10V, ID=6A
-
18.5
-
S
Drain-Source Leakage Current (Tj=25 C)
VDS=20V, VGS=0V
-
-
1
uA
Drain-Source Leakage Current (Tj=70oC)
VDS=16V, VGS=0V
-
-
25
uA
Gate-Source Leakage
VGS=±8V
-
-
ID=6A
-
9
-
nC
VGS(th)
Gate Threshold Voltage
gfs
Forward Transconductance
VGS=0V, ID=250uA
o
IDSS
IGSS
Min. Typ. Max. Units
2
±100 nA
Qg
Total Gate Charge
Qgs
Gate-Source Charge
VDS=10V
-
1.8
-
nC
Qgd
Gate-Drain ("Miller") Charge
VGS=4.5V
-
4.2
-
nC
VDS=10V
-
6.5
-
ns
2
td(on)
Turn-on Delay Time
tr
Rise Time
ID=1A
-
14
-
ns
td(off)
Turn-off Delay Time
RG=6Ω ,VGS=4.5V
-
20
-
ns
tf
Fall Time
RD=10Ω
-
15
-
ns
Ciss
Input Capacitance
VGS=0V
-
300
-
pF
Coss
Output Capacitance
VDS=8V
-
255
-
pF
Crss
Reverse Transfer Capacitance
f=1.0MHz
-
115
-
pF
SOURCE-DRAIN DIODE
Symbol
IS
ISM
VSD
Parameter
Test Conditions
VD=VG=0V , VS=1.2V
Continuous Source Current ( Body Diode )
Pulsed Source Current ( Body Diode )
2
Forward On Voltage
1
Tj=25°C, IS=1.7A, VGS=0V
Min. Typ. Max. Units
-
-
1.7
A
-
-
35
A
-
0.75
1.2
V
Notes:
1.Pulse width limited by maximum junction temperature.
2.Pulse width <300us, duty cycle <2%.
3.Surface-mounted on FR4 board, t<10sec.
4.Pulse width <10us, duty cycle <1%.
12/10/2004 Rev.2.01
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SSM4924GM
25
25
o
T C =25 C
V G =4.5V
V G =4.5V
20
V G =3.5V
V G =3.0V
ID , Drain Current (A)
ID , Drain Current (A)
20
T C =150 o C
15
V G =2.5V
10
V G =3.5V
V G =3.0V
15
V G =2.5V
10
V G =2.0V
V G =2.0V
5
5
0
0
0
1
2
3
4
5
6
0
2
3
4
5
V DS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
6
1.8
45
Id=6A
T c =25°C
I D =6A
V G =4.5V
1.6
Normalized RDS(ON)
40
35
RDSON (mΩ )
1
V DS , Drain-to-Source Voltage (V)
30
1.4
1.2
1.0
25
0.8
0.6
20
2
3
4
5
-50
0
Fig 3. On-Resistance vs. Gate Voltage
12/10/2004 Rev.2.01
50
100
150
T j , Junction Temperature ( o C)
V GS (V)
Fig 4. Normalized On-Resistance
vs. Junction Temperature
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SSM4924GM
3
8
7
6
ID , Drain Current (A)
2
PD (W)
5
4
3
1
2
1
0
0
25
50
75
100
125
0
150
50
100
150
T c ,Case Temperature ( o C)
o
T c , Case Temperature ( C)
Fig 5. Maximum Drain Current vs.
Case Temperature
Fig 6. Typical Power Dissipation
100
1
Normalized Thermal Response (Rthja)
DUTY=0.5
1ms
10
ID (A)
10ms
100ms
0.2
0.1
0.1
0.05
0.02
0.01
P DM
0.01
1
1s
t
T
SINGLE PULSE
Duty factor = t/T
Peak Tj = PDM x Rthja + Ta
T c =25 o C
Single Pulse
0.001
0.1
0.1
1
10
100
0.0001
0.001
Fig 7. Maximum Safe Operating Area
12/10/2004 Rev.2.01
0.01
0.1
1
10
100
1000
t , Pulse Width (s)
V DS (V)
Fig 8. Effective Transient Thermal Impedance
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SSM4924GM
I D =6A
V DS =10V
5
Ciss
4
C (pF)
VGS , Gate to Source Voltage (V)
f=1.0MHz
1000
6
3
Coss
100
Crss
2
1
0
10
0
2
4
6
8
10
12
1
5
9
13
17
21
25
29
V DS (V)
Q G , Total Gate Charge (nC)
Fig 9. Gate Charge Characteristics
Fig 10. Typical Capacitance Characteristics
1.5
100.00
10.00
1
T j =25 o C
VGS(th) (V)
IS(A)
T j =150 o C
1.00
0.5
0.10
0.01
0.1
0.3
0.5
0.7
0.9
1.1
1.3
1.5
0
-50
0
Fig 11. Forward Characteristic of
Reverse Diode
12/10/2004 Rev.2.01
50
100
150
T j ,Junction Temperature ( o C)
V SD (V)
Fig 12. Gate Threshold Voltage vs.
Junction Temperature
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SSM4924GM
VDS
90%
RD
VDS
D
0.5x RATED VDS
G
RG
TO THE
OSCILLOSCOPE
10%
S
+
VGS
VGS
4..5V
-
td(on)
Fig 13. Switching Time Circuit
td(off) tf
tr
Fig 14. Switching Time Waveform
VG
VDS
4.5V
0.5 x RATED VDS
G
S
QG
TO THE
OSCILLOSCOPE
D
QGS
QGD
VGS
+
1~ 3 mA
I
G
I
D
Charge
Fig 15. Gate Charge Circuit
Q
Fig 16. Gate Charge Waveform
Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no
guarantee or warranty, express or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no
responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its
use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including
without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to
the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of
Silicon Standard Corporation or any third parties.
12/10/2004 Rev.2.01
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