ASAHI KASEI [AKD4563A] AKD4563A Evaluation board Rev.A for AK4563A GENERAL DESCRIPTION AKD4563A is an evaluation board for the 16bit 4ch A/D and 2ch D/A converter, AK4563A. The AKD4563A can evaluate A/D converter D/A converter separately in addition to loopback mode (A/D → D/A). The A/D section can be evaluated by interfacing with AKM’s DAC evaluation boards directly. The AKD4563A has the interface with AKM’s ADC evaluation boards. Therefore, it’s easy to evaluate the D/A section. The AKD4563A also has the digital audio interface and can achieve the interface with digital audio systems via opt-connector. Ordering guide AKD4563A --- Evaluation board for AK4563A (Cable for connecting with printer port of IBM-AT, compatible PC and control software are packed with this.) FUNCTION • Compatible with 2 types of interface - Direct interface with AKM’s A/D & D/A converter evaluation boards - DIT/DIR with optical input/output • BNC connector for an external clock input • 10pin Header for serial control mode VA GND VT LIN JP13 RIN JP14 CS8412 (DIR) Opt In AK4353 (DIT) Opt Out AK4563A LOUT ROUT Control Data Clock Generator 10pin Header A/D, D/A Data 10pin Header Figure 1. AKD4563A Block Diagram * Circuit diagram and PCB layout are attached at the end of this manual. <KM064401> 2006 / 06 -1- ASAHI KASEI [AKD4563A] Evaluation Board Manual Input / Output circuits & Set-up jumper pin for Input / Output circuits (1) Input circuits J2 LIN C37 JP13 10u INT1 INT0 EXT LIN INTL1 + C38 10u INTL0 + LIN C39 10u EXTL + C41 10u LIN + J4 RIN C42 JP14 10u INT1 INT0 EXT RIN INTR1 + C44 10u INTR0 + RIN C45 10u EXTR + C46 10u RIN + Figure 2. LIN/RIN Input circuits 1. Analog signal is input to INTL1 and INTR1 pins via J2 and J4 connectors. JP13 LIN JP14 RIN INT1 INT1 INT0 INT0 EXT EXT LIN RIN 2. Analog signal is input to INTL0 and INTR0 pins via J2 and J4 connectors. JP13 LIN JP14 RIN INT1 INT1 INT0 INT0 EXT EXT LIN RIN <KM064401> 2006 / 06 -2- ASAHI KASEI [AKD4563A] 3. Analog signal is input to EXTL and EXTR pins via J2 and J4 connectors. JP13 LIN JP14 RIN INT1 INT1 INT0 INT0 EXT EXT LIN RIN 4. Analog signal is input to LIN and RIN pins via J2 and J4 connectors. JP13 LIN JP14 RIN INT1 INT1 INT0 INT0 EXT EXT LIN RIN (2) Output circuits + Analog signal is output to LOUT and ROUT pins via J3 and J5 connectors. R35 220 J3 LOUT R37 220 J5 ROUT LOUT R36 10k + C40 22u ROUT C43 22u R39 10k Figure 3. LOUT/ROUT output circuits * AKM assumes no responsibility for the trouble when using the above circuit examples. <KM064401> 2006 / 06 -3- ASAHI KASEI [AKD4563A] Operation sequence 1) Set up the power supply lines. [VA] (orange) = 2.3 ∼ 3.0V : for VA of AK4563A (typ. 2.5V) [VT] (orange) = 1.5 ∼ 3.0V : for VT of AK4563A (typ. 2.5V) [D2V] (orange) = 1.5 ∼ 3.0V : for 74LVC541 (typ. 2.5V) [D5V] (red) = 3.6 ∼ 5.0V : for logic (typ. 5.0V) [AGND] (black) = 0V : for analog ground [DGND] (black) = 0V : for logic ground Each supply line should be distributed from the power supply unit. VT and D2V must be same voltage level. 2) Set up the evaluation mode, jumper pins and DIP switches. (See the followings.) 3) Power on. The AK4563A and AK4353 should be reset once bringing SW1, 2 “L” upon power-up. Evaluation mode Applicable Evaluation Mode 1) Evaluation of loopback mode (default) 2) Evaluation of D/A using A/D converted data 3) Evaluation of D/A using DIR (Optical Link) 4) Evaluation of A/D using D/A converted data 5) Evaluation of A/D using DIT (Optical Link) 6) All interface signals including master clock are fed externally. 1) Evaluation of loopback mode. <default> Nothing should be connected to PORT3 and PORT4. In case of using external clock through a BNC connector (J1), select EXT on JP11 (CLK) and short JP12 (XTE). When SDTO0 is connected with SDTI, JP8 (SD0/1) selects SD0 side. When SDTO1 is connected with SDTI, JP8 (SD0/1) selects SD1 side. 64fs ADC DIR JP5 JP9 JP10 JP11 JP12 BCLK SDTI DIR CLK XTE ADC DIR ADC DIR VD GND DIR 32fs JP4 LRCK <KM064401> XTL JP3 X_BCLK EXT DIF1 0 0 1 1 Table 1. AK4563A audio data I/F format and Setting JP3 JP3 AK4563A (X_BCLK) DIF0 SDTO0/SDTO1 (ADC) SDTI (DAC) 0 16bit MSB justified 16bit LSB justified 32fs 1 16bit LSB justified 16bit LSB justified 64fs 0 16bit MSB justified 16bit MSB justified 32fs or 64fs 1 I2S Compatible I2S Compatible 32fs or 64fs 2006 / 06 -4- ASAHI KASEI [AKD4563A] 2) Evaluation of D/A using A/D converted data. It is possible to make evaluation in the form of analog inputs and analog outputs by interfacing with various AKM’s A/D evaluation boards with PORT3. Nothing should be connected to PORT1, PORT4. In case of using external clock through a BNC connector (J1), select EXT on JP11 (CLK) and short JP12 (XTE). ADC DIR JP9 JP10 JP11 JP12 BCLK SDTI DIR CLK XTE ADC DIR ADC DIR VD GND XTL 64fs JP5 DIR 32fs JP4 LRCK EXT JP3 X_BCLK 3) Evaluation of D/A using DIR. (Optical link) PORT4 (DIR) is used. DIR generates MCLK, BCLK, LRCK and SDATA from the received data through optical connector (TORX176). Used for the evaluation using CD test disk. Nothing should be connected to PORT1, PORT3. ADC DIR ADC DIR ADC DIR VD JP11 CLK JP12 XTE GND XTL 64fs JP10 DIR JP9 SDTI DIR 32fs JP5 BCLK JP4 LRCK EXT JP3 X_BCLK 4) Evaluation of A/D using D/A converted data. It is possible to make evaluation in the form of analog inputs and analog outputs by interfacing with various AKM’s D/A evaluation boards with PORT3. Nothing should be connected to PORT4. When SDTO0 is supplied from PORT1, JP8 (SD0/1) selects SD0 side. When SDTO1 is supplied from PORT1, JP8 (SD0/1) selects SD1 side. ADC DIR ADC DIR JP10 DIR JP9 SDTI ADC DIR VD <KM064401> JP12 XTE JP11 CLK GND XTL 64fs JP5 BCLK DIR 32fs JP4 LRCK EXT JP3 X_BCLK 2006 / 06 -5- ASAHI KASEI [AKD4563A] 5) Evaluation of A/D using DIT. (Optical link) PORT1 (DIT) is used. DIT generates audio bi-phase signal from received data and which is output through optical connector (TOTX176). It is possible to connect AKM’s D/A converter evaluation boards on the digital-amplifier which equips DIR input. Nothing should be connected PORT3 and PORT4. In case of using external clock through a BNC connector (J1), select EXT on JP11 (CLK) and short JP12 (XTE). When SDTO0 is supplied from PORT1, JP8 (SD0/1) selects SD0 side. When SDTO1 is supplied from PORT1, JP8 (SD0/1) selects SD1 side. ADC DIR ADC DIR JP10 DIR JP9 SDTI ADC DIR VD JP11 CLK JP12 XTE GND XTL 64fs JP5 BCLK DIR 32fs JP4 LRCK EXT JP3 X_BCLK 6) All interfacing signals (MCLK, BCLK, LRCK) are fed from the external circuit through PORT3. Under the following set up, all external signals needed for the AK4563A to operate could be fed through PORT3. In case of interfacing external sources to D/A converter, JP7 (SDTO) should be open. And in case of using A/D data to externally, JP9 (SDTI) is set ADC side. When JP9 (SDTI) is open, the A/D data can be output from the PORT3, if JP7 (SDTO) is short. ADC DIR ADC DIR JP10 DIR JP9 SDTI ADC DIR VD JP11 CLK <KM064401> JP12 XTE GND XTL 64fs JP5 BCLK DIR 32fs JP4 LRCK EXT JP3 X_BCLK 2006 / 06 -6- ASAHI KASEI [AKD4563A] DIP Switch set up [SW3] (MODE): Setting evaluation mode of CS8412(DIR) ON is “1”, OFF is “0”. Table 2. AK4563Aaudio data I/F format and setting SW3 and JP6 AK4563A SW3 MODE DIF1 DIF0 M0 M1 M2 0 0 16bit LSB justified 1 0 1 0 1 16bit LSB justified 1 0 1 1 0 16bit MSB justified 0 0 0 1 1 I2S Compatible 0 1 0 JP6 THR THR INV THR SW3 and AK4563A format must be same audio data format. Other jumper pins set up 1. JP1 (GND) : Analog ground and Digital ground OPEN : Separated. SHORT : Common. (The connector “DGND” can be open.) <default> 2. JP2 (VT) : D2V and VT OPEN : Separated. <default> SHORT : Common. (The connector “VT” can be open.) 3. JP6 (PHASE) : Phase of BCLK using DIR THR : BCLK is coincides with AK4563A. (16bit LSB justified and I2S compatible for DAC.) INV : BCLK is inverted. (16bit MSB justified for DAC.) 4. JP7 (SDTO) : Analog ground and Digital ground *Always open. 5. JP8 (SD0/1) : Select SDTO0 or SDTO1 SD0 : Select SDTO0. SD1 : Select SDTO1. The function of the toggle SW Upper-side is “H” and lower-side is “L”. [SW1] (PDN): Power down of AK4563A. Keep “H” during normal operation. [SW2] (DIT): Power down of AK4353. Keep “H” during normal operation. Indication for LED [LED1] (VERF): Monitor VERF pin of the CS8412. LED turns on when some error has occurred to CS8412. [LED2] (PREM): Indicate whether the input data of CS8412 is pre-emphasized or not. <KM064401> 2006 / 06 -7- ASAHI KASEI [AKD4563A] Serial Control The AK4563A can be controlled via the printer port (parallel port) of IBM-AT compatible PC. Connect PORT2 (CTRL) with PC by 10 wire flat cable packed with the AKD4563A. Connect PC 10 wire flat cable 10pin Connector CSN CCLK CDTI AKD4563A 10pin Header Figure 4. Connect of 10 wire flat cable <KM064401> 2006 / 06 -8- ASAHI KASEI [AKD4563A] Control Software Manual Set-up of evaluation board and control software 1. Set up the AKD4563A according to previous term. 2. Connect IBM-AT compatible PC with AKD4563A by 10-line type flat cable (packed with AKD4563A). Take care of the direction of 10pin header. (Please install the driver in the CD-ROM when this control software is used on Windows 2000/XP. Please refer “Installation Manual of Control Software Driver by AKM device control software”. In case of Windows95/98/ME, this installation is not needed. This control software does not operate on Windows NT.) 3. Insert the CD-ROM labeled “AK4563A Evaluation Kit” into the CD-ROM drive. 4. Access the CD-ROM drive and double-click the icon of “akd4563A.exe” to set up the control program. 5. Then please evaluate according to the follows. Operation flow Keep the following flow. 1. Set up the control program according to explanation above. 2. Click “Port Setup” button. 3. Click “Write default” button. 4. Then set up the dialog and input data. Explanation of each buttons 1. [Port Reset] : 2. [Write default] : 3. [All Read] : 4. [All Write] : 5. [Function1] : 6. [Function2] : 7. [Function3] : 8. [Function4] : 9. [Function5] : 10.[Write] : 11.[Read] : 12.[SAVE] : 13.[OPEN] : 14.[AK4353]: 14-1. [MSB] : 14-2. [LSB] : 14-3. [I2S] : Set up the port. When this is pushed, the printer port or USB port is selected automatically. Initialize the register of the AK4563A Read all registers of the AK4563A. Write all registers that is currently displayed Dialog to write data by keyboard operation. Dialog to evaluate IPGA and ATTL/ATTR. The sequence of register setting can be set and executed. The sequence that is created on [Function3] can be assigned to buttons and executed. The register setting that is created by [SAVE] function on main window can be assigned to buttons and executed. Dialog to write data by mouse operation. Read data by mouse operation. Save the current register setting. Write the save values to all register. Set up the audio I/F format of AK4353 MSB justified for DIT mode in AK4353. LSB justified for DIT mode in AK4353. I2S compatible for DIT mode in AK4353. Note 1. Evaluation mode of AK4353 and AK4563A is same mode. Note 2. The default of AK4353 is MCLK=256fs and I2S compatible mode. Note 3. MCLK of AK4353 is fixed to 256fs. Indication of data Input data is indicated on the register map. Red letter indicates “H” or “1” and blue one indicates “L” or “0”. Blank is the part that is not defined in the datasheet. <KM064401> 2006 / 06 -9- ASAHI KASEI [AKD4563A] Explanation of each dialog 1. [Function1 Dialog] : Dialog to write data by keyboard operation Address Box: Data Box: Input register address in 2 figures of hexadecimal. Input register data in 2 figures of hexadecimal. If you want to write the input data to AK4563A, click “OK” button. If not, click “Cancel” button. 2. [Function2 Dialog] : Dialog to evaluate IPGA and ATTL/ATTR This dialog corresponds to only addr=0BH and 0CH, 0DH. Address Box: Input register address in 2 figures of hexadecimal. Start Data Box: Input start data in 2 figures of hexadecimal. End Data Box: Input end data in 2 figures of hexadecimal. Interval Box: Data is written to AK4563A by this interval. Step Box: Data changes by this step. Mode Select Box: If you check this check box, data reaches end data, and returns to start data. [Example] Start Data = 00, End Data = 09 Data flow: 00 01 02 03 04 05 06 07 08 09 09 08 07 06 05 04 03 02 01 00 If you do not check this check box, data reaches end data, but does not return to start data. [Example] Start Data = 00, End Data = 09 Data flow: 00 01 02 03 04 05 06 07 08 09 If you want to write the input data to AK4563A, click “OK” button. If not, click “Cancel” button. 3. [Write Dialog] : Dialog to write data by mouse operation There are dialogs corresponding to each register. Click the “Write” button corresponding to each register to set up the dialog. If you check the check box, data becomes “H” or “1”. If not, “L” or “0”. If you want to write the input data to AK4563A, click “OK” button. If not, click “Cancel” button. 4.[Save] and [Open] 4-1. [Save] Save the current register setting data. The extension of file name is “akr”. (Operation flow) (1) Click [Save] Button. (2) Set the file name and push [Save] Button. The extension of file name is “akr”. 4 -2. [Open] The register setting data saved by [Save] is written to AK4563A. The file type is the same as [Save]. (Operation flow) (1) Click [Open] Button. (2) Select the file (*.akr) and Click [Open] Button. <KM064401> 2006 / 06 - 10 - ASAHI KASEI [AKD4563A] 5.[Function3 Dialog] The sequence of register setting can be set and executed. (1) Click [F3] Button. (2) Set the control sequence. Set the address, Data and Interval time. Set “-1” to the address of the step where the sequence should be paused. (3) Click [Start] button. Then this sequence is executed. The sequence is paused at the step of Interval="-1". Click [START] button, the sequence restarts from the paused step. This sequence can be saved and opened by [Save] and [Open] button on the Function3 window. The extension of file name is “aks”. Figure 1. Window of [F3] <KM064401> 2006 / 06 - 11 - ASAHI KASEI [AKD4563A] 6. [Function4 Dialog] The sequence that is created on [Function3] can be assigned to buttons and executed. When [F4] button is clicked, the window as shown in Figure2 opens. Figure 2. [F4] window <KM064401> 2006 / 06 - 12 - ASAHI KASEI [AKD4563A] 6-1. [OPEN] buttons on left side and [START] buttons (1) Click [OPEN] button and select the sequence file (*.aks). The sequence file name is displayed as shown in Figure 3. Figure 3. [F4] window(2) (2) Click [START] button, then the sequence is executed. 6-2. [SAVE] and [OPEN] buttons on right side [SAVE] : The sequence file names can assign be saved. The file name is *.ak4. [OPEN] : The sequence file names assign that are saved in *.ak4 are loaded. 6-3. Note (1) This function doesn't support the pause function of sequence function. (2) All files need to be in same folder used by [SAVE] and [OPEN] function on right side. (3) When the sequence is changed in [Function3], the file should be loaded again in order to reflect the change. <KM064401> 2006 / 06 - 13 - ASAHI KASEI [AKD4563A] 7.[Function5 Dialog] The register setting that is created by [SAVE] function on main window can be assigned to buttons and executed. When [F5] button is clicked, the following window as shown in Figure 4 opens. Figure 4. [F5] window 7-1. [OPEN] buttons on left side and [WRITE] button (1) Click [OPEN] button and select the register setting file (*.akr). The register setting file name is displayed as shown in Figure 5. (2) Click [WRITE] button, then the register setting is executed. <KM064401> 2006 / 06 - 14 - ASAHI KASEI [AKD4563A] Figure 5. [F5] windows(2) 7-2. [SAVE] and [OPEN] buttons on right side [SAVE] : The register setting file names assign can be saved. The file name is *.ak5. [OPEN] : The register setting file names assign that are saved in *.ak5 are loaded. 7-3. Note (1) All files need to be in same folder used by [SAVE] and [OPEN] function on right side. (2) When the register setting is changed by [Save] Button in main window, the file should be loaded again in order to reflect the change. <KM064401> 2006 / 06 - 15 - ASAHI KASEI [AKD4563A] 2. [Function2 Dialog] : Dialog to evaluate IPGA This dialog corresponds to only addr=07H. Address Box: Input register address in 2 figures of hexadecimal. Start Data Box: Input start data in 2 figures of hexadecimal. End Data Box: Input end data in 2 figures of hexadecimal. Interval Box: Data is written to AK4563A by this interval. Step Box: Data changes by this step. Mode Select Box: If you check this check box, data reaches end data, and returns to start data. [Example] Start Data = 00, End Data = 09 Data flow: 00 01 02 03 04 05 06 07 08 09 09 08 07 06 05 04 03 02 01 00 If you do not check this check box, data reaches end data, but does not return to start data. [Example] Start Data = 00, End Data = 09 Data flow: 00 01 02 03 04 05 06 07 08 09 If you want to write the input data to AK4563A, click “OK” button. If not, click “Cancel” button. 3. [Write Dialog] : Dialog to write data by mouse operation There are dialogs corresponding to each register. Click the “Write” button corresponding to each register to set up the dialog. If you check the check box, data becomes “H” or “1”. If not, “L” or “0”. If you want to write the input data to AK4563A, click “OK” button. If not, click “Cancel” button. Operation flow Keep the following flow surely. 4. Set up the control program according to explanation above. 5. Click “Port Setup” button. 6. Click “Write default” button. 7. Set up evaluation mode of AK4353. 8. Then set up the dialog and input data. Indication of data Input data is indicated on the register map. Red letter indicates “H” or “1” and blue one indicates “L” or “0”. Blank is the part that is not defined in the datasheet. Attention on the operation If you set up Function1 or Function2 dialog, input data to all boxes. Attention dialog is indicated if you input data or address that is not specified in the datasheet or you click “OK” button before you input data. In that case set up the dialog and input data once more again. These operations does not need if you click “Cancel” button or check the check box. <KM064401> 2006 / 06 - 16 - ASAHI KASEI [AKD4563A] MEASUREMENT RESULTS [Measurement condition] • Measurement unit : Audio Precision, System Two • MCLK : 256fs • BCLK : 64fs • fs : 48kHz • Bit : 16bit • Power Supply : VA=VD=VT=2.5V • Interface : DIR/DIT • Temperature : Room [Measurement Results] Parameter ADC Analog Input Characteristics S/(N+D) (-2.0dB Input) D-Range (A-weighted) S/N (A-weighted) Interchannel Isolation DAC Analog Output Characteristics S/(N+D) D-Range (A-weighted) S/N (A-weighted) Interchannel Isolation Input Pin Result (Lch / Rch) Unit INTL0 / INTR0 INTL1 / INTR1 EXTL / EXTR LIN / RIN INTL0 / INTR0 INTL1 / INTR1 EXTL / EXTR LIN / RIN INTL0 / INTR0 INTL1 / INTR1 EXTL / EXTR LIN / RIN INTL0 / INTR0 INTL1 / INTR1 EXTL / EXTR LIN / RIN 86.0 / 86.0 86.0 / 86.0 86.0 / 86.0 85.6 / 85.6 88.6 / 88.6 88.6 / 88.6 88.6 / 88.6 88.1 / 88.1 88.6 / 88.6 88.6 / 88.6 88.6 / 88.6 88.1 / 88.1 106.8 / 108.4 108.1 / 108.2 109.4 / 106.5 107.4 / 107.5 dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB - 88.0 / 89.0 92.3 / 92.3 92.9 / 92.9 107.8 / 107.0 dB dB dB dB <KM064401> 2006 / 06 - 17 - ASAHI KASEI [AKD4563A] [ADC Plot] AKM AK4563A A D C THD +N vs. Input Level VA=VD =VT=2.5V, fs=48kHz, fin=1kHz -70 -75 -80 d B F S -85 -90 -95 -100 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 dB r Figure 1. THD+N vs. Input Level AKM AK 4563A AD C THD +N vs. Input Frequency V A=VD =VT=2.5V, fs=48kHz, Input=-2.0dBr -70 -75 -80 d B F S -85 -90 -95 -100 20 50 100 200 500 1k 2k 5k 10k 20k Hz Figure 2. THD+N vs. Input Frequency <KM064401> 2006 / 06 - 18 - ASAHI KASEI [AKD4563A] AKM AK4563A A D C Linearity VA=VD =VT=2.5V, fs=48kHz, fin=1kHz +0 -20 -40 d B F S -60 -80 -100 -120 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 +0 dB r Figure 3. Linearity AKM AK4563A AD C Frequency R esponse V A=VD =VT=2.5V, fs=48kHz, Input=-2.0dBr +0 -0.5 -1 -1.5 d B F S -2 -2.5 -3 -3.5 -4 20 50 100 200 500 1k 2k 5k 10k 20k Hz Figure 4. Frequency Response <KM064401> 2006 / 06 - 19 - ASAHI KASEI [AKD4563A] AKM AK4563A AD C C rosstalk V A=VD =VT=2.5V, fs=48kHz, Input=-2.0dBr -90 -95 -100 -105 d B -110 -115 -120 -125 -130 20 50 100 200 500 1k 2k 5k 10k 20k 10k 20k Hz Figure 5. Crosstalk AKM A K4563A ADC FFT Plot VA=VD =VT=2.5V, fs=48kHz, Input=-2.0dBr, fin=1kHz +0 -20 -40 -60 d B F S -80 -100 -120 -140 -160 20 50 100 200 500 1k 2k 5k Hz Figure 6. FFT Plot <KM064401> 2006 / 06 - 20 - ASAHI KASEI [AKD4563A] AKM A K4563A ADC FFT Plot VA=VD =V T=2.5V, fs=48kHz, Input=-60dBr, fin=1kHz +0 -20 -40 -60 d B F S -80 -100 -120 -140 -160 20 50 100 200 500 1k 2k 5k 10k 20k 5k 10k 20k Hz Figure 7. FFT Plot AKM A K4563A ADC FFT Plot VA=VD=VT=2.5V , fs=48kHz, fin=None +0 -20 -40 -60 d B F S -80 -100 -120 -140 -160 20 50 100 200 500 1k 2k Hz Figure 8. FFT Plot <KM064401> 2006 / 06 - 21 - ASAHI KASEI [AKD4563A] [DAC Plot] AKM AK4563A D AC THD +N vs. Input Level VA=VD =VT=2.5V, fs=48kHz, fin=1kHz -70 -75 -80 d B r -85 A -90 -95 -100 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 +0 dB FS Figure 1. THD+N vs. Input Level AKM AK 4563A D AC THD +N vs. Input Frequency VA=VD =VT=2.5V , fs=48kHz, Input=0dB FS -70 -75 -80 d B r -85 A -90 -95 -100 20 50 100 200 500 1k 2k 5k 10k 20k Hz Figure 2. THD+N vs. Input Frequency <KM064401> 2006 / 06 - 22 - ASAHI KASEI [AKD4563A] AKM AK4563A D AC Linearity VA=VD =VT=2.5V, fs=48kHz, fin=1kHz +0 -10 -20 -30 d B r -40 A -60 -50 -70 -80 -90 -100 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 +0 16k 18k 20k dB FS Figure 3. Linearity AKM AK4563A D A C Frequency R esponse VA=VD =VT=2.5V , fs=48kHz, Input=0dB FS +1 + 0.8 + 0.6 + 0.4 d B r + 0.2 A -0.2 +0 -0.4 -0.6 -0.8 -1 2k 4k 6k 8k 10k 12k 14k Hz Figure 4. Frequency Response <KM064401> 2006 / 06 - 23 - ASAHI KASEI [AKD4563A] AKM AK4563A D AC C rosstalk VA=VD =VT=2.5V , fs=48kHz, Input=0dB FS -80 -85 -90 -95 -100 d B -105 -110 -115 -120 -125 -130 20 50 100 200 500 1k 2k 5k 10k 20k 10k 20k Hz Figure 5. Crosstalk AKM A K4563A DAC FFT Plot VA=VD =VT=2.5V, fs=48kHz, Input=0dBFS, fin=1kHz +0 -20 -40 d B r -60 A -100 -80 -120 -140 -160 20 50 100 200 500 1k 2k 5k Hz Figure 6. FFT Plot <KM064401> 2006 / 06 - 24 - ASAHI KASEI [AKD4563A] AKM A K4563A DAC FFT Plot VA =VD =V T=2.5V , fs=48kHz, Input=-60dBFS, fin=1kHz +0 -20 -40 d B r -60 A -100 -80 -120 -140 -160 20 50 100 200 500 1k 2k 5k 10k 20k 5k 10k 20k Hz Figure 7. FFT Plot AKM A K4563A DAC FFT Plot VA =V D=V T=2.5V, fs=48kHz, fin=None +0 -20 -40 d B r -60 A -100 -80 -120 -140 -160 20 50 100 200 500 1k 2k Hz Figure 8. FFT Plot <KM064401> 2006 / 06 - 25 - ASAHI KASEI [AKD4563A] Revision History Date (YY/MM) 2000 / 12 2006 / 06 Manual Revision KM064400 KM064401 Reason Contents First Edition Update Change of a figure & circuit IMPORTANT NOTICE • These products and their specifications are subject to change without notice. Before considering any use or application, consult the Asahi Kasei Microsystems Co., Ltd. (AKM) sales office or authorized distributor concerning their current status. • AKM assumes no liability for infringement of any patent, intellectual property, or other right in the application or use of any information contained herein. • Any export of these products, or devices or systems containing them, may require an export license or other official approval under the law and regulations of the country of export pertaining to customs and tariffs, currency exchange, or strategic materials. • AKM products are neither intended nor authorized for use as critical components in any safety, life support, or other hazard related device or system, and AKM assumes no responsibility relating to any such use, except with the express written consent of the Representative Director of AKM. As used here: (a) A hazard related device or system is one designed or intended for life support or maintenance of safety or for applications in medicine, aerospace, nuclear energy, or other fields, in which its failure to function or perform may reasonably be expected to result in loss of life or in significant injury or damage to person or property. (b) A critical component is one whose failure to function or perform may reasonably be expected to result, whether directly or indirectly, in the loss of the safety or effectiveness of the device or system containing it, and which must therefore meet very high standards of performance and reliability. • It is the responsibility of the buyer or distributor of an AKM product who distributes, disposes of, or otherwise places the product with a third party to notify that party in advance of the above content and conditions, and the buyer or distributor agrees to assume any and all responsibility and liability for and hold AKM harmless from any and all claims arising from the use of said product in the absence of such notification. <KM064401> 2006 / 06 - 26 - A B C DGND D JP1 GND E AGND E E U1 1 LOUT LOUT PDN U2 28 R1 2 ROUT 3 INTL1 4 INTR1 ROUT CCLK INTL1 CSN INTR1 CDTI 27 5 INTL0 CDTO 24 INTR0 6 INTR0 BCLK 23 EXTL AK4563A MCLK 51 R3 51 R4 51 25 INTL0 7 R2 26 D EXTL R5 51 R6 51 8 EXTR LRCK C LIN 9 LIN SDTI 20 RIN 10 RIN SDTO1 19 11 VCOM SDTO0 18 12 AGND VT 17 DGND 16 VD 15 C1 47u 1 SDTO0 + C4 0.1u D2V C7 0.1u VA 14 VREF C9 0.1u PDN 12 Y7 A7 8 CCLK 13 Y6 A6 7 CSN 14 Y5 A5 6 CDTI 15 Y4 A4 5 BCLK 16 Y3 A3 4 MCLK 17 Y2 A2 3 LRCK 18 Y1 A1 2 SDTI 10 GND G2 19 20 VCC G1 1 C2 0.1u 2 C L1 10u 74LVC541 + C5 10u C8 0.1u 13 9 51 SDTO1 + + C6 10u A8 51 + C3 2.2u Y8 CDTO 21 R8 11 D 22 R7 EXTR 51 2VD C10 10u VA VD L2 + B (short) R9 10 VT L3 10u 1 JP2 VT 2 C12 47u 2 C11 47u 2 2VD 1 1 B + D1 1S1588 R10 10k U3A 1 3 74HC14 4 PDN 74HC14 1 H 3 L U3B 2 C13 0.1u 2 SW1 PDN A A Title Size A3 Date: A B C D AKD4563A Document Number Rev AK4563A Monday, May 08, 2006 Sheet E A-1 1 of 3 A B C D E VD PORT1 5 5 6 6 R11 1k DIT VD E VD 4 3 2 1 IN VCC IF GND C14 0.1u E D2 1S1588 1 R16 10k U3C 74HC14 5 H 1 3 L 6 9 C16 0.1u 8 C15 10u C17 0.1u R14 10k R15 1k CSN R18 5.1 R19 470 VD CCLK + U4 1 2 3 4 5 6 7 8 9 10 11 12 2 SW2 DIT R13 10k R17 470 U3D 74HC14 SDTO D R22 51 C18 0.1u MCKO TX DVDD DVSS MCKI BICK SDTI LRCK PDN CSN SCL/CCLK SDA/CDTI DZF NC AVDD AVSS VCOM AOUTL AOUTR CAD0 CAD1 I2C TTL TST 24 23 22 21 20 19 18 17 16 15 14 13 PORT2 10 9 8 7 6 C19 + 10u 1 2 3 4 5 R20 470 CSN CCLK CDTI CDTO CDTI R21 51 U5A SN74LVC07A 2 + 2 R12 10k C20 0.1u C21 10u 1 CDTO CTRL D AK4353 VD CDTI R23 51 ADC DIR ADC X_BCLK C CSN SDTO 1 2 3 4 5 U3E 74HC14 10 9 8 7 6 JP3 X_BCLK SDTO VD ROM R27 11 INV C 2VD C26 0.1u R25 1k R26 1k 4 B R28 1k GND R29 1k LED1 1 U3F 74HC14 2 12 MCLK X1 13 JP11 CLK L4 GND VCC GND OUT 2 2 C31 0.1u DIR + C32 10u LED2 PREM R31 1k C33 A 0.01u C35 0.1u DIR_LRCK DIR_BCLK DIR EXT U7 1 2 3 4 5 6 7 8 9 10 11 12 13 14 C Cd/F1 Cc/F0 Cb/E2 Ca/E1 C0/E0 VD+ DGND RXP RXN FSYNC SCK CS12/FCK U VERF Ce/F2 SDATA ERF M1 M0 VA+ AGND FILT MCK M2 M3 SEL CBL 28 27 26 25 24 23 22 21 20 19 18 17 16 15 + 1 1 10u L5 47u 5 2 M0 R32 1k M2 C27 10u 1M U8A U8B 4 3 2 74HCU04 C34 47n C29 5p JP12 XTE 1 74HCU04 C30 5p A J1 EXT U8C 6 5 74HCU04 CS8412 C36 R30 C28 0.1u M1 1 12.288MHz XTL VERF 1 6 SDTO1 B VD 2 5 5 SD1 VD VD 4 3 2 1 SDTO0 U5C SN74LVC07A SDTI 6 JP10 DIR 6 3 JP8 SD0/1 DIR Title R33 51 Size A3 0.01u Date: A for SN74LVC07A U5B SN74LVC07A SD0 10k + C22 47u C25 0.1u X_LRCK VD JP9 SDTI C24 0.1u for 74HCU04, 74HC14, 74HC4040 fs 74HC4040 DIR_BCLK PORT4 C23 0.1u X_BCLK JP7 SDTO ADC THR 9 7 6 5 3 2 4 13 12 14 15 1 PORT3 MCLK BCLK LRCK SDTI ROM BCLK LRCK 10 RST Q1 Q2 Q3 Q4 Q5 Q6 Q7 Q8 Q9 Q10 Q11 Q12 JP5 BCLK DIR JP6 PHASE CLK 11 32fs X_LRCK DIR_LRCK 10 R24 51 64fs U6 CCLK JP4 LRCK B C D AKD4563A Document Number Rev Interface Monday, May 08, 2006 Sheet E A-1 2 of 3 A B C D E E E JP13 C37 10u + R34 ( OPEN ) INT1 INT0 EXT LIN + LIN INTL1 C38 10u D INTL0 C39 10u + J2 LIN + EXTL C41 10u C40 22u C INTR1 C44 10u + RIN C42 10u + R38 ( OPEN ) INT1 INT0 EXT RIN + JP14 J3 LOUT R37 220 J5 ROUT D R36 10k LIN + J4 RIN R35 220 LOUT ROUT C43 22u INTR0 C45 10u C R39 10k + EXTR C46 10u + RIN VD M2 M1 M0 B SW3 1 2 3 U8D 74HCU04 6 5 4 8 9 U5D SN74LVC07A 8 9 U5E SN74LVC07A 11 B 10 MODE U8E 74HCU04 RP1 3 2 1 10 M2 M1 M0 11 U5F SN74LVC07A 12 13 U8F 74HCU04 47k 12 13 A A Title Size A3 Date: A B C D AKD4563A Document Number Rev Input/Output Monday, May 08, 2006 Sheet E A-1 3 of 3