AKM AKD4569

ASAHI KASEI
[AKD4569]
AKD4569
Evaluation board Rev.A for AK4569
GENERAL DESCRIPTION
The AKD4569 is an evaluation board for the AK4569, the Audio CODEC with IPGA and HP-amp. The
AKD4569 can evaluate A/D and D/A in addition to A/D to D/A loopback mode. The AKD4569 also has the
digital audio interface and can achieve the interface with digital audio systems via opt-connector.
n Ordering guide
AKD4569
---
Evaluation board for AK4569
(Cable for connecting with printer port of IBM-AT compatible PC and control
software are packed with this. This control software does not support Windows NT.)
FUNCTION
o Compatible with 2 types of interface
- DIR(AK4116)/DIT(AK4114) with optical input/output
- Direct interface with AKM’s A/D,D/A converter evaluation boards by 10pin header
o 10pin header for serial control interface
+3V
GND
Control Data
AINL
10pin Header
AINR
EXTCLK
AK4116(DIR)
LIN/RIN/MIN
Opt In
AK4569
MOUT
HPL
AK4114(DIT)
Opt Out
Headphone
HPR
DSP
10pin Header
Figure 1. AKD4569 Block Diagram
* Circuit diagram and PCB layout are attached at the end of this manual.
<KM074000>
2004/02
-1-
ASAHI KASEI
[AKD4569]
n Operation sequence
1) Set up the power supply lines.
Name
+5V
Color
Red
Voltage
5V
HVDD
AVDD
Orange
Orange
3V
3V
DVDD
Orange
3V
VD
Orange
3V
AGND
DGND
Black
Black
0V
0V
Contents
Regulator
Attention
JP15 should be shorted and HVDD jack should be
open when the regulator is used.
(Default: JP15 is open.)
AK4569 Headphone amp
JP15 should be open when the regulator is NOT used.
AK4569 Analog
JP4 should be shorted and AVDD jack should be open
when AVDD is supplied from HVDD.
(Default: JP4 is shorted.)
AK4569 Digital
JP14 should be shorted and DVDD jack should be
open when DVDD is supplied from HVDD.
(Default: JP14 is shorted.)
Logic Parts
JP13 should be shorted and VD jack should be open
when VD is common with DVDD.
(Default: JP13 is shorted.)
Analog ground
AGND jack should be always supplied.
Digital ground
DGND jack can be open if JP1 is shorted.
(Default: JP1 is shorted.)
Table 1. Set up of power supply lines
Each supply line should be distributed from the power supply unit.
2) Set-up the evaluation modes, jumper pins and DIP switches. (See the followings.)
3) Power on.
The AK4569 should be reset once bringing SW1(4569_PDN) “L” upon power-up.
4) Serial control
10
The AK4569 can be controlled via the printer port (parallel port) of
IBM-AT compatible PC. Connect PORT1(uP-I/F) with PC by 10-line
flat cable packed with the AKD4569.
Take care of the direction of connector. There is a mark at pin#1.
The pin layout of PORT1 is as Figure 2.
GND
PORT1
uP-I/F
9
CSN
GND
CCLK
GND
CDTI
GND
CDTO
GND
2
NC
1
Figure 2. Pin Layout of PORT1
<KM074000>
2004/02
-2-
ASAHI KASEI
[AKD4569]
n Evaluation mode
Applicable evaluation modes
(1) Loopback mode
(2) Evaluation of A/D part
(3) Evaluation of D/A part (Default)
(4) All interface signals including master clock are fed externally.
(1),(2),(4)
Analog Input
(3),(4)
(2)
Digital Output
Printer Port
PORT4
TOTX141
J1
AINL
PORT1
µP I/F
J2
AINR
AVDD
PC
(4)
DGND AGND
Digital Input
(3)
PORT2
TORX141
Analog Input
(1),(3),(4)
Analog Output
J6
HP
PORT3
DSP
DSP
J3
L/R/MIN
J4
MOUT
J5
HPL
VD
DVDD HVDD
J7
HPR
REG
0V
3V
Power Supply
Unit
Figure 3. Connection diagram for each evaluation mode
<Setup of jumper pins, signal I/O connector and DIR for each evaluation mode>
JP6 (MCLK)
JP7 (SDTI)
JP8 (BICK)
JP9 (LRCK)
Mode (1)
short
ADC side
short
short
Mode (2)
short
Don’t care
short
short
Signal input
J1(AINL), J2(AINR)
J1(AINL), J2(AINR)
Signal output
J4(MOUT), J5(HPL),
J7(HPR), J6(HP)
PORT4(TOTX141)
AK4116(DIR)
Clock mode
(CM1-0 bit)
X’tal mode
(CM1-0 = “01”)
X’tal mode
(CM1-0 = “01”)
Mode (3)
short
DIR side
short
short
PORT2(TORX141),
J3(LIN/RIN/MIN)
J4(MOUT), J5(HPL),
J7(HPR), J6(HP)
Mode (4)
open
open
open
open
J4(MOUT), J5(HPL),
J7(HPR), J6(HP)
PLL mode
(CM1-0 = “00”)
X’tal mode
(CM1-0 = “01”)
PORT3(DSP)
Table 2. Setup of jumper pins etc. for each evaluation mode
<KM074000>
2004/02
-3-
ASAHI KASEI
[AKD4569]
<Details for each evaluation mode>
(1) Loopback mode
MCLK, BICK and LRCK are fed from on-board DIR (AK4116). The clock source can be selected from on-board
X’tal oscillator or external master clock through a BNC connector (J8: EXTCLK).
CM1-0 bit (Addr=01H) of AK4116 should be set to “01” by the control software “akd4116-1.exe” packed with
AKD4569.
(2) Evaluation of ADC
AK4114 (DIT) generates audio bi-phase signal from received data and which is output through optical connector
(PORT4: TOTX141). It is possible to connect AKM’s D/A converter evaluation boards or the digital-amplifier
which equips DIR input. SW3 is used to set the interface format and clock mode of AK4114 (see DIP-SW set-up).
CM1-0 bit (Addr=01H) of AK4116 should be set to “01” by the control software “akd4116-1.exe” packed with
AKD4569.
(3) Evaluation of DAC (Default)
On-board DIR (AK4116) generates MCLK, BICK, LRCK and SDATA from the received data through optical
connector (TORX141). Used for the evaluation using CD test disk. Nothing should be connected to
PORT3(DSP).
(4) Feeding all signals externally
AK4569 can be evaluated by connecting DSP to PORT3(DSP).
n Other jumper pins setup
[JP2] (AINL): ADC Lch input select (Default: AINL1)
[JP3] (AINR): ADC Rch input select (Default: AINR1)
[JP5] (LIN/RIN/MIN): External analog input select (Default: MIN)
[JP10] (HPL): Headphone Lch output
Short: Output from J5(BNC) (Default)
Open: Output from J6(Headphone jack)
[JP11] (HPR): Headphone Rch output
Short: Output from J7(BNC) (Default)
Open: Output from J6(Headphone jack)
[JP12] (EXTCLK): Clock source
Short: External clock is input via J8(EXTCLK). On-chip X’tal (X1) should be removed.
Open: On-chip X’tal (X1) is used. (Default)
<KM074000>
2004/02
-4-
ASAHI KASEI
[AKD4569]
n DIP-SW set-up (setup for AK4114)
No.
1
2
3
4
5
Name
DIF0
OCKS1
Default
OFF
OFF
NC
OFF
Contents
AK4114 interface format (See Table 4.)
AK4114 clock mode (See Table 5.)
Don’t care
Table 3. SW3 setup (1=ON, 0=OFF)
No.1
(DIF0)
Format
0
24bit, Left jutified
Default
1
I2S
Table 4. AK4114 interface format setup (1=ON, 0=OFF)
No.2
(OCKS1)
0
256fs
Default
1
512fs
Table 5. AK4114 clock mode setup (1=ON, 0=OFF)
Clock mode
n The function of the toggle SW
[SW1](4569_PDN): Resets the AK4569. Keep “H” during normal operation.
[SW2](4116_PDN): Resets the AK4116(DIR). Keep “H” during normal operation.
[SW3](4114_PDN): Resets the AK4114(DIT). Keep “H” during normal operation.
n The indication content for LED
LED turns on when each output goes “H”.
[LE1] (INT1): INT1 of AK4116(DIR)
[LE2] (INT0): INT0 of AK4116(DIR)
<KM074000>
2004/02
-5-
ASAHI KASEI
[AKD4569]
AK4569 Control Program operation manual
n Set-up of evaluation board and control software
1. Set up the AKD4569 according to above mentioned setting.
2. Connect IBM-AT compatible PC with AKD4569 by 10-line type flat cable (packed with AKD4569). Take care of
the direction of 10pin header. (Please install the driver in the floppy-disk when this control software is used on
Windows 2000/XP. Please refer “Installation Manual of Control Software Driver by AKM device control software”.
In case of Windows95/98/ME, this installation is not needed. This control software does not operate on Windows
NT.)
3. Insert the CD-ROM labeled “AK4569 Evaluation Kit” into the CD-ROM drive.
4. Access the CD-ROM drive and double-click the icon of “akd4569.exe” to set up the control program.
5. Then please evaluate according to the followings.
n Operation flow
Keep the following flow.
1. Set up the control program.
2. Click “Port Setup” button.
3. Then set up the dialog and input data.
n Explanation of each buttons
1. [Port Setup] :
set up the printer port.
2. [Write default] : initialize the register of AK4569.
3. [Function1] :
Dialog to write data by keyboard operation.
4. [Function2] :
Dialog to evaluate IPGA and ATTL/ATTR/ATTM.
5. [Write] : write data to each register.
<KM074000>
2004/02
-6-
ASAHI KASEI
[AKD4569]
n Explanation of each dialog
1. [Function1 Dialog] : Dialog to write data by keyboard operation
Address Box:
Data Box:
Input register address in 2 figures of hexadecimal.
Input register data in 2 figures of hexadecimal.
If you want to write the input data to AK4569, click “OK” button. If not, click “Cancel” button.
2. [Function2 Dialog] : Dialog to evaluate IPGA and ATTL/ATTR/ATTM
This dialog corresponds to only addr=05H, 0AH, 0BH and 0CH.
Address Box:
Input register address in 2 figures of hexadecimal.
Start Data Box:
Input start data in 2 figures of hexadecimal.
End Data Box:
Input end data in 2 figures of hexadecimal.
Interval Box:
Data is written to AK4569 by this interval.
Step Box:
Data changes by this step.
Mode Select Box:
If you check this check box, data reaches end data, and returns to start data.
[Example] Start Data = 00, End Data = 09
Data flow: 00 01 02 03 04 05 06 07 08 09 09 08 07 06 05 04 03 02 01 00
If you do not check this check box, data reaches end data, but does not return to start data.
[Example] Start Data = 00, End Data = 09
Data flow: 00 01 02 03 04 05 06 07 08 09
If you want to write the input data to AK4569, click “OK” button. If not, click “Cancel” button.
3. [Write Dialog] : Dialog to write data by mouse operation
There are dialogs corresponding to each register.
Click the “Write” button corresponding to each register to set up the dialog. If you check the check box, data
becomes “H” or “1”. If not, “L” or “0”.
If you want to write the input data to AK4569, click “OK” button. If not, click “Cancel” button.
n Indication of data
Input data is indicated on the register map. Red letter indicates “H” or “1” and blue one indicates “L” or “0”. Blank is the
part that is not defined in the datasheet.
n Attention on the operation
If you set up Function1 or Function2 dialog, input data to all boxes. Attention dialog is indicated if you input data or
address that is not specified in the datasheet or you click “OK” button before you input data. In that case set up the dialog
and input data once more again. These operations does not need if you click “Cancel” button or check the check box.
<KM074000>
2004/02
-7-
ASAHI KASEI
[AKD4569]
AKD4116 Control Program operation manual
n Set-up of evaluation board and control software
1. Set up the AKD4569 according to above mentioned setting.
2. Connect IBM-AT compatible PC with AKD4569 by 10-line type flat cable (packed with AKD4569). Take care of
the direction of 10pin header. (Please install the driver in the floppy-disk when this control software is used on
Windows 2000/XP. Please refer “Installation Manual of Control Software Driver by AKM device control software”.
In case of Windows95/98/ME, this installation is not needed. This control software does not operate on Windows
NT.)
3. Insert the CD-ROM labeled “AK4569 Evaluation Kit” into the CD-ROM drive.
4. Access the CD-ROM drive and double-click the icon of “akd4116_1.exe” and “akd4116_2.exe” to set up the control
program.
5. Then please evaluate according to the follows.
n Operation flow
Keep the following flow.
1.
2.
3.
Set up the control program.
Click “Port Setup” button.
Then set up the dialog and input data.
n Explanation of each buttons
1.
2.
3.
4.
5.
[Port Setup] : set up the printer port.
[Write default] : initialize the register of AK4116.
[All read] :
read all registers.
[Read] : read data from each register.
[Write] :
write data to each register.
If you want to write the input data to AK4116, click “OK” button. If not, click “Cancel” button.
n Indication of data
Input data is indicated on the register map. Red letter indicates “H” or “1” and blue one indicates “L” or “0”. Blank is the
part that is not defined in the datasheet.
End.
<KM074000>
2004/02
-8-
ASAHI KASEI
[AKD4569]
MEASUREMENT RESULTS
1) ADC part
[Measurement condition]
• Measurement unit : Audio Precision System two Cascade
• MCLK
: 256fs
• BICK
: 64fs
• fs
: 48kHz
• BW
: 10Hz∼20kHz
• Bit
: 20bit
• Power Supply
: AVDD=DVDD=HVDD=3V
• Interface
: DIT
• Temperature
: Room
Parameter
S/(N+D)
DR
S/N
Input signal
1kHz, -1dB
1kHz, -60dB
No signal
Measurement filter
20kLPF
20kLPF, A-weighted
20kLPF, A-weighted
Results
85.1dB
88.6dB
88.6dB
2) DAC part
[Measurement condition]
• Measurement unit : Audio Precision System two Cascade
• MCLK
: 256fs
• BICK
: 64fs
• fs
: 48kHz
• BW
: 10Hz∼20kHz
• Bit
: 20bit
• Power Supply
: AVDD=DVDD=HVDD=3V
• Interface
: DIR
• Temperature
: Room
Parameter
S/(N+D)
DR
S/N
Input signal
1kHz, 0dB
1kHz, -60dB
“0” data
Measurement filter
20kLPF
22kLPF, A-weighted
22kLPF, A-weighted
<KM074000>
HP-amp
69.5dB
90.8dB
91.2dB
MOUT
85.7dB
90.3dB
90.9dB
2004/02
-9-
ASAHI KASEI
[AKD4569]
n Plots
(1) ADC part
[Measurement condition]
• Measurement unit : Audio Precision, System two, Cascade
• MCLK
: 256fs
• BICK
: 64fs
• fs
: 48kHz
• BW
: 10Hz∼20kHz
• Bit
: 20bit
• Power Supply
: AVDD=DVDD=HVDD=3V
• Interface
: DIT
• Temperature
: Room
Figure 4. FFT (1kHz, -1dBFS input)
Figure 5. FFT (1kHz, -60dBFS input)
Figure 6. FFT (Noise floor)
Figure 7. THD+N vs Input Level (fin=1kHz)
Figure 8. THD+N vs fin (Input Level=-1dBFS)
Figure 9. Linearity (fin=1kHz)
Figure 10. Frequency Response (Input Level=-1dBFS)
Figure 11. Crosstalk (Input Level=-1dBFS)
<KM074000>
2004/02
- 10 -
ASAHI KASEI
[AKD4569]
(ADC)
AKM
AK4569 ADC FFT (fs=44.1kHz, fin=1kHz, -1dBr Input)
FFT point=16384, Avg=8, window=Equiripple
+0
-20
-40
-60
d
B
F
S
-80
-100
-120
-140
-160
-180
20
50
100
200
500
1k
2k
5k
10k
20k
5k
10k
20k
Hz
Color
Line Style
Thick
Data
Axis
Red
Blue
Solid
Solid
3
3
Fft.Ch.1 Ampl
Fft.Ch.2 Ampl
Left
Left
last.at2c
Figure 4. FFT (1kHz, -1dBFS input)
FFT points=16384, Avg=8, Window=Equiripple
AK4569 ADC FFT (fs=44.1kHz, fin=1kHz, -60dBr
Input) window=Equiripple
FFT point=16384, Avg=8,
AKM
+0
-20
-40
-60
d
B
F
S
-80
-100
-120
-140
-160
-180
20
50
100
200
500
1k
2k
Hz
Color
Line Style
Thick
Data
Axis
Red
Blue
Solid
Solid
3
3
Fft.Ch.1 Ampl
Fft.Ch.2 Ampl
Left
Left
last.at2c
Figure 5. FFT (1kHz, -60dBFS input)
FFT points=16384, Avg=8, Window=Equiripple
<KM074000>
2004/02
- 11 -
ASAHI KASEI
[AKD4569]
(ADC)
AKM
AK4569 ADC FFT (No signal Input)
FFT point=16384, Avg=8, window=Equiripple
+0
-20
-40
-60
d
B
F
S
-80
-100
-120
-140
-160
-180
20
50
100
200
500
1k
2k
5k
10k
20k
Hz
Color
Line Style
Thick
Data
Axis
Red
Blue
Solid
Solid
3
3
Fft.Ch.1 Ampl
Fft.Ch.2 Ampl
Left
Left
last.at2c
Figure 6. FFT (Noise floor)
FFT points=16384, Avg=8, Window=Equiripple
<KM074000>
2004/02
- 12 -
ASAHI KASEI
[AKD4569]
(ADC)
AKM
AK4569 DAC THD+N vs.Input Level (fs=44.1kHz, fin=1kHz)
-60
-62.5
-65
-67.5
-70
-72.5
-75
d
B
F
S
-77.5
-80
-82.5
-85
-87.5
-90
-92.5
-95
-97.5
-100
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
dBr
Color
Line Style
Thick
Data
Axis
Red
Blue
Solid
Solid
3
3
DSP Anlr.THD+N Ampl A
DSP Anlr.THD+N Ampl B
Left
Left
last.at2c
Figure 7. THD+N vs Input Level (fin=1kHz)
AKM
AK4569 ADC THD+N vs. fin (fs=44.1kHz, -1dBFS Input)
-60
-65
-70
-75
d
B
F
S
-80
-85
-90
-95
-100
20
50
100
200
500
1k
2k
5k
10k
20k
Hz
Color
Line Style
Thick
Data
Axis
Red
Blue
Solid
Solid
3
3
DSP Anlr.THD+N Ampl A
DSP Anlr.THD+N Ampl B
Left
Left
last.at2c
Figure 8. THD+N vs fin (Input Level=-1dBFS)
<KM074000>
2004/02
- 13 -
ASAHI KASEI
[AKD4569]
(ADC)
AKM
AK4569 DAC Linearity (fs=44.1kHz, fin=1kHz)
+0
-10
-20
-30
-40
d
B
F
S
-50
-60
-70
-80
-90
-100
-110
-120
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
+0
dBr
Color
Line Style
Thick
Data
Axis
Red
Blue
Solid
Solid
3
3
DSP Anlr.Bandpass A
DSP Anlr.Bandpass B
Left
Left
last.at2c
Figure 9. Linearity (fin=1kHz)
AKM
AK4569 ADC Frequency Response (fs=48kHz, -1dBFS Input)
+0
-0.2
-0.4
-0.6
-0.8
-1
d
B
F
S
-1.2
-1.4
-1.6
-1.8
-2
-2.2
-2.4
20
50
100
200
500
1k
2k
5k
10k
20k
Hz
Color
Line Style
Thick
Data
Axis
Red
Blue
Solid
Solid
3
3
DSP Anlr.Ampl A
DSP Anlr.Ampl B
Left
Left
last.at2c
Figure 10. Frequency Response (Input Level=-1dBFS)
<KM074000>
2004/02
- 14 -
ASAHI KASEI
[AKD4569]
(ADC)
AK4569 ADC Crosstalk (fs=44.1kHz, fin=1kHz, -1dBFS
Input)
[email protected];Lch--->Rch,
[email protected];Rch--->Lch
AKM
-70
-75
-80
-85
-90
-95
d
B
-100
-105
-110
-115
-120
-125
-130
20
50
100
200
500
1k
2k
5k
10k
20k
Hz
Color
Line Style
Thick
Data
Axis
Red
Magenta
Solid
Solid
3
3
DSP Anlr.Crosstalk A
DSP Anlr.Crosstalk B
Left
Left
last.at2c
Figure 11. Crosstalk (Input Level=-1dBFS)
<KM074000>
2004/02
- 15 -
ASAHI KASEI
[AKD4569]
(2) DAC part (HPL, HPR pins)
[Measurement condition]
• Measurement unit : Audio Precision, System two, Cascade
• MCLK
: 256fs
• BICK
: 64fs
• fs
: 48kHz
• BW
: 10Hz∼20kHz
• Bit
: 20bit
• Power Supply
: AVDD=DVDD=HVDD=3V
• Interface
: DIR
• Temperature
: Room
Figure 12. FFT (1kHz, 0dBFS input)
Figure 13. FFT (1kHz, -60dBFS input)
Figure 14. FFT (Noise floor)
Figure 15. FFT (Outband noise)
Figure 16. THD+N vs Input Level (fin=1kHz)
Figure 17. THD+N vs fin (Input Level=0dBFS)
Figure 18. Linearity (fin=1kHz)
Figure 19. Frequency Response (Input Level=0dBFS)
Figure 20. Crosstalk (Input Level=0dBFS)
<KM074000>
2004/02
- 16 -
ASAHI KASEI
[AKD4569]
(DAC)
AKM
AK4569 DAC FFT (fs=44.1kHz, fin=1kHz, 0dBFS Input)
FFT point=16384, Avg=8, window=Equiripple
+0
-20
-40
-60
d
B
r
-80
A
-100
-120
-140
-160
20
50
100
200
500
1k
2k
5k
10k
20k
5k
10k
20k
Hz
Color
Line Style
Thick
Data
Axis
Red
Blue
Solid
Solid
3
3
Fft.Ch.1 Ampl
Fft.Ch.2 Ampl
Left
Left
last.at2c
Figure 12. FFT (1kHz, 0dBFS input)
FFT points=16384, Avg=8, Window=Equiripple
AKM
AK4569 DAC FFT (fs=44.1kHz, fin=1kHz, -60dBFS Input)
FFT point=16384, Avg=8, window=Equiripple
+0
-20
-40
-60
d
B
r
-80
A
-100
-120
-140
-160
20
50
100
200
500
1k
2k
Hz
Color
Line Style
Thick
Data
Axis
Red
Blue
Solid
Solid
3
3
Fft.Ch.1 Ampl
Fft.Ch.2 Ampl
Left
Left
last.at2c
Figure 13. FFT (1kHz, -60dBFS input)
FFT points=16384, Avg=8, Window=Equiripple
<KM074000>
2004/02
- 17 -
ASAHI KASEI
[AKD4569]
(DAC)
AKM
AK4569 DAC FFT (No data Input)
FFT point=16384, Avg=8, window=Equiripple
+0
-20
-40
-60
d
B
r
-80
A
-100
-120
-140
-160
20
50
100
200
500
1k
2k
5k
10k
20k
Hz
Color
Line Style
Thick
Data
Axis
Red
Blue
Solid
Solid
3
3
Fft.Ch.1 Ampl
Fft.Ch.2 Ampl
Left
Left
last.at2c
Figure 14. FFT (Noise floor)
FFT points=16384, Avg=8, Window=Equiripple
AKM
AK4569 DAC FFT (Out-band-noise)
FFT point=16384, Avg=8, window=Equiripple
+0
-20
-40
-60
d
B
r
-80
A
-100
-120
-140
-160
90
200
500
1k
2k
5k
10k
20k
50k
100k
Hz
Color
Line Style
Thick
Data
Axis
Red
Blue
Solid
Solid
3
3
Fft.Ch.1 Ampl
Fft.Ch.2 Ampl
Left
Left
last.at2c
Figure 15. FFT (Outband noise)
FFT points=16384, Avg=8, Window=Equiripple
<KM074000>
2004/02
- 18 -
ASAHI KASEI
[AKD4569]
(DAC)
AKM
AK4569 DAC THD+N vs. Input Lever (fs=44.1kHz, fin=1kHz)
-40
-45
-50
-55
-60
d
B
r
-65
A
-75
-70
-80
-85
-90
-95
-100
-140
-130
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
+0
dBFS
Color
Line Style
Thick
Data
Axis
Red
Blue
Solid
Solid
3
3
Anlr.THD+N Ampl
Anlr.THD+N Ampl
Left
Left
last.at2c
Figure 16. THD+N vs Input Level (fin=1kHz)
AKM
AK4569 DAC THD+N vs. Input Frequency (fs=44.1kHz,fin=1kHz, Input Level=0dBFS)
-40
-45
-50
-55
-60
d
B
r
-65
A
-75
-70
-80
-85
-90
-95
-100
20
50
100
200
500
1k
2k
5k
10k
20k
Hz
Color
Line Style
Thick
Data
Axis
Red
Blue
Solid
Solid
3
3
Anlr.THD+N Ampl
Anlr.THD+N Ampl
Left
Left
last.at2c
Figure 17. THD+N vs fin (Input Level=0dBFS)
<KM074000>
2004/02
- 19 -
ASAHI KASEI
[AKD4569]
(DAC)
AKM
AK4569 DAC Linearity (fs=44.1kHz,fin=1kHz)
+0
-10
-20
-30
-40
d
B
r
-50
A
-70
-60
-80
-90
-100
-110
-120
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
+0
dBFS
Color
Line Style
Thick
Data
Axis
Red
Blue
Solid
Solid
3
3
Anlr.Bandpass
Anlr.Bandpass
Left
Left
last.at2c
Figure 18. Linearity (fin=1kHz)
AKM
AK4569 DAC Frequency Response (fs=44.1kHz,Input Level=0dB)
+0.5
+0.4
+0.3
+0.2
d
B
r
A
+0.1
+0
-0.1
-0.2
-0.3
-0.4
-0.5
2k
4k
6k
8k
10k
12k
14k
16k
18k
20k
Hz
Color
Line Style
Thick
Data
Axis
Red
Blue
Solid
Solid
3
3
Anlr.Ampl
Anlr.Ampl
Left
Left
last.at2c
Figure 19. Frequency Response (Input Level=0dBFS)
<KM074000>
2004/02
- 20 -
ASAHI KASEI
[AKD4569]
(DAC)
AKM
AK4569 DAC Crosstalk (fs=44.1kHz, Input Level=0dB)
[email protected] Lch--->Rch, [email protected] Rch--->Lch
+0
-10
-20
-30
-40
-50
d
B
-60
-70
-80
-90
-100
-110
-120
20
50
100
200
500
1k
2k
5k
10k
20k
Hz
Color
Line Style
Thick
Data
Axis
Red
Blue
Solid
Solid
3
3
Anlr.Crosstalk
Anlr.Crosstalk
Left
Left
last.at2c
Figure 20. Crosstalk (Input Level=0dBFS)
<KM074000>
2004/02
- 21 -
ASAHI KASEI
[AKD4569]
IMPORTANT NOTICE
• These products and their specifications are subject to change without notice. Before considering
any use or application, consult the Asahi Kasei Microsystems Co., Ltd. (AKM) sales office or
authorized distributor concerning their current status.
• AKM assumes no liability for infringement of any patent, intellectual property, or other right in the
application or use of any information contained herein.
• Any export of these products, or devices or systems containing them, may require an export license
or other official approval under the law and regulations of the country of export pertaining to
customs and tariffs, currency exchange, or strategic materials.
• AKM products are neither intended nor authorized for use as critical components in any safety, life
support, or other hazard related device or system, and AKM assumes no responsibility relating to
any such use, except with the express written consent of the Representative Director of AKM. As
used here:
(a) A hazard related device or system is one designed or intended for life support or maintenance
of safety or for applications in medicine, aerospace, nuclear energy, or other fields, in which its
failure to function or perform may reasonably be expected to result in loss of life or in significant
injury or damage to person or property.
(b) A critical component is one whose failure to function or perform may reasonably be expected to
result, whether directly or indirectly, in the loss of the safety or effectiveness of the device or
system containing it, and which must therefore meet very high standards of performance and
reliability.
• It is the responsibility of the buyer or distributor of an AKM product who distributes, disposes of, or
otherwise places the product with a third party to notify that party in advance of the above content
and conditions, and the buyer or distributor agrees to assume any and all responsibility and liability
for and hold AKM harmless from any and all claims arising from the use of said product in the
absence of such notification.
<KM074000>
2004/02
- 22 -
5
4
3
2
1
JP1
Digital Ground
Analog Ground
J1
AINL
C1
+
GND
R2 R3 R4
47k 47k 47k
Logic_3V
R1
(open)
AVDD
JP2
AINL
JP3
AINR
JP4
HVDD
HVDD-AVDD
+ C2
47u
J2
AINR
C3
+
470
470
470
51
AINR2
R5
R6
R7
R8
AINR1
CSN
CCLK
CDTI
CDTO
AINL2
PORT1
10
9
8
7
6
AINL1
1
2
3
4
5
D
1u
(+3V)
1u
D
R9
(open)
uP-I/F
3
CCLK
4
4
CDTI
2 X1
12.288MHz
5
100
SDTI
R26
100
SDTO
22
24
23
22
17
MUTET
16
HPL
15
6
MCLK
7
BICK
7
C
0.1u
C11
4.7u
R18
220
+C14
1u
R20
10k
16
15
R23 C15
6.8 100u
28pin_3
J5
HPL
JP10
HPL
C16
0.1u
C19
10u
MCLK
BICK
LRCK
SDTI
SDTO
R25
16
C17
0.1u
C20
10u
J6
HP
9
B
R27 C24
6.8 100u
J7
HPR
+
JP11
HPR
C25 C26
0.1u 0.1u
R28
16
JP12
EXTCLK
HVDD
(+3V for AK4116, AK4114, Logic)
(+3V)
VD
PORT2
VCC 3
GND 2
OUT 1
TORX141
JP13
C27
+ C28
47u
DVDD-VD
R30
10
+ C29
47u JP14
HVDD-DVDD
HVDD
JP15
+ C30
47u
REG
3
OUT
C32
0.1u
IN
(+5V)
REG
1
C33
0.1u
+
C31
47u
2
0.1u
T1
3V Regulator
(+3V)
DVDD
GND
R29
5.1
L1
47u
J4
MOUT
17
for74HC14, 74LVC541
Logic_3V
R14
(open)
LIN/RIN/MIN
5
4
3
2
23
MOUT
6
CN7
28pin_2
1
CN8
20pin_1
+
25
26
LRCK
5
8
B
C21 C22
5p
5p
+
C23
10u
R24
25
18
+
C18
0.1u
26
18
28pin_1
5
4
3
2
1
1
27
MIN
AK4569
J3
LIN/RIN/MIN
C10
+
BICK
VCOM
100
AVSS
R22
AINR2
MCLK
AINL2
100
AINL1
R21
RIN
19
19
8
20pin_2
LRCK
20
JP5
+
JP9
LRCK
100
LIN
HPR
6
R17
CSN
LIN
RIN
MIN
20
14
JP8
BICK
CDTI
2
3
13
7
100
21
HVDD
LRCK
6
G1
G2
74LVC541
R16
VREF
14
7
1
19
CCLK
21
PDN
13
BICK
ADC
DIR
100
C9
4.7u
CN4
1
DVSS
8
R15
2
11
8
XTO
XTI
RX0
20pin_4
SDTO
JP7
SDTI
CSN
AINR1
28
11
12
11
CDTO
12
CDTI
13
AVDD
DVSS
+
C12 C13
10u 0.1u
AK4116
9
100
+
R
20
DAUX
9
R13
U2
1
DVDD
19
R19 12k
19
10
PDN
SDTO
AVSS
MCKO
100
10
18
JP6
MCLK
10
18
17
16
15
14
13
12
11
R12
9
PDN
18
CN6
2
3
4
5
6
7
8
9
4569_PDN
U3
A1
Y1
A2
Y2
A3
Y3
A4
Y4
A5
Y5
A6
Y6
A7
Y7
A8
Y8
10
17
20
14
INT0
17
DVDD
16
CSN
16
CCLK
15
INT1
CN5
4116_PDN
13
CN3
U4
C
14
15
3
74HC14
SDTI
4
12
INT0
24
1k
C5
2.2u
C7
0.1u
C8
0.1u
AVDD
U1B
HVSS
74HC14
LE2
12
INT1
R11
C4
10u
C6
0.1u
11
1k
Logic_3V
1
+
LE1
+
U1A
CN2
20pin_3
R10
2
27
28
CN1
28pin_4
R31
470
A
J8
EXTCLK
5
U1C
A
6
74HC14
R32
(open)
Title
Size
Document Number
AKD4569
Date:
5
4
3
2
Rev
AK4569
A3
Friday, February 20, 2004
Sheet
1
A
1
of
2
5
4
Logic_3V
D1
1S1588
D
2
1
R33
10k
9
L
3
H
D
U1D
8
4569_PDN
74HC14
C34
0.1u
SW1
4566_PDN
Normally H
11
L
C35
10u
R34
10k
H
10
C36
0.1u
4116_PDN
C37
4.7u
74HC14
C38
0.1u
SW2
4116_PDN
+
C
U1E
+
Logic_3V
D2
1S1588
Logic_3V
C39
0.1u
R35
18k
1
2
3
4
5
DIF0
R36
10k
13
L
H
SW4
4114_PDN
U1F
12
4114_PDN
74HC14
C40
0.1u
RX3
AVSS
RX2
TEST1
RX1
AVSS
RX0
AVSS
VCOM
R
AVDD
INT1
IPS0
AVSS
DIF0
TEST2
DIF1
AVSS
DIF2
IPS1
P/S
XTL0
XTL1
VIN
AK4114
RP1
INT0
OCKS0
OCKS1
CM1
CM0
PDN
XTI
XTO
DAUX
MCKO2
BICK
SDTO
TVDD
DVSS
TX0
TX1
BOUT
COUT
UOUT
VOUT
DVDD
DVSS
MCKO1
LRCK
Logic_3V
D3
1S1588
1
2
3
4
5
6
7
8
9
10
11
12
48
47
46
45
44
43
42
41
40
39
38
37
Normally H
U5
36
35
34
33
32
31
30
29
28
27
26
25
OCKS1
4114_PDN
MCLK
B
DIF
MCLK
NC
NC
NC
C
ON
I2S
512fs
OFF
MSB
256fs
DIT(4114)
DIF0
OCKS1
47k
SDTO
BICK
LRCK
MCLK
BICK
LRCK
SDTI
Logic_3V
C41
0.1u
C42
0.1u
+
10
9
8
7
6
5
4
3
2
1
13
14
15
16
17
18
19
20
21
22
23
24
Normally H
SW3
R37
R38
R39
R40
R41
100
100
100
100
10k
MCLK
BICK
LRCK
SDTI
VD
1
2
3
4
5
PORT3
10 GND
GND
9
NC
8
NC
7
6 SDTO
B
SDTO
DSP
C43
10u
Logic_3V
PORT4
IN 3
VCC 2
GND 1
TOTX141
Logic_3V
C44
0.1u
A
A
Title
Size
Document Number
AKD4569
Interface
A3
Date:
5
4
3
2
Friday, February 20, 2004
Sheet
1
Rev
A
2
of
2