AKM AKD4588

ASAHI KASEI
[AKD4588]
AKD4588
Evaluation board Rev.C for AK4588
FEATURE
The AKD4588 is an evaluation board for the AK4588, a single chip 24bit CODEC that includes two
channels of ADC and eight channels of DAC with internal DIR, DIT. The AKD4588 has the interface with
AKM’s A/D converter evaluation boards and AKM’s D/A converter evaluation boards. Therefore, it is easy
to evaluate the AK4588. The AKD4588 also has the digital audio interface and can achieve the interface
with digital audio systems via opt-connector or BNC connector.
„ Ordering guide
AKD4588
---
Evaluation board for AK4588
(Cable for connecting with printer port of IBM-AT compatible PC
and control software are packed with this. This control software dose not support
Windows NT.)
FUNCTION
† On-board clock generator
† Compatible with 2 types of interface
- Optical output/input and BNC input
- Direct interface with AC3 decoder by 10pin header
† 10pin header for serial control interface
-12V +12V
LIN
RIN
Regulator
GND
Input
Buffer
Control Data
10pin Header
LOUT1
ROUT1
LOUT2
BNC In
Output
Buffer
AK4588
Opt In
Opt Out
ROUT2
BNC Out
Through Out
LOUT3
ROUT3
AC3
LOUT4
10pin Header
ROUT4
B, C, U, V
10pin Header
Figure 1 AKD4588 Block Diagram
* Circuit diagram and PCB layout are attached at the end of this manual.
<KM073800>
2004/02
-1-
ASAHI KASEI
[AKD4588]
„ Analog Inputs
Analog inputs use J10 (LIN) and J9 (RIN) the analog inputs are single-ended. Each channel signal range is
nominally [email protected] It is proportional to VREFH (Vin=0.6 x VREFH). VREFH is connected to AVDD on the
AKD4588.
„ Analog Outputs
J2 (LOUT1), J1 (ROUT1), J4 (LOUT2), J3 (ROUT2), J6 (LOUT3), J5 (ROUT3) J8 (LOUT4) and J7 (ROUT4) are
used for analog outputs. The analog outputs are single-ended. Each channel signal range is nominally [email protected]
It is proportional to VREFH (Vin= 0.6 x VREFH). VREFH is connected to AVDD on the AKD4588.
„ Digital Inputs
Toslink (TORX176: PORT3) or BNC connector (J12) is used for digital inputs. When Toslink (TORX176: PORT3)
is used, JP3 (RX0) set “OPT” side. When BNC connector (J12) is used, JP3 (RX0) set “BNC” side.
„ Digital Outputs
Digital outputs use Toslink (TOTX176: PORT2), BNC connector (J11). When Toslink (PORT2) is used for TX1,
JP2 (TX1) set “OPT” side. When BNC connector (J11) is used, JP2 (TX1) set “BNC” side.
„ Operation sequence
1) Set up the power supply lines. (See “Other jumpers set-up”.)
Name
Color
Voltage
Comments
Attention
Regulator,
This jack is always needed. Power line
+12V
Red
+12∼+15V
Power supply for Op-amp.
Regulator,
-12V
Blue
This jack is always needed. Power line
-12∼-15V
Power supply for Op-amp.
AGND
Black
0V
GND
This jack is always needed.
DGND
Black
0V
GND
Table 1 Set up of power supply lines
Each supply line should be distributed from the power supply unit.
2) Evaluation Mode
(1) Evaluation of DAC part used internal DIR
(2) Evaluation of ADC part used internal DIT
(See the followings)
3) Set-up the evaluation modes, jumper pins and DIP switches. (See the followings.)
4) Power on
The AK4588 should be reset once bringing SW1 (PDN) “L” upon power-up.
<KM073800>
2004/02
-2-
ASAHI KASEI
[AKD4588]
„ Evaluation mode
Evaluation of DAC part used internal DIR
1-1. Digital input (Bi-phase input)
1-1-1.
Digital input (Bi-phase input) is used by Optical Link PORT3 (TORX176). And Digital input (Bi-phase
input) is used by BNC connector J12.
1-1-2.
Set the part of (DIR/DIT part) control resister software (addr00H: CM10=00) is (Clock Mode is PLL
Mode.)
This mode is able to operate by default setting.
DIP-SW SW2-2 (MASTER) is ON. Audio Digital Interface Format is 24bit left justified at this
time.(Refer datasheet.).
1-1-3.
When Digital input (Bi-phase input) is used for RX0 pin, Optical Link PORT3 (TORX176) or BNC
Connector J12 is used. JP3 (RX0) selects this. (Refer Figure 2)
JP3
BNC
JP3
OPT
BNC
OPT
or
RX0
RX0
Using BNC
Using Toslink
Figure 2 Selection of Digital input (Bi-phase input)
1-2. Analog Output
1-2-1. Analog Output used BNC connector J2 (LOUT1), J1 (ROUT1), J4 (LOUT2), J3 (ROUT3), J6 (LOUT3),
J8 (LOUT), J7 (ROUT4).
1-2-2. Analog Output can be selected of output buffer (OP-Amp: Gain=2) is using or not using.
This is selected JP5 (LOUT1), JP4 (ROUT1), JP10 (LOUT2), JP6 (ROUT2), JP12 (LOUT3),
JP11 (ROUT3), JP16 (LOUT4) and JP15 (ROUT4) (Refer Figure8~9.)
<KM073800>
2004/02
-3-
ASAHI KASEI
[AKD4588]
(2) ADC Evaluation of using internal DIT
2-1. Analog input
2-1-1. BNC connectors J10 (LIN) and J9 (RIN) are used for analog input.
2-2. Digital output (bi-phase output)
2-2-1. PORT2 (TORX176) or J11 (TX1) is used for digital output.
2-2-2. Digital output (bi-phase output) is selected using Toslink (TOTX176: PORT2) or using BNC
Connecter J11 (TX1) by JP2 (TX1) (Refer Figure3.)
JP2
BNC
JP2
OPT
BNC
OPT
or
TX1
TX1
Using BNC
Using Toslink
Figure 3 Selection of digital output (bi-phase)
2-2-3. Set the part of (DIR/DIT part) control resister software (addr00H: CM10=01) is (Clock Mode is X’tal
Mode.)
2-2-4. Clock source is X1 (X’tal).
2-2-5. DIP-SW SW2-2 (MASTER) is ON. Audio Digital Interface Format is 24bit, left justified at this time.
(Refer datasheet.).
<KM073800>
2004/02
-4-
ASAHI KASEI
[AKD4588]
„ Setting of DIP-SW2
[SW2]: Setting of AK4588
No.
Pin
OFF
ON
Default
1
-
-
-
OFF
2
MASTER
Slave Mode
Master Mode
3
XTL1
4
XTL0
ON
ON
ON
5
CAD1
6
CAD0
Reference X’tal frequency (Refer Table 4,5)
Setting of Chip Address (ADC/DAC PART)
OFF
Setting of Chip Address (ADC/DAC PART)
ON
Table 2 Setting of SW2 (No.3~6;ON: 1, OFF:0)
„ Sampling frequency as follows
AK4588 has two methods for detecting the sampling frequency. Clock is compared between recovered clock and X’tal
oscillator by XTL1-0. This information outputs FS0, FS1, and FS2, FS3 bit for detecting the sampling frequency.
The compared X’tal frequency is selected by setting of XTL1-0 (Refer Table 4.) When XTL1-0 is 11, X’tal oscillator is
stopped and the encored sampling frequency information of channel status output FS0, FS1, FS2, FS3, PEM bit of resister
control.
XTL1
0
0
1
1
XTL0
0
1
0
1
X’tal Frequency
11.2896MHz
12.288MHz
24.576MHz
(use channel status)
Table 3 Reference X’tal frequency
Default
Except XTL1,0= “1,1”
XTL1, 0= “1,1”
Consumer
Register output
fs
mode
Professional mode
Clock comparison
(Note 2)
(Note 1)
Byte3
Byte0 Bit7, Byte4 Bit6,
FS3
FS2
FS1 FS0
Bit3, 2,1,0
6
5,4,3
0
0
0
0
44.1kHz
44.1kHz
0000
01
0000
0
0
0
1
Reserved
Reserved
0001
(Others)
0
0
1
0
48kHz
48kHz
0010
10
0000
0
0
1
1
32kHz
32kHz
0011
11
0000
1
0
0
0
88.2kHz
88.2kHz
(1000)
00
1010
1
0
1
0
96kHz
96kHz
(1010)
00
0010
1
1
0
0
176.4kHz
176.4kHz
(1100)
00
1011
1
1
1
0
192kHz
192kHz
(1110)
00
0011
Note1: At least ±3% range is identified as the value in the Table 4. In case of intermediate frequency of those two,
FS3-0 bits indicate nearer value. When the frequency is much bigger than 192kHz or much smaller than
32kHz, FS3-0 bits may indicate “0001”.
Note2: When consumer mode, Byte3 Bit3-0 are copied to FS3-0 bits.
Table 4 fs Information
<KM073800>
2004/02
-5-
ASAHI KASEI
[AKD4588]
„ Jumper setting
[JP1] (GND): Analog grand and digital grand
Open: Analog grand and digital grand is separated. < Default>
Short: Analog grand and digital grand is common. “DGND” jack is able to open at this time.
„ Operation of toggle switch.
[SW1](PDN): Resetting of AK4588. It must be “H” during operation this board.
„ Indication of LED
It turns on each pin when each pin output is “H”.
[LE1] (INT0): Indicate of AK4588’s INT0 pin output.
[LE2] (INT1): Indicate of AK4588’s INT1 pin output.
„ Serial Control
The AK4588 can be controlled via the printer port (parallel port) of IBM-AT compatible PC. Connect PORT1
(uP-I/F) with PC by 10 wire flat cable packed with the AKD4588.
Be careful connector direction. Flat cable should be connected 10-pin header, red line put on 10pin header 5 and 6
pin.
10 pin Connector
1
10
CSN
SCL / CCLK
Connect
PC
AKD4588
SDA / CDTI
SDA(ACK) / CDTO
RED
10 wire flat cable
5
PORT1
uP-I/F
6
10 pin Header
Figure 4 The connection of 10 flat cable.
PORT5
„ Interface of AC3 decoder
10
AC3 decoder is able to be interface by using PORT5 (ADC/DAC).
Three serial data is input through PORT5 form AC3 decoder input.
PORT5 pin order is showed Figure 5
9
MCKOo
GND
BICK
GND
LRCK
SDTI1
SDTO
SDTI2
SDTI4
2
SDTI3
1
ADC/DAC
Figure 5 PORT5 pin order
<KM073800>
2004/02
-6-
ASAHI KASEI
[AKD4588]
„ B, U, C, V output and V input
10
B, U, C, V output and V input is used PORT4 (BUCV).
PORT4 pin order is showed Figure 6.
PORT4
BUCV
9
GND
BOUT
GND
COUT
GND
UOUT
GND
VOUT
GND
2
VIN
1
Figure 6 PORT4 pin order
<KM073800>
2004/02
-7-
ASAHI KASEI
[AKD4588]
AKD4588 (DIR/DIT) part Control Program operation manual
„ Set-up of evaluation board and control software
1. Set up the AKD4588 (DIR/DIT) according to previous term.
2. Connect IBM-AT compatible PC with AKD4588 by 10-line type flat cable (packed with AKD4588). Take care of
the direction of 10pin header. (Please install the driver in the floppy-disk when this control software is used on
Windows 2000/XP. Please refer “Installation Manual of Control Software Driver by AKM device control software”.
In case of Windows95/98/ME, this installation is not needed. This control software does not operate on Windows
NT.)
3. Insert the CD-ROM labeled “AK4588 Evaluation Kit” into the CD-ROM drive.
4. Access the CD-ROM drive and double-click the icon of “AKD4588 (DIR/DIT)-1.exe” (address 00H-0FH) to set up
the control program.
5. Then please evaluate according to the follows.
„ Operation flow
Keep the following flow.
1. Set up the control program according to explanation above.
2. Then set up the dialog and input data.
„ Explanation of each buttons
1. [Port Setup]:
set up the printer port.
2. [Write default]: initialize the register of AK4588.
3. [All read]:
read all registers.
4. [Read]:
read data from each register.
5. [Write]:
write data to each register.
If you want to write the input data to AK4588, click “OK” button. If not, click “Cancel” button.
„ Indication of data
Input data is indicated on the register map. Red letter indicates “H” or “1” and blue one indicates “L” or “0”. Blank is the
part that is not defined in the datasheet.
<KM073800>
2004/02
-8-
ASAHI KASEI
[AKD4588]
AK4588 (ADC/DAC) part Control Program Operation Manual
„ Set-up of evaluation board and control software
This evaluation board does not support to I2C control.
1. Set up the AKD4588 according to above mentioned setting.
2. Connect IBM-AT compatible PC with AKD4588 by 10-line type flat cable (packed with AKD4588). Take care of
the direction of 10pin header. (Please install the driver in the CD-ROM-disk when this control software is used on
Windows 2000/XP. Please refer “Installation Manual of Control Software Driver by AKM device control software”.
In case of Windows95/98/ME, this installation is not needed. This control software does not operate on Windows
NT.)
3. Insert the CD-ROM-disk labeled “AKD4588 Control Program ver 1.0” into the CD-ROM-disk drive.
4. Access the CD-ROM-disk drive and double-click the icon of “AKD4588 (DIR/DIT)-1.exe” (address 00H-0FH) to
set up the control program.
5. Then please evaluate according to the followings.
Attention: Please use fixed “CAD1-0=01”.
„ Operation flow
Keep the following flow.
1. Set up the control program.
2. Then set up the dialog and input data.
If you want to write the input data to AK4588, click “OK” button. If not, click “Cancel” button.
„ Explanation of each buttons
1. [Port Setup]:
2. [Write default]:
3. [Function1]:
4. [Function2]:
5. [Write]:
Set up the printer port.
Initialize the register of AK4588.
Dialog to write data by keyboard operation.
Dialog to evaluate IPGA and ATTL/ATTR/ATTM.
Write data to each register.
„ Explanation of each dialog
1. [Function1 Dialog]:
Address Box:
Data Box:
Dialog to write data by keyboard operation
Input registers address in 2 figures of hexadecimal.
Input registers data in 2 figures of hexadecimal.
If you want to write the input data to AK4588, click “OK” button. If not, click “Cancel” button.
2. [Function2 Dialog]:
Dialog to evaluate IPGA and ATTL/ATTR/ATTM
This dialog corresponds to only addr=0BH, 0CH and 0DH.
Address Box:
Input register address in 2 figures of hexadecimal.
<KM073800>
2004/02
-9-
ASAHI KASEI
[AKD4588]
Start Data Box: Input start data in 2 figures of hexadecimal.
End Data Box: Input end data in 2 figures of hexadecimal.
Interval Box: Data is written to AK4588 by this interval.
Step Box:
Data changes by this step.
Mode Select Box:
If you check this check box, data reaches end data, and returns to start data.
[Example] Start Data = 00, End Data = 09
Data flow: 00 01 02 03 04 05 06 07 08 09 09 08 07 06 05 04 03 02 01 00
If you do not check this check box, data reaches end data, but does not return to start data.
[Example] Start Data = 00, End Data = 09
Data flow: 00 01 02 03 04 05 06 07 08 09
If you want to write the input data to AK4588, click “OK” button. If not, click “Cancel” button.
3. [Write Dialog]: Dialog to write data by mouse operation
There are dialogs corresponding to each register.
Click the “Write” button corresponding to each register to set up the dialog. If you check the check box, data
becomes “H” or “1”. If not, “L” or “0”.
If you want to write the input data to AK4588, click “OK” button. If not, click “Cancel” button.
„ Indication of data
Input data is indicated on the register map. Red letter indicates “H” or “1” and blue one indicates “L” or “0”. Blank is the
part that is not defined in the datasheet.
„ Attention on the operation
If you set up Function1 or Function2 dialog, input data to all boxes. Attention dialog is indicated if you input data or
address that is not specified in the datasheet or you click “OK” button before you input data. In that case set up the dialog
and input data once more again. These operations does not need if you click “Cancel” button or check the check box.
<KM073800>
2004/02
- 10 -
ASAHI KASEI
[AKD4588]
Measure Result
1) ADC part
[Measurement condition]
• Measurement unit : Audio Precision System two Cascade (AP2)
: fs=48kHz:256fs, fs=96kHz:256fs
• MCLK
: 64fs
• BICK
: 48kHz, 96kHz
• fs
: 10Hz∼20kHz (fs=48kHz), 10Hz∼40kHz (fs=96kHz)
• BW
: 24bit
• Bit
• Power Supply : AVDD=PVDD=DVDD=5V, TVDD=3.3V
: Internal DIT (48kHz, 96kHz), PSIA (192kHz)
• Interface
: Room
• Temperature
fs=48kHz
Parameter
S/(N+D)
DR
DR
S/N
S/N
Input signal
1kHz, -0.5dB
1kHz, -60dB
1kHz, -60dB
No signal
No signal
Measurement filter
20kLPF
20kLPF
20kLPF, A-weighted
20kLPF, A-weighted
20kLPF, A-weighted
Results
96.6 dB
99.5 dB
102.3 dB
99.6 dB
102.6 dB
fs=96kHz
Parameter
S/(N+D)
DR
DR
S/N
S/N
Input signal
1kHz, -0.5dB
1kHz, -60dB
1kHz, -60dB
No signal
No signal
Measurement filter
fs/2
fs/2
20kLPF, A-weighted
fs/2
20kLPF, A-weighted
Results
91.7 dB
97.7 dB
104.2 dB
97.7 dB
104.5 dB
<KM073800>
2004/02
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ASAHI KASEI
[AKD4588]
2) DAC part
[Measurement condition]
• Measurement unit : Audio Precision System two Cascade (AP2)
: 256fs (48kHz, 96kHz), 128fs (192kHz)
• MCLK
: 64fs
• BICK
: 48kHz, 96kHz, 192kHz
• fs
: 24bit
• Resolution
• Power Supply : AVDD=PVDD=DVDD=5V, TVDD=3.3V
: Internal DIR (48kHz, 96kHz), PSIA (192kHz)
• Interface
: Room
• Temperature
fs=48kHz
Parameter
S/(N+D)
DR
DR
Input signal
1kHz, 0dB
1kHz, -60dB
1kHz, -60dB
Measurement filter
20kLPF
20kLPF
20kLPF, A-weighted
Results
96.4 dB
102.9 dB
105.7 dB
“0” data
“0” data
20kLPF
20kLPF, A-weighted
102.9 dB
105.9 dB
fs=96kHz
Parameter
S/(N+D)
DR
DR
S/N
S/N
Input signal
1kHz, 0dB
1kHz, -60dB
1kHz, -60dB
“0” data
“0” data
Measurement filter
40kLPF
40kLPF
22kLPF, A-weighted
40kLPF
22kLPF, A-weighted
Results
94.5 dB
99.8 dB
104.5 dB
100.7 dB
105.3 dB
fs=192kHz
Parameter
Input signal
Measurement filter
Results
S/(N+D)
DR
DR
S/N
S/N
1kHz, 0dB
1kHz, -60dB
1kHz, -60dB
“0” data
“0” data
40kLPF
40kLPF
22kLPF, A-weighted
40kLPF
22kLPF, A-weighted
94.0 dB
100.8 dB
105.6 dB
100.7 dB
105.8 dB
S/N
S/N
<KM073800>
2004/02
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ASAHI KASEI
„ プロット図
1) ADC
[Measurement condition]
• Measurement Unit
• MCLK
• BICK
• fs
• BW
• Resolution
• Power Supply
• Interface
• Temperatur
[AKD4588]
: Audio Precision System two Cascade
: 256fs(fs=44.1kHz), 256fs(fs=96kHz)
: 64fs
: 44.1kHz, 96kHz
: 20Hz∼20kHz (fs=44.1kHz), 40Hz∼40kHz (fs=96kHz)
: 24bit
: AVDD=PVDD=DVDD=5V, TVDD=3.3V
: Internal DIR (fs=44.1kHz, 96kHz)
: Room
fs=44.1kHz
Figure 7 FFT (1kHz, 0dBFS input)
Figure 8 FFT (1kHz, -60dBFS input)
Figure 9 FFT (noise floor)
Figure 10 THD+N vs Input Level (fin=1kHz)
Figure 11 THD+N vs fin (Input level=0dBFS)
Figure 12 Linearity (fin=1kHz)
Figure 13 Frequency Response (Input level=0dBFS)
Figure 14 Cross-talk (Input level=0dBFS)
fs=96kHz
Figure 15 FFT (1kHz, 0dBFS input)
Figure 16 FFT (1kHz, -60dBFS input)
Figure 17 FFT (noise floor)
Figure 18 THD+N vs Input Level (fin=1kHz)
Figure 19 THD+N vs fin (Input level=0dBFS)
Figure 20 Linearity (fin=1kHz)
Figure 21 Frequency Response (Input level=0dBFS)
Figure 22 Cross-talk (Input level=0dBFS)
FFT point=16384, Avg=8, Window=Equirriple
<KM073800>
2004/02
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ASAHI KASEI
2) DAC
[Measurement Condition]
• Measurement Unit
• MCLK
• BICK
• fs
• BW
• Resolution
• Power Supply
• Interface
• Temperature
[AKD4588]
: Audio Precision System two Cascade
: 256fs(fs=44.1kHz), 256fs(fs=96kHz), 128fs(fs=192kHz)
: 64fs
: 44.1kHz, 96kHz, 192kHz
: 20Hz∼20kHz (fs=44.1kHz), 40Hz∼40kHz (fs=96kHz), 40Hz∼80kHz (fs=192kHz)
: 24bit
: AVDD=PVDD=DVDD=5V, TVDD=3.3V
: Internal DIR (48kHz, 96kHz), PSIA (192kHz)
: Room
fs=44.1kHz
Figure 23 FFT (1kHz, 0dBFS input)
Figure 24 FFT (1kHz, -60dBFS input)
Figure 25 FFT (noise floor)
Figure 26 FFT (out-of-band noise)
Figure 27 THD+N vs Input Level (fin=1kHz)
Figure 28 THD+N vs fin (Input level=0dBFS)
Figure 29 Linearity (fin=1kHz)
Figure 30 Frequency Response (Input level=0dBFS)
Figure 31 Cross-talk (Input level=0dBFS)
fs=96kHz
Figure 32 FFT (1kHz, 0dBFS input)
Figure 33 FFT (1kHz, -60dBFS input)
Figure 34 FFT (noise floor)
Figure 35 FFT (outband noise)
Figure 36 THD+N vs Input Level (fin=1kHz)
Figure 37 THD+N vs fin (Input level=0dBFS)
Figure 38 Linearity (fin=1kHz)
Figure 39 Frequency Response (Input level=0dBFS)
Figure 40 Cross-talk (Input level=0dBFS)
fs=192kHz
Figure 41 FFT (1kHz, 0dBFS input)
Figure 42 FFT (1kHz, -60dBFS input)
Figure 43 FFT (noise floor)
Figure 44 FFT (outband noise)
Figure 45 THD+N vs Input Level (fin=1kHz)
Figure 46 THD+N vs fin (Input level=0dBFS)
Figure 47 Linearity (fin=1kHz)
Figure 48 Frequency Response (Input level=0dBFS)
Figure 49 Cross-talk (Input level=0dBFS)
FFT point=16384, Avg=8, Window=Equirriple
<KM073800>
2004/02
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ASAHI KASEI
[AKD4588]
1.ADC
(ADC fs=48kHz)
AKM
Red=Lch, Blue=Rch
+0
-10
-20
-30
-40
-50
-60
d
B
F
S
-70
-80
-90
-100
-110
-120
-130
-140
-150
-160
20
50
100
200
500
1k
2k
5k
10k
20k
2k
5k
10k
20k
Hz
Figure 7 (Input=-0.5dBFS, fin=1kHz)
AKM
Red=Lch, Blue=Rch
+0
-10
-20
-30
-40
-50
-60
d
B
F
S
-70
-80
-90
-100
-110
-120
-130
-140
-150
-160
20
50
100
200
500
1k
Hz
Figure 8 (Input=-60dBFS, fin=1kHz)
<KM073800>
2004/02
- 15 -
ASAHI KASEI
[AKD4588]
(ADC fs=48kHz)
AKM
Red=Lch, Blue=Rch
+0
-10
-20
-30
-40
-50
-60
-70
d
B
F
S
-80
-90
-100
-110
-120
-130
-140
-150
-160
20
50
100
200
500
1k
2k
5k
10k
20k
Hz
Figure 9 (noise floor)
AKM
Red=Lch, Blue=Rch
-80
-82.5
-85
-87.5
-90
-92.5
-95
d
B
F
S
-97.5
-100
-102.5
-105
-107.5
-110
-112.5
-115
-117.5
-120
-140
-130
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
+0
dBr
Figure 10 THD + N vs Amplitude (fin=1kHz)
<KM073800>
2004/02
- 16 -
ASAHI KASEI
[AKD4588]
(ADC fs=48kHz)
AKM
Red=Lch, Blue=Rch
-80
-82.5
-85
-87.5
-90
-92.5
-95
d
B
F
S
-97.5
-100
-102.5
-105
-107.5
-110
-112.5
-115
-117.5
-120
20
50
100
200
500
1k
2k
5k
10k
20k
Hz
Figure 11 THD + N vs Input Frequency (Input=-0.5dBFS)
AKM
Red=Lch, Blue=Rch
+0
T
T
-130
-120
-10
-20
-30
-40
-50
d
B
F
S
-60
-70
-80
-90
-100
-110
-120
-130
-140
-140
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
+0
dBr
Figure 12 Linearity (fin=1kHz)
<KM073800>
2004/02
- 17 -
ASAHI KASEI
[AKD4588]
(ADC fs=48kHz)
AKM
Red=Lch, Blue=Rch
+0
-0.1
-0.2
-0.3
-0.4
d
B
F
S
-0.5
-0.6
-0.7
-0.8
-0.9
-1
20
50
100
200
500
1k
2k
5k
10k
20k
5k
10k
20k
Hz
Figure 13 Frequency Response(Input Level=-0.5dBFS)
(including input RC filter)
AKM
Red=Rch->Lch, Blue=Lch->Rch
-80
T
T
-85
-90
-95
-100
-105
d
B
F
S
-110
-115
-120
-125
-130
-135
-140
-145
-150
20
50
100
200
500
1k
2k
Hz
Figure 14 Crosstalk ([email protected] = Rch, [email protected] = Lch)
<KM073800>
2004/02
- 18 -
ASAHI KASEI
[AKD4588]
(ADC fs=96kHz)
AKM
Red=Lch, Blue=Rch
+0
-10
-20
-30
-40
-50
-60
-70
d
B
F
S
-80
-90
-100
-110
-120
-130
-140
-150
-160
-170
-180
40
50
100
200
500
1k
2k
5k
10k
20k
40k
5k
10k
20k
40k
Hz
Figure 15 FFT (Input=-0.5dBFS, fin=1kHz)
AKM
Red=Lch, Blue=Rch
+0
-10
-20
-30
-40
-50
-60
-70
d
B
F
S
-80
-90
-100
-110
-120
-130
-140
-150
-160
-170
-180
40
50
100
200
500
1k
2k
Hz
Figure 16 FFT (Input=-60dBFS, fin=1kHz)
<KM073800>
2004/02
- 19 -
ASAHI KASEI
[AKD4588]
(ADC fs=96kHz)
AKM
Red=Lch, Blue=Rch
+0
-10
-20
-30
-40
-50
-60
-70
-80
d
B
F
S
-90
-100
-110
-120
-130
-140
-150
-160
-170
-180
40
50
100
200
500
1k
2k
5k
10k
20k
40k
Hz
Figure 17 FFT (Noise floor)
AKM
Red=Lch, Blue=Rch
-80
-82.5
-85
-87.5
-90
-92.5
-95
d
B
F
S
-97.5
-100
-102.5
-105
-107.5
-110
-112.5
-115
-117.5
-120
-140
-130
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
+0
dBr
Figure 18 THD + N vs Amplitude (fin=1kHz)
<KM073800>
2004/02
- 20 -
ASAHI KASEI
[AKD4588]
(ADC fs=96kHz)
AKM
Red=Lch, Blue=Rch
-80
-82.5
-85
-87.5
-90
-92.5
-95
d
B
F
S
-97.5
-100
-102.5
-105
-107.5
-110
-112.5
-115
-117.5
-120
40
50
100
200
500
1k
2k
5k
10k
20k
40k
Hz
Figure 19 THD + N vs Input Frequency (Input Level=-0.5dBFS)
AKM
Red=Lch, Blue=Rch
+0
T
T
-10
-20
-30
-40
-50
d
B
F
S
-60
-70
-80
-90
-100
-110
-120
-130
-140
-140
-130
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
+0
dBr
Figure 20 Linearity (fin=1kHz)
<KM073800>
2004/02
- 21 -
ASAHI KASEI
[AKD4588]
(ADC fs=96kHz)
AKM
Red=Lch, Blue=Rch
+0
-0.1
-0.2
-0.3
-0.4
d
B
F
S
-0.5
-0.6
-0.7
-0.8
-0.9
-1
40
50
100
200
500
1k
2k
5k
10k
20k
40k
10k
20k
40k
Hz
Figure 21 Frequency Response (Input Level=-0.5dBFS)
(including input RC filter)
AKM
Red=Rch->Lch, Blue=Lch->Rch
-80
T
T
T
T
T
-85
-90
-95
-100
-105
d
B
F
S
-110
-115
-120
-125
-130
-135
-140
-145
-150
40
50
100
200
500
1k
2k
5k
Hz
Figure 22 Crosstalk (Upper = Rch, Lower = Lch)
<KM073800>
2004/02
- 22 -
ASAHI KASEI
[AKD4588]
2.DAC
(DAC fs=48kHz)
AKM
FFT Red=Lch, Blue=Rch
+0
-10
-20
-30
-40
-50
-60
d
B
r
A
-70
-80
-90
-100
-110
-120
-130
-140
-150
-160
20
50
100
200
500
1k
2k
5k
10k
20k
2k
5k
10k
20k
Hz
Figure 23 FFT (1kHz, 0dBFS input)
AKM
FFT Red=Lch, Blue=Rch
+0
-10
-20
-30
-40
-50
-60
d
B
r
A
-70
-80
-90
-100
-110
-120
-130
-140
-150
-160
20
50
100
200
500
1k
Hz
Figure 24 FFT (1kHz, -60dBFS input)
<KM073800>
2004/02
- 23 -
ASAHI KASEI
[AKD4588]
(DAC fs=48kHz)
AKM
FFT Red=Lch, Blue=Rch
+0
-10
-20
-30
-40
-50
-60
d
B
r
-70
A
-90
-80
-100
-110
-120
-130
-140
-150
-160
20
50
100
200
500
1k
2k
5k
10k
20k
Hz
Figure 25 FFT (noise floor)
AKM
Red=Lch, Blue=Rch
+0
-10
-20
-30
-40
-50
-60
d
B
r
A
-70
-80
-90
-100
-110
-120
-130
-140
-150
-160
100
200
500
1k
2k
5k
10k
20k
50k
100k
Hz
Figure 26 FFT (out-of-band noise)
<KM073800>
2004/02
- 24 -
ASAHI KASEI
[AKD4588]
(DAC fs=48kHz)
AKM
Red=Lch, Blue=Rch
-80
-82.5
-85
-87.5
-90
-92.5
-95
d
B
r
-97.5
A
-102.5
-100
-105
-107.5
-110
-112.5
-115
-117.5
-120
-140
-130
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
+0
dBFS
Figure 27 THD+N vs Input Level (fin=1kHz)
AKM
Red=Lch, Blue=Rch
-80
-82.5
-85
-87.5
-90
-92.5
-95
d
B
r
-97.5
A
-102.5
-100
-105
-107.5
-110
-112.5
-115
-117.5
-120
20
50
100
200
500
1k
2k
5k
10k
20k
Hz
Figure 28 THD+N vs fin (Input level=0dBFS)
<KM073800>
2004/02
- 25 -
ASAHI KASEI
[AKD4588]
(DAC fs=48kHz)
AKM
Red=Lch, Blue=Rch
+0
-10
-20
-30
-40
-50
d
B
r
-60
A
-80
-70
-90
-100
-110
-120
-130
-140
-140
-130
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
+0
dBFS
Figure 29 Linearity (fin=1kHz)
AKM
Red=Lch, Blue=Rch
+0.5
+0.4
+0.3
+0.2
+0.1
d
B
r
+0
A
-0.1
-0.2
-0.3
-0.4
-0.5
2k
4k
6k
8k
10k
12k
14k
16k
18k
20k
Hz
Figure 30 Frequency Response (Input level=0dBFS)
<KM073800>
2004/02
- 26 -
ASAHI KASEI
[AKD4588]
(DAC fs=48kHz)
AKM
Red=Lch->Rch, Blue=Rch->Lch
-80
-82.5
-85
-87.5
-90
-92.5
-95
d
B
r
-97.5
A
-102.5
-100
-105
-107.5
-110
-112.5
-115
-117.5
-120
20
50
100
200
500
1k
2k
5k
10k
20k
Hz
Figure 31 Cross-talk (Input level=0dBFS)
<KM073800>
2004/02
- 27 -
ASAHI KASEI
[AKD4588]
(DAC fs=96kHz)
AKM
Red=Lch, Blue=Rch
+0
-10
-20
-30
-40
-50
-60
d
B
r
A
-70
-80
-90
-100
-110
-120
-130
-140
-150
-160
40
50
100
200
500
1k
2k
5k
10k
20k
40k
5k
10k
20k
40k
Hz
Figure 32 FFT (1kHz, 0dBFS input)
AKM
Red=Lch, Blue=Rch
+0
-10
-20
-30
-40
-50
-60
d
B
r
A
-70
-80
-90
-100
-110
-120
-130
-140
-150
-160
40
50
100
200
500
1k
2k
Hz
Figure 33 FFT (1kHz, -60dBFS input)
<KM073800>
2004/02
- 28 -
ASAHI KASEI
[AKD4588]
(DAC fs=96kHz)
AKM
Red=Lch, Blue=Rch
+0
-10
-20
-30
-40
-50
-60
d
B
r
A
-70
-80
-90
-100
-110
-120
-130
-140
-150
-160
40
50
100
200
500
1k
2k
5k
10k
20k
40k
Hz
Figure 34 FFT (noise floor)
AKM
Red=Lch, Blue=Rch
+0
-10
-20
-30
-40
-50
-60
d
B
r
-70
A
-90
-80
-100
-110
-120
-130
-140
-150
-160
100
200
500
1k
2k
5k
10k
20k
50k
100k
Hz
Figure 35 FFT (out band noise)
<KM073800>
2004/02
- 29 -
ASAHI KASEI
[AKD4588]
(DAC fs=96kHz)
AKM
Red=Lch, Blue=Rch
-80
-82.5
-85
-87.5
-90
-92.5
-95
d
B
r
-97.5
A
-102.5
-100
-105
-107.5
-110
-112.5
-115
-117.5
-120
-140
-130
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
+0
dBFS
Figure 36 THD+N vs Input Level (fin=1kHz)
AKM
Red=Lch, Blue=Rch
-80
-82.5
-85
-87.5
-90
-92.5
-95
d
B
r
-97.5
A
-102.5
-100
-105
-107.5
-110
-112.5
-115
-117.5
-120
40
50
100
200
500
1k
2k
5k
10k
20k
40k
Hz
Figure 37 THD+N vs fin (Input level=0dBFS)
<KM073800>
2004/02
- 30 -
ASAHI KASEI
[AKD4588]
(DAC fs=96kHz)
AKM
Red=Lch, Blue=Rch
+0
-10
-20
-30
-40
-50
d
B
r
-60
A
-80
-70
-90
-100
-110
-120
-130
-140
-140
-130
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
+0
dBFS
Figure 38 Linearity (fin=1kHz)
AKM
Red=Lch, Blue=Rch
+0.4
+0.2
+0
-0.2
d
B
r
A
-0.4
-0.6
-0.8
-1
-1.2
-1.4
2.5k
5k
7.5k
10k
12.5k
15k
17.5k
20k
22.5k
25k
27.5k
30k
32.5k
35k
37.5k
40k
Hz
Figure 39 Frequency Response (Input level=0dBFS)
<KM073800>
2004/02
- 31 -
ASAHI KASEI
[AKD4588]
(DAC fs=96kHz)
AKM
Red=Lch->Rch, Blue=Rch->Lch
-80
-82.5
-85
-87.5
-90
-92.5
-95
d
B
r
-97.5
A
-102.5
-100
-105
-107.5
-110
-112.5
-115
-117.5
-120
40
50
100
200
500
1k
2k
5k
10k
20k
40k
Hz
Figure 40 Cross-talk (Input level=0dBFS)
<KM073800>
2004/02
- 32 -
ASAHI KASEI
[AKD4588]
(DAC fs=192kHz)
Red=Lch, Blue=Rch
+0
-20
-40
-60
d
B
r
-80
A
-100
-120
-140
-160
40 50
100
200
500
1k
2k
5k
10k
20k
50k
80k
10k
20k
50k
80k
Hz
Figure 41 FFT (1kHz, 0dBFS input)
Red=Lch, Blue=Rch
+0
-20
-40
-60
d
B
r
A
-80
-100
-120
-140
-160
40 50
100
200
500
1k
2k
5k
Hz
Figure 42 FFT (1kHz, -60dBFS input)
<KM073800>
2004/02
- 33 -
ASAHI KASEI
[AKD4588]
(DAC fs=192kHz)
Red=Lch, Blue=Rch
+0
-20
-40
-60
d
B
r
-80
A
-100
-120
-140
-160
40 50
100
200
500
1k
2k
5k
10k
20k
50k
80k
Hz
Figure 43 FFT (noise floor)
Red=Lch, Blue=Rch
+0
-20
-40
-60
d
B
r
A
-80
-100
-120
-140
-160
100
200
500
1k
2k
5k
10k
20k
50k
100k
Hz
Figure 44 FFT (outband noise)
<KM073800>
2004/02
- 34 -
ASAHI KASEI
[AKD4588]
(DAC fs=192kHz)
Red=Lch, Blue=Rch
-80
-85
-90
-95
d
B
r
-100
A
-105
-110
-115
-120
-140
-130
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
+0
dBFS
Figure 45 THD+N vs Input Level (fin=1kHz)
Red=Lch, Blue=Rch
-80
-85
-90
-95
d
B
r
A
-100
-105
-110
-115
-120
40 50
100
200
500
1k
2k
5k
10k
20k
50k
80k
Hz
Figure 46 THD+N vs fin (Input level=0dBFS)
<KM073800>
2004/02
- 35 -
ASAHI KASEI
[AKD4588]
(DAC fs=192kHz)
Red=Lch, Blue=Rch
+0
-10
-20
-30
-40
-50
d
B
r
A
-60
-70
-80
-90
-100
-110
-120
-130
-140
-140
-130
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
+0
dBFS
Figure 47 Linearity (fin=1kHz)
Red=Lch, Blue=Rch
+1
+0.5
+0
-0.5
-1
d
B
r
-1.5
A
-2
-2.5
-3
-3.5
-4
5k
10k
15k
20k
25k
30k
35k
40k
45k
50k
55k
60k
65k
70k
75k
80k
Hz
Figure 48 Frequency Response (Input level=0dBFS)
<KM073800>
2004/02
- 36 -
ASAHI KASEI
[AKD4588]
(DAC fs=192kHz)
Red=Rch->Lch, Blue=Lch->Rch
-70
-75
-80
-85
d
B
r
-90
A
-100
-95
-105
-110
-115
-120
40 50
100
200
500
1k
2k
5k
10k
20k
50k
80k
Hz
Figure 49 Cross-talk (Input level=0dBFS)
<KM073800>
2004/02
- 37 -
ASAHI KASEI
[AKD4588]
IMPORTANT NOTICE
• These products and their specifications are subject to change without notice. Before considering
any use or application, consult the Asahi Kasei Microsystems Co., Ltd. (AKM) sales office or
authorized distributor concerning their current status.
• AKM assumes no liability for infringement of any patent, intellectual property, or other right in the
application or use of any information contained herein.
• Any export of these products, or dev ices or systems containing them, may require an export
license or other official approv al under the law and regulations of the country of export pertaining
to customs and tariff s, currency exchange, or strategic materials.
• AKM products are neither intended nor authorized for use as critical components in any saf ety, life
support, or other hazard related dev ice or system, and AKM assumes no responsibility relating to
any such use, except with the express written consent of the Representativ e Director of AKM. As
used here:
(a) A hazard related device or system is one designed or intended for lif e support or maintenance
of safety or for applications in medicine, aerospace, nuclear energy, or other fields, in which its
failure to function or perform may reasonably be expected to result in loss of life or in
significant injury or damage to person or property.
(b) A critical component is one whose failure to function or perform may reasonably be expected
to result, whether directly or indirectly, in the loss of the saf ety or effectiveness of the device
or system containing it, and which must therefore meet v ery high standards of performance and
reliability.
• It is the responsibility of the buyer or distributor of an AKM product who distributes, disposes of, or
otherwise places the product with a third party to notify that party in advance of the abov e content
and conditions, and the buyer or distributor agrees to assume any and all responsibility and liability
for and hold AKM harmless from any and all claims arising from the use of said product in the
absence of such notification.
<KM073800>
2004/02
- 38 -
R2
100_C
INT1
R5
PVDD
R3
0_C
1
D
C1
+
R1
D
2
CAD0
VIN
TX1
CAD1
3
MCLK
4
INT0
5
0_C
10u
C2
100_C
R4
12k
BOUT
C6
61
RX2
62
NC
63
RX3
64
PVSS
R
65
66
PVDD
67
RX4
RX5
68
69
70
71
RX6
72
73
RX7
74
I2C
75
76
VIN
77
78
TX0
TEST2
TVDD
CAD0
3
CAD1
BOUT
DAUX2
2
MCLK
INT1
0.1u
XTI
4
DVDD
5
DVSS
C
TEST1
RX1
59
NC
58
RX0
57
AVSS
56
22u
AVDD
55
VREFH
54
VCOM
53
RIN
52
LIN
51
22u
NC
50
ROUT1
49
NC
48
LOUT1
47
NC
46
ROUT2
45
AVDD
C7
RIN
C8 +
0.1u
C10
0.1u
R7
330_C
R6
330_C
C
C9
10u
+ C11
2.2u
C12
LIN
LOUT2
43
NC
42
ROUT3
41
R10
330_C
ROUT1
LOUT1
B
ROUT2
LOUT2
ROUT3
NC
NC
44
R11
330_C
40
LOUT3
39
NC
38
ROUT4
LOUT4
DZF1
NC
37
36
35
21
34
NC_C
10pin_ADC
DZF2 / OVF
CDTO
33
20
MASTER
LRCK1
32
R21100_C
R20
19
PDN
In case of 10pin_DAC, open JP10
BICK1
31
0_C
SDTO
18
XTL0
R19
SDTO1
30
DIR_DAC
LRCK2
17
XTL1
R18100_C
16
29
LRCK2
BICK2
SDTI1
R17100_C
SDTO2
15
SDTI2
BICK2
14
28
B
VOUT
27
R16100_C
13
AK4588
SDTI3
R15100_C
UOUT
SDTI4
R14100_C
VOUT
COUT
12
26
UOUT
11
U1
25
R13100_C
MCKO1
DAUX1
COUT
MCKO2
10
24
R12100_C
9
CSN
R9 100_C
23
TEST3
CDTI / SDA
XTI
8
22
7
R8 NC_C
MCLK
XTO
CCLK / SCL
6
RX0
60
+
XTO
C5
10u
1
+
+
INT0
C3 C4
10u 0.1u
+
DVDD
79
TVDD
TX1
80
0.1u
CDTO
A
A
TST1
TST2
5
LOUT3
ROUT4
LOUT4
MASTER
PDN
XTL0
XTL1
SDTI1
SDTI2
SDTI3
SDTI4
CSN
CDTI/SDA
CCLK/SCL
Title
Size
A3
Date:
4
3
2
AKD4588
Document Number
Rev
B
AK4588
Saturday, December 20, 2003 Sheet
1
1
of
4
5
4
3
2
1
D
D
4
6 -
R26
10k
R23
220
J2
LOUT1
C15
22u
3 +
ROUT2
2 -
R27
10k
C17
3300p
N_12V
C20 330p
8
P_12V
U2B
NJM4580
7
+
8
5 +
LOUT1
C16
3300p
N_12V
C19 330p
R31
4.7K
C14
22u
J1
ROUT1
R28
4.7k
R32
4.7K
P_12V
U3A
NJM4580
1
R24
220
J3
ROUT2
C18
3300p
N_12V
C21 330p
4
2 -
R25
10k
R22
220
4
3 +
ROUT1
P_12V
U2A
NJM4580
1
+
+
8
C13
22u
R29
4.7k
R33
4.7K
R30
4.7k
C
C
R37
10k
ROUT3
R38
10k
C25
3300p
R43
4.7K
P_12V
U4A
NJM4580
1
R35
220
J5
ROUT3
C24
22u
5 +
6 -
LOUT3
R39
10k
C26
3300p
R40
4.7k
R44
4.7K
P_12V
U4B
NJM4580
7
R36
220
J6
LOUT3
C27
3300p
N_12V
C30 330p
4
N_12V
C29 330p
4
N_12V
C28 330p
3 +
2 -
8
C23
22u
J4
LOUT2
8
R34
220
4
LOUT2
P_12V
U3B
NJM4580
7
+
5 +
6 -
+
+
8
C22
22u
R41
4.7k
R45
4.7K
R42
4.7k
B
B
P12V
L1
C31
47u
for NJM4580 x5
P_12V
+ (short)
+
C32
10u
8
+
N_12V
C58 330p
4
R52
4.7K
R50
4.7k
R53
4.7K
J8
LOUT4
C56
3300p
4
8
+
A
R47
220
L2
C44
47u
C38
10u
C39
0.1u
(short)
C45
10u
C46
0.1u
C47
10u
C48
0.1u
C49
10u
C50
0.1u
C51
10u
C52
0.1u
C53
10u
C54
0.1u
A
R51
4.7k
Size
Document Number
AKD4588
Date:
3
2
Rev
AOUT
A3
4
C41
0.1u
for NJM4580 x5
Title
5
C40
10u
N_12V
+
R49
10k
C55
3300p
C37
0.1u
+
N12V
P_12V
U5B
NJM4580
7
+
5 +
6 -
LOUT4
C36
10u
+
N_12V
C57 330p
C43
22u
J7
ROUT4
C35
0.1u
+
R48
10k
R46
220
C34
10u
+
+
3 +
2 -
ROUT4
P_12V
U5A
NJM4580
1
C33
0.1u
+
+
C42
22u
+
Saturday, December 20, 2003
Sheet
1
B
2
of
4
5
4
3
2
1
JP1
VD
R59
10k
PORT1
10 CSN
9
SCL/CCLK
R60
8
SDA/CDTI
51
7
SDA(ACK)/CDTO
6
1
19
uP-I/F
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8
18
17
16
15
14
13
12
11
2
2
3
4
5
6
7
8
9
470
470
470
Digital Ground
C60
47u
5p
Analog Ground
+
XTO
12.288MHz
5p
C61 C62
0.1u 0.1u
XTI
X1
C63
1
R55
R56
R58
D
G1
G2
74HCT541
R61
R62
R63
CSN
100
P_12V
CCLK/SCL
100
CDTI/SDA
100
RIN
RIN
1
N_12V
U7A
NJM5532
+ 3
- 2
P_12V
J9
RIN
8
1
2
3
4
5
D
10k
10k
LIN
LIN
R64
560
U7B
NJM5532
J10
LIN
+ 5
7
- 6
N_12V
R65
560
4
R57
C59
GND
for 74HCT541, 74HC14
8
VD
U6
A1
A2
A3
A4
A5
A6
A7
A8
4
R54
CDTO
C
VD
D1
1S1588
R66
10k
1
H
L
PORT2
5
IN
VCC
IF
6 6 GND
TOTX176
5
U8A
2
74HC14
3
U8B
R67
4
PDN
PDN
100_C
74HC14
C65
0.1u
SW1
PDN
J11
TX1
LE1
R71
VD
INT0
LE2
INT1
1k_C
R72
1:1
5
TX1
BNC
R68
1k
C64
0.1u
R69
240
R70
150
INT0
74HC14
U8D
8
9
1k_C
C
OPT
VD
T1
DA02-F
U8C
6
JP2
TX1
4
3
2
1
INT1
74HC14
B
B
VD
PORT3
6 6 GND
VCC
5 5 GND
OUT
TORX176
U8E
11
SW2
MASTER
XTL1
XTL0
CAD1
CAD0
1
2
3
4
5
6
12
11
10
9
8
7
74HC14
U8F
13
12
6
5
4
3
2
1
L3 10u
4
3
2
1
VD
C66
0.1u
+C67
10u
R73
OPT
470
MODE1
RP1
10
JP3
RX0
74HC14
J12
BNC
MASTER
XTL1
XTL0
CAD1
CAD0
RX0
BNC
C68
R74
75
0.1u
47k
A
A
Title
Size
A3
Date:
5
4
3
2
Document Number
AKD4588
INPUT
Saturday, December 20, 2003
Rev
B
Sheet
1
3
of
4
5
4
3
3
VD
GND
T2
NJM78M05FA
L4
OUT
10u
+ C73
D
47u
C71
0.1u
1
+12V
R75
1
P12V
C69 +
0.1u
2
+C72
47u
IN
2
C70
47u
Short
D
R76
DVDD
7.5
R77
PVDD
-12V
5.1
AVDD
R78
N12V
C74
0.1u
C75
+
47u
Short
T3
+
C76
47u
C77
0.1u
OUT
2
C
GND
LP2950A
1
TVDD
IN
3
DVDD
C78 +
0.1u
C
C79
47u
1
2
3
4
5
PORT4
10
9
8
7
6
BOUT
COUT
UOUT
VOUT
VIN
R79
BOUT
COUT
UOUT
VOUT
VIN
100_C
BCUV
R80
10k_C
MCLK
B
BICK2
LRCK2
MCKO
BICK
LRCK
SDTO
SDTI4
1
2
3
4
5
B
PORT5
10GND
9 GND
8 SDTI1
7 SDTI2
6 SDTI3
SDTI1
SDTI2
SDTI3
SDTI4
ADC/DAC
DSP
DSP
DSP
R81
0_C
DSP
R82
0_C
R83
0_C
R84
0_C
SDTO
A
A
Title
Size
A3
Date:
5
4
3
2
Document Number
AKD4588
Power Supply
Saturday, December 20, 2003
Sheet
1
Rev
A
4
of
4