AMIS-42665 High-Speed Low Power CAN Transceiver Data Sheet 1.0 General Description The AMIS-42665 CAN transceiver is the interface between a controller area network (CAN) protocol controller and the physical bus and may be used in both 12V and 24V systems. The transceiver provides differential transmit capability to the bus and differential receive capability to the CAN controller. The AMIS-42665 is a new addition to the CAN high-speed transceiver family and offers the following additional features: • • • Ideal passive behaviour when supply voltage is removed Wake-up over bus Extremely low current standby mode Due to the wide common-mode voltage range of the receiver inputs, the AMIS-42665 is able to reach outstanding levels of electromagnetic susceptibility (EMS). Similarly, extremely low electromagnetic emission (EME) is achieved by the excellent matching of the output signals. 2.0 Key Features • • • • • • • • • • • • • • • Compatible with the ISO 11898 standard (ISO 11898-2, ISO 11898-5 and SAE J2284) High speed (up to 1Mbaud) Ideally suited for 12V and 24V industrial and automotive applications Extremely low current standby mode with wake-up via the bus Low EME common-mode choke is no longer required Differential receiver with wide common-mode range (+/- 35V) for high EMS Voltage source via VSPLIT pin for stabilizing the recessive bus level (further EMC improvement) No disturbance of the bus lines with an un-powered node Transmit data (TxD) dominant time-out function Thermal protection Bus pins protected against transients in an automotive environment Power down mode in which the transmitter is disabled Bus and VSPLIT pins short circuit proof to supply voltage and ground Logic level inputs compatible with 3.3V devices At least 110 nodes can be connected to the same bus. 3.0 Ordering Information Marketing Name AMIS42665AGA AMIS42665ALA Package SOIC 150 8 GREEN (JEDEC MS-012) SOIC 150 8 GREEN (NiPdAu, JEDEC MS-012) AMI Semiconductor – Rev. 3.1, April 06 www.amis.com Temp. Range -40°C…125°C -40°C…125°C 1 AMIS-42665 High-Speed Low Power CAN Transceiver Data Sheet 4.0 Technical Characteristics Table 1: Technical Characteristics Symbol Parameter VCC Power supply voltage VSTB DC voltage at pin STB VTxD DC voltage at pin TxD VRxD DC voltage at pin RxD VCANH DC voltage at pin CANH VCANL DC voltage at pin CANL VSPLIT DC voltage at pin VSPLIT VO(dif)(bus_dom) Differential bus output voltage in dominant state CM-range Input common-mode range for comparator VCM-peak Cload tpd(rec-dom) Symbol t pd(dom-rec) VCM-step Tjunc Common-mode peak Load capacitance on IC outputs Propagation delay TxD to RxD Parameter Propagation delay TxD to RxD Common-mode step Junction temperature Conditions 0 < VCC < 5.25V; no time limit 0 < VCC < 5.25V; no time limit 0 < VCC < 5.25V; no time limit 42.5Ω < RLT < 60Ω Guaranteed differential receiver threshold and leakage current See Figure 8 and 9 (Note) See Figure 5 Conditions See Figure 5 See Figure 8 and 9 (Note) 5.0 Block Diagram VCC 3 AMIS-42665 POR TxD 1 Timer VCC STB RxD GND 8 4 Thermal shutdown Mode & wake-up control CANH 5 VSPLIT 6 Driver control Wake-up Filter 7 VCC VSPLIT COMP 2 COMP PC20050211.1 Figure 1: Block Diagram AMI Semiconductor – Rev. 3.1, April 06 www.amis.com 2 Max. 5.25 VCC VCC VCC +35 +35 +35 3 +35 Unit V V V V V V V V V -500 500 15 230 Max. 245 150 150 mV pF ns Unit ns mV °C 70 Min. 100 -150 -40 Note: The parameters VCM-peak and VCM-step guarantee low EME. VCC Min. 4.75 -0.3 -0.3 -0.3 -35 -35 -35 1.5 -35 CANL AMIS-42665 High-Speed Low Power CAN Transceiver Data Sheet 6.0 Typical Application 6.1 Application Schematic VBAT IN 5V-reg OUT VCC VCC 3 STB CAN controller RxD 4 RLT = 60 Ω 7 8 CANH AMIS42665 TxD 5 RLT = 60 Ω 2 GND GND PC20040829.3 Figure 2: Application Diagram 6.2 Pin Description 1 GND 2 VCC 3 RxD 4 AMIS42665 TxD 8 STB 7 CANH 6 CANL 5 VSPLIT PC20040829.1 Figure 3: Pin Configuration Table 2: Pinout Pin Name Description 1 TxD Transmit data input; low input => dominant driver; internal pull-up current 2 GND Ground 3 VCC Supply voltage 4 RxD Receive data output; dominant transmitter => low output 5 VSPLIT Common-mode stabilization output 6 CANL Low-level CAN bus line (low in dominant mode) 7 CANH High-level CAN bus line (high in dominant mode) 8 STB Standby mode control input AMI Semiconductor – Rev. 3.1, April 06 www.amis.com 3 CLT = 47 nF CANL 6 1 VSPLIT CAN BUS AMIS-42665 High-Speed Low Power CAN Transceiver Data Sheet 7.0 Functional Description 7.1 Operating Modes AMIS-42665 provides two modes of operation as illustrated in Table 3. These modes are selectable through pin STB. Table 3: Operating Modes Pin Pin RXD Mode STB Low High Normal Low Bus dominant Bus recessive Standby High Wake-up request detected No wake-up request detected 7.1.1. Normal Mode In the normal mode, the transceiver is able to communicate via the bus lines. The signals are transmitted and received to the CAN controller via the pins TxD and RxD. The slopes on the bus lines outputs are optimized to give extremely low EME. 7.1.2. Standby Mode In standby mode both the transmitter and receiver are disabled and a very low-power differential receiver monitors the bus lines for CAN bus activity. The bus lines are terminated to ground and supply current is reduced to a minimum, typically 10µA. When a wake-up request is detected by the low-power differential receiver, the signal is first filtered and then verified as a valid wake signal after a time period of tBUS, the RxD pin is driven low by the transceiver to inform the controller of the wake-up request. 7.2 Split Circuit The VSPLIT pin is operational only in normal mode. In standby mode this pin is floating. The VSPLIT is connected as shown in Figure 2 and its purpose is to provide a stabilized DC voltage of 0.5 x VCC to the bus avoiding possible steps in the common-mode signal therefore reducing EME. These unwanted steps could be caused by an un-powered node on the network with excessive leakage current from the bus that shifts the recessive voltage from its nominal 0.5 x VCC voltage. 7.3 Wake-up Once a valid wake-up (dominant state longer than tBUS) has been received during the standby mode the RxD pin is driven low. 7.4 Over-temperature Detection A thermal protection circuit protects the IC from damage by switching off the transmitter if the junction temperature exceeds a value of approximately 160°C. Because the transmitter dissipates most of the power, the power dissipation and temperature of the IC is reduced. All other IC functions continue to operate. The transmitter off-state resets when pin TxD goes high. The thermal protection circuit is particularly needed when a bus line short circuits. 7.5 TxD Dominant Time-out Function A TxD dominant time-out timer circuit prevents the bus lines being driven to a permanent dominant state (blocking all network communication) if pin TxD is forced permanently low by a hardware and/or software application failure. The timer is triggered by a negative edge on pin TxD. If the duration of the low-level on pin TxD exceeds the internal timer value tdom, the transmitter is disabled, driving the bus into a recessive state. The timer is reset by a positive edge on pin TxD. This TxD dominant time-out time (tdom)defines the minimum possible bit rate to 40kBaud. 7.6 Fail Safe Features A current-limiting circuit protects the transmitter output stage from damage caused by accidental short circuit to either positive or negative supply voltage, although power dissipation increases during this fault condition. AMI Semiconductor – Rev. 3.1, April 06 www.amis.com 4 AMIS-42665 High-Speed Low Power CAN Transceiver Data Sheet The pins CANH and CANL are protected from automotive electrical transients (according to ISO 7637; see Figure 4). Pins TxD and STB are pulled high internally should the input become disconnected. Pins TxD, STB and RxD will be floating, preventing reverse supply should the VCC supply be removed. 8.0 Electrical Characteristics 8.1 Definitions All voltages are referenced to GND (pin 2). Positive currents flow into the IC. Sinking current means the current is flowing into the pin; sourcing current means the current is flowing out of the pin. 8.2 Absolute Maximum Ratings Stresses above those listed in the following table may cause permanent device failure. Exposure to absolute maximum ratings for extended periods may effect device reliability. Table 4: Absolute Maximum Ratings Symbol Parameter Supply voltage VCC DC voltage at pin CANH VCANH DC voltage at pin CANL VCANL DC voltage at pin VSPLIT VSPLIT DC voltage at pin TxD VTxD DC voltage at pin RxD VRxD DC voltage at pin STB VSTB Transient voltage at pin CANH Vtran(CANH) Transient voltage at pin CANL Vtran(CANL) Transient voltage at pin VSPLIT Vtran(VSPLIT) Note 1 Note 1 Note 1 Min. -0.3 -50 -50 -50 -0.3 -0.3 -0.3 -300 -300 -300 Max. +7 +50 +50 +50 VCC + 0.3 VCC + 0.3 VCC + 0.3 +300 +300 +300 Unit V V V V V V V V V V Electrostatic discharge voltage at CANH and CANL pin Note 2 Note 4 -8 -500 +8 +500 kV V Vesd Electrostatic discharge voltage at all other pins -5 -500 Latch-up Static latch-up at all pins Storage temperature Ambient temperature Maximum junction temperature Note 2 Note 4 Note 3 +5 +500 120 +150 +125 +170 kV V mA °C °C °C Vesd(CANL/CANH/ Conditions 0 < VCC < 5.25V; no time limit 0 < VCC < 5.25V; no time limit 0 < VCC < 5.25V; no time limit VSPLIT) Tstg Tamb Tjunc -55 -40 -40 Notes: 1) Applied transient waveforms in accordance with ISO 7637 part 3, test pulses 1, 2, 3a, and 3b (see Figure 4). 2) Standardized human body model electrostatic discharge (ESD) pulses in accordance to MIL883 method 3015.7. 3) Static latch-up immunity: Static latch-up protection level when tested according to EIA/JESD78. 4) Standardized charged device model ESD pulses when tested according to EOS/ESD DS5.3-1993. 8.3 Thermal Characteristics Table 5: Thermal Characteristics Symbol Parameter Thermal resistance from junction to ambient in SO8 package Rth(vj-a) Thermal resistance from junction to substrate of bare die Rth(vj-s) AMI Semiconductor – Rev. 3.1, April 06 www.amis.com 5 Conditions In free air In free air Value 145 45 Unit K/W K/W AMIS-42665 High-Speed Low Power CAN Transceiver Data Sheet 8.4 Characteristics VCC = 4.75 to 5.25V; Tjunc = -40 to +150°C; RLT =60Ω unless specified otherwise. Table 6: Characteristics Symbol Parameter Supply (pin VCC) Supply current ICC Supply current in standby mode Transmitter Data Input (pin TxD) High-level input voltage VIH Low-level input voltage VIL High-level input current IIH Low-level input current IIL Input capacitance Ci Transmitter Mode Select (pin STB) High-level input voltage VIH Low-level input voltage VIL High-level input current IIH Low-level input current IIL Input capacitance Ci Receiver Data Output (pin RxD) High-level output voltage VOH Low-level output voltage VOL High-level output current Ioh Low-level output current Iol Bus Lines (pins CANH and CANL) Recessive bus voltage Vo(reces) (norm) ICCS Vo(reces) (stby) Recessive bus voltage Io(reces) (CANH) Recessive output current at pin CANH Io(reces) (CANL) Recessive output current at pin CANL Vo(dom) (CANH) Vo(dom) (CANL) Vo(dif) (bus_dom) Dominant output voltage at pin CANH Dominant output voltage at pin CANL Differential bus output voltage (VCANH - VCANL) Differential bus output voltage (VCANH - VCANL) Short circuit output current at pin CANH Short circuit output current at pin CANL Differential receiver threshold voltage (see Figure 5) Vo(dif) (bus_rec) Io(sc) (CANH) Io(sc) (CANL) Vi(dif) (th) Vihcm(dif) (th) Vi(dif) (hys) Ri(cm) (CANH) Ri(cm) (CANL) Ri(cm) (m) Ri(dif) Ci(CANH) Ci(CANL) Ci(dif) Differential receiver threshold voltage for high common-mode (see Figure 5) Differential receiver input voltage hysteresis (see Figure 5) Common-mode input resistance at pin CANH Common-mode input resistance at pin CANL Matching between pin CANH and pin CANL common mode input resistance Differential input resistance Input capacitance at pin CANH Input capacitance at pin CANL Differential input capacitance AMI Semiconductor – Rev. 3.1, April 06 www.amis.com Conditions Min. Typ. Max. Unit 45 4 65 8 mA mA 10 15 µA 2.0 -0.3 -5 -75 - 0 -200 5 VCC + 0.3 +0.8 +5 -350 10 V V µA µA pF 2.0 -0.3 -5 -1 - 0 -4 5 VCC + 0.3 +0.8 +5 -10 10 V V µA µA pF -5 5 0.25 -10 10 0.75 x VCC 0.45 -15 15 V V mA mA 2.0 2.5 3.0 V -100 0 100 mV -2.5 - +2.5 mA -2.5 - +2.5 mA 3.0 0. 5 1.5 3.6 1.4 2.25 4.25 1.75 3.0 V V V -120 0 +50 mV -45 45 0.5 -70 70 0.7 -120 120 0.9 mA mA V 0.40 0.7 1.00 V 50 70 100 mV 15 15 -3 26 26 0 37 37 +3 KΩ KΩ % 25 50 7.5 7.5 3.75 75 20 20 10 KΩ pF pF pF Dominant; VTxD = 0V Recessive; VTxD = VCC Tjunc,max = 100°C Output recessive Output dominant VTxD =VCC VTxD = 0V Not tested Standby mode Normal mode VSTB =VCC VSTB = 0V Not tested IRXD = -10mA IRXD = 5mA Vo = 0.7 x VCC Vo = 0.3 x VCC VTxD = VCC; no load normal mode VTxD = VCC; no load standby mode -35V <VCANH< +35V; 0V <VCC < 5.25V -35V <VCANL < +35V; 0V <VCC < 5.25V VTxD = 0V VTxD = 0V VTxD = 0V; dominant; 42.5Ω < RLT < 60Ω VTxD = VCC; recessive; no load VCANH = 0V; VTxD = 0V VCANL = 36V; VTxD = 0V -5V <VCANL < +12V; -5V <VCANH < +12V; -35V <VCANL < +35V; -35V <VCANH < +35V; -35V <VCANL < +35V; -35V <VCANH < +35V; VCANH = VCANL VTxD = VCC; not tested VTxD = VCC; not tested VTxD = VCC; not tested 6 0.6 x VCC AMIS-42665 High-Speed Low Power CAN Transceiver Table 6: Characteristics (Continued) Symbol Parameter Common-mode Stabilization (pin VSPLIT) Reference output voltage at pin VSPLIT VSPLIT VSPLIT leakage current VSPLIT limitation current Power-on-Reset (POR) PORL POR level ISPLIT(i) ISPLIT(lim) td(TxD-BUSoff) Delay TXD to bus inactive td(BUSon-RXD) td(BUSoff-RXD) tpd(rec-dom) Delay bus active to RXD Delay bus inactive to RXD Propagation delay TXD to RXD from recessive to dominant Propagation delay TXD to RXD from dominant to recessive Delay standby mode to normal mode Dominant time for wake-up via bus TxD dominant time for time out td(dom-rec) td(stb-nm) tdbus tdom(TxD) Conditions Min. Typ. Max. Normal mode; -500µA < ISPLIT < 500µA Standby mode Normal mode 0.3 x VCC - 0.7 x VCC -5 -3 Cl = 100pF CANH to CANL Cl = 100pF CANH to CANL Crxd = 15pF Crxd = 15pF Cl = 100pF CANH to CANL Cl = 100pF CANH to CANL V 150 160 180 °C between 40 85 105 ns between 30 60 105 ns 55 100 between 25 40 90 105 105 230 ns ns ns between 90 245 ns 10 5 1000 µs µs µs 5 0.75 300 VTxD = 0V 7.5 2.5 650 VCC 3 7 CANH 1 1 nF AMIS42665 RxD 5 VSPLIT Transient Generator 1 nF 4 6 CANL 2 8 15 pF STB GND PC20040829.5 Figure 4: Test Circuit for Automotive Transients AMI Semiconductor – Rev. 3.1, April 06 www.amis.com 7 µA mA 4.7 +5 V TxD +5 +3 3.5 8.5 Measurement Set-Ups and Definitions 100 nF Unit 2.2 CANH, CANL, Vref in tristate below POR level Thermal Shutdown Shutdown junction temperature Tj(sd) Timing Characteristics (see Figure 4 and Figure 5) Delay TXD to bus active td(TxD-BUSon) Data Sheet AMIS-42665 High-Speed Low Power CAN Transceiver VRxD High Low Hysteresis PC20040829.7 0,9 0,5 Vi(dif)(hys) Figure 5: Hysteresis of the Receiver +5 V 100 nF VCC 3 7 TxD 1 AMIS42665 RxD 4 RLT VSPLIT 60 Ω 6 CANL 2 8 15 pF 5 CANH GND STB PC20040829.4 Figure 6: Test Circuit for Timing Characteristics AMI Semiconductor – Rev. 3.1, April 06 www.amis.com 8 CLT 100 pF Data Sheet AMIS-42665 High-Speed Low Power CAN Transceiver Data Sheet HIGH LOW TxD CANH CANL dominant Vi(dif) = VCANH - VCANL 0,9V 0,5V recessive RxD 0,7 x VCC 0,3 x VCC td(TxD-BUSon) td(TxD-BUSoff) td(BUSon-RxD) tpd(rec-dom) td(BUSoff-RxD) tpd(dom-rec) PC20040829.6 Figure 7: Timing Diagram for AC Characteristics +5 V 100 nF VCC 3 7 TxD 6.2 kΩ CANH 10 nF 1 Active Probe AMIS42665 Generator RxD 6 CANL 6.2 kΩ Spectrum Anayzer 30 Ω 4 5 2 8 15 pF STB 30 Ω VSPLIT 47 nF GND PC20040829.9 Figure 8: Basic Test Setup for Electromagnetic Measurement AMI Semiconductor – Rev. 3.1, April 06 www.amis.com 9 AMIS-42665 High-Speed Low Power CAN Transceiver Figure 9: EME Measurements AMI Semiconductor – Rev. 3.1, April 06 www.amis.com 10 Data Sheet AMIS-42665 High-Speed Low Power CAN Transceiver 9.0 Package Outline SOIC-8: Plastic small outline; 8 leads; body width 150mil. AMIS reference: SOIC150 8 150 G AMI Semiconductor – Rev. 3.1, April 06 www.amis.com 11 Data Sheet AMIS-42665 High-Speed Low Power CAN Transceiver Data Sheet 10.0 Soldering 10.1 Introduction to Soldering Surface Mount Packages This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in the AMIS “Data Handbook IC26; Integrated Circuit Packages” (document order number 9398 652 90011). There is no soldering method that is ideal for all surface mount IC packages. Wave soldering is not always suitable for surface mount ICs, or for printed-circuit boards with high population densities. In these situations reflow soldering is often used. 10.2 Re-flow Soldering Re-flow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Several methods exist for re-flowing; for example, infrared/convection heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. Typical re-flow peak temperatures range from 215 to 250°C. The top-surface temperature of the packages should preferably be kept below 230°C. 10.3 Wave Soldering Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. To overcome these problems the double-wave soldering method was specifically developed. If wave soldering is used the following conditions must be observed for optimal results: • Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. • For packages with leads on two sides and a pitch (e): • Larger than or equal to 1.27mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed circuit board; • Smaller than 1.27mm, the footprint longitudinal axis must be parallel to the transport direction of the printed circuit board. The footprint must incorporate solder thieves at the downstream end. • For packages with leads on four sides, the footprint must be placed at a 45º angle to the transport direction of the printed circuit board. The footprint must incorporate solder thieves downstream and at the side corners. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Typical dwell time is four seconds at 250°C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. 10.4 Manual Soldering Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300°C. When using a dedicated tool, all other leads can be soldered in one operation within two to five seconds between 270 and 320°C. Soldering Method Wave BGA, SQFP Not suitable HLQFP, HSQFP, HSOP, Not suitable (2) HTSSOP, SMS PLCC (3) , SO, SOJ Suitable LQFP, QFP, TQFP Not recommended (3)(4) SSOP, TSSOP, VSO Not recommended (5) Package Re-flow(1) Suitable Suitable Suitable Suitable Suitable Notes 1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods. 2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink (at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version). 3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. 4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65mm. 5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5mm. AMI Semiconductor – Rev. 3.1, April 06 www.amis.com 12 AMIS-42665 High-Speed Low Power CAN Transceiver Data Sheet 11.0 Company or Product Inquiries For more information about AMI Semiconductor, our technology and our product, visit our Web site at: http://www.amis.com. North America Tel: +1.208.233.4690 Fax: +1.208.234.6795 Europe Tel: +32 (0) 55.33.22.11 Fax: +32 (0) 55.31.81.12 Devices sold by AMIS are covered by the warranty and patent indemnification provisions appearing in its Terms of Sale only. AMIS makes no warranty, express, statutory, implied or by description, regarding the information set forth herein or regarding the freedom of the described devices from patent infringement. AMIS makes no warranty of merchantability or fitness for any purposes. AMIS reserves the right to discontinue production and change specifications and prices at any time and without notice. AMI Semiconductor's products are intended for use in commercial applications. Applications requiring extended temperature range, unusual environmental requirements, or high reliability applications, such as military, medical life-support or life-sustaining equipment, are specifically not recommended without additional processing by AMIS for such applications. Copyright ©2005 AMI Semiconductor, Inc. AMI Semiconductor – Rev. 3.1, April 06 www.amis.com 13