N04Q1618C2B
AMI Semiconductor, Inc.
ULP Memory Solutions
670 North McCarthy Blvd. Suite 220
Milpitas, CA 95035
PH: 408-935-7777, FAX: 408-935-7770
Advance Information
4Mb Ultra-Low Power Asynchronous CMOS SRAM w/ Dual
Vcc and VccQ for Ultimate Power Reduction
256K×16 bit POWER SAVER TECHNOLOGY
Overview
Features
The N04Q16yyC2B are ultra-low power memory
devices containing a 4 Mbit Static Random Access
Memory organized as 262,144 words by 16 bits.
The device is designed and fabricated using AMI
Semiconductor’s advanced CMOS technology to
provide ultra-low active and standby power. The
device operates with two chip enable (CE1 and
CE2) controls and output enable (OE) to allow for
easy memory expansion. Byte controls (UB and
LB) allow the upper and lower bytes to be
accessed independently. The 4Mb SRAM is
optimized for the ultimate in low power and is
suited for various applications where ultra-lowpower is critical such as medical applications,
battery backup and power sensitive hand-held
devices. The unique page mode operation saves
active operating power and the dual power supply
rails allow very low voltage operation while
maintaining 3V I/O capability. The device can
operate over a very wide temperature range of 0oC
to +70oC for the lowest power and is also available
in the industrial range of -40oC to +85oC. The
devices are available in standard BGA and TSOP
packages. The devices are also available as
Known Good Die (KGD) for embedded package
applications.
• Multiple Power Supply Ranges
1.1V - 1.3V
1.65V - 1.95V
• Dual Vcc / VccQ Power Supplies
1.2V Vcc with 3V VccQ
1.8V Vcc with 3V VccQ
• Very low standby current
50nA typical for 1.2V operation
• Very low operating current
400µA typical for 1.2V operation at 1µs
• Very low Page Mode operating current
80µA typical for 1.2V operation at 1µs
• Simple memory control
Dual Chip Enables (CE1 and CE2)
Byte control for independent byte operation
Output Enable (OE) for memory expansion
• Automatic power down to standby mode
• BGA, TSOP and KGD options
• RoHS Compliant
Product Options
Part Number
Typical
Standby
Current
Vcc
(V)
VccQ
(V)
Speed
(nS)
N04Q1612C2Bx-15C1
50nA
1.2
1.2, 1.8, 3.0
150ns
0.4 mA @ 1MHz
N04Q1618C2Bx-15C1
50nA
150ns
0.4 mA @ 1MHz
N04Q1618C2Bx-70C
200nA
70ns
0.6 mA @ 1MHz
N04Q1618C2Bx-85C
200nA
85ns
0.6 mA @ 1MHz
1.8
1.8, 3.0
Typical
Operating
Operating Current Temperature
0oC to +70oC
1. Part numbers are under development. Please contact your local sales representative for details.
Stock No. 23451-D 11/06
The specification is ADVANCE INFORMATION and subject to change without notice.
1
N04Q1618C2B
AMI Semiconductor, Inc.
Advance Information
Pin Configurations (4Mb)
A4
A3
A2
A1
A0
CE1
I/O0
I/O1
I/O2
I/O3
VCC
VSS
I/O4
I/O5
I/O6
I/O7
WE
A16
A15
A14
A13
A12
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
PIN
ONE
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A5
A6
A7
OE
UB
LB
I/O15
I/O14
I/O13
I/O12
VSS
VCCQ
I/O11
I/O10
I/O9
I/O8
CE2
A8
A9
A10
A11
A17
1
2
3
4
5
6
A
LB
OE
A0
B
I/O8
UB
A3
A1
A2
CE2
A4
CE1
I/O0
C
I/O9
I/O10
A5
A6
I/O1
I/O2
D
VSS
I/O11
A17
A7
I/O3
VCC
E
VCCQ I/O12
NC
A16
I/O4
VSS
F
I/O14 I/O13
A14
A15
I/O5
I/O6
G
I/O15
NC
A12
A13
WE
I/O7
H
NC
A8
A9
A10
A11
NC
48 Pin BGA (top)
TSOP II
Pin Descriptions
Pin Name
Pin Function
A0-A17
Address Inputs
WE
CE1
CE2
OE
LB
UB
I/O0-I/O7
Write Enable Input
Chip Enable 1 Input
Chip Enable 2 Input
Output Enable Input
Lower Byte Enable Input
Upper Byte Enable Input
Lower Byte Data Input/Output
I/O8-I/O15
Upper Byte Data Input/Output
VCC
Core Power
VCCQ
Power for I/O
VSS
Core Ground
NC
Not Connected
Stock No. 23451-D 11/06
The specification is ADVANCE INFORMATION and subject to change without notice.
2
N04Q1618C2B
AMI Semiconductor, Inc.
Advance Information
Functional Block Diagram
Word
Address
Decode
Logic
Address
Inputs
(A1 - A4)
Page
Address
Decode
Logic
(A0, A5 - A17)
4Mb
RAM Array
Input/
Output
I/O0 - I/O7
Mux
and
Buffers
Word Mux
Address
Inputs
I/O8 - I/O15
CE1
CE2
WE
OE
UB
LB
Control
Logic
Functional Description
CE1
CE2
WE
OE
UB1
LB1
I/O0 - I/O151
MODE
POWER
H
X
X
X
X
X
High Z
Standby2
Standby
X
L
X
X
X
X
High Z
Standby2
Standby
L
H
X
X
H
H
High Z
Standby
Standby
L
X3
L1
L1
Data In
Write3
Active
L
L1
L
1
Data Out
Read
Active
H
L1
L1
High Z
Active
Active
L
L
L
H
H
H
H
H
1. When UB and LB are in select mode (low), I/O0 - I/O15 are affected as shown. When LB only is in the select mode only I/O0 - I/O7
are affected as shown. When UB is in the select mode only I/O8 - I/O15 are affected as shown.
2. When the device is in standby mode, control inputs (WE, OE, UB, and LB), address inputs and data input/outputs are internally
isolated from any external influence and disabled from exerting any influence externally.
3. When WE is invoked, the OE input is internally disabled and has no effect on the circuit.
Capacitance1
Item
Symbol
Test Condition
Input Capacitance
CIN
I/O Capacitance
CI/O
Min
Max
Unit
VIN = 0V, f = 1 MHz, TA = 25oC
8
pF
VIN = 0V, f = 1 MHz, TA = 25oC
8
pF
1. These parameters are verified in device characterization and are not 100% tested
Stock No. 23451-D 11/06
The specification is ADVANCE INFORMATION and subject to change without notice.
3
N04Q1618C2B
AMI Semiconductor, Inc.
Advance Information
Absolute Maximum Ratings1
Item
Symbol
Rating
Unit
Voltage on any pin relative to VSS
VIN,OUT
–0.3 to VCC+0.3
V
Voltage on VCC Supply Relative to VSS
VCC
–0.3 to 4
V
Power Dissipation
PD
500
mW
Storage Temperature
TSTG
–40 to 125
o
C
Operating Temperature
TA
-40 to +85
o
C
Soldering Temperature and Time
TSOLDER
o
C
o
260 C, 10sec
1. Stresses greater than those listed above may cause permanent damage to the device. This is a stress rating only and functional operation of the
device at these or any other conditions above those indicated in the operating section of this specification is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect reliability.
Operating Characteristics (Over Specified Temperature Range, 0o - 70o C)
Item
Symbol
Device
Conditions
Min.
Typ
Max
Core Supply Voltage
VCC
I/O Supply Voltage
VCCQ
Input High Voltage
N04Q1612...
1.2V Core Device
1.1
1.2
1.3
N04Q1618...
1.8V Core Device
1.65
1.8
1.95
N04Q1612...
1.2V Core Device
1.1
3.3
N04Q1618...
1.8V Core Device
1.65
3.3
VIH
0.8 x
VCCQ
VCC+0.3
Input Low Voltage
VIL
–0.3
0.2 x
VCCQ
Output High Voltage
VOH
IOH = -100uA
Output Low Voltage
VOL
IOL = 100uA
0.2
V
Input Leakage Current
ILI
VIN = 0 to VCC
0.5
µA
Output Leakage Current
ILO
OE = VIH or Chip
Disabled
0.5
µA
Stock No. 23451-D 11/06
The specification is ADVANCE INFORMATION and subject to change without notice.
VCC–0.2
Unit
V
V
V
V
4
N04Q1618C2B
AMI Semiconductor, Inc.
Advance Information
Power Consumption (TA = 0oC - 70oC)
Device PN
N04Q1612C2Bx15C
N04Q1618C2Bx15C
N04Q1618C2Bx70C/85C
Typ1
Max
50
500
1us
0.4
0.5
150ns
2
3
1us
80
100
150ns
300
450
50
500
Speed
Standby Current2
Isb
Chip Disabled
VCC = 1.3V, VIN = VCC or 0
Read/Write Current3
Icc
Chip Enabled, IOUT = 0
VCC=1.3V, VIN=VIH or VIL
Page Mode Current
Iccp
Chip Enabled, IOUT = 0
VCC=1.3V, VIN=VIH or VIL
Standby Current
Isb
Chip Disabled
VCC = 1.9V, VIN = VCC or 0V
Read/Write Current
Icc
Chip Enabled, IOUT = 0
VCC=1.9V, VIN=VIH or VIL
1us
0.4
0.5
150ns
2
3
Page Mode Current
Iccp
Chip Enabled, IOUT = 0
VCC=1.9V, VIN=VIH or VIL
1us
80
100
150ns
400
500
Standby Current
Isb
Chip Disabled
VCC = 1.9V, VIN = VCC or 0
0.2
1.5
0.6
0.9
Icc
Chip Enabled, IOUT = 0
VCC=1.9V, VIN=VIH or VIL
1us
Read/Write Current
70ns
85ns
6
7
0.1
0.2
Iccp
Chip Enabled, IOUT = 0
VCC=1.9V, VIN=VIH or VIL
1us
Page Mode Current
70ns
85ns
0.8
1
nA
mA
µA
nA
mA
µA
µA
mA
mA
1. Typical values are measured at Vcc=Vcc Typ., TA=25°C and not 100% tested.
2. This device assumes a standby mode if the chip is disabled (CE1 high or CE2 low). In order to achieve low standby current all
inputs must be within 0.2 volts of either VCC or VSS. This applies to all ISB values.
3. This parameter is specified with the outputs disabled to avoid external loading effects. The user must add current required to drive
output capacitance expected in the actual system. This applies to all Icc and Iccp values.
Stock No. 23451-D 11/06
The specification is ADVANCE INFORMATION and subject to change without notice.
5
N04Q1618C2B
AMI Semiconductor, Inc.
Advance Information
Power Savings with Page Mode Operation (WE = VIH)
Page Address
Open page
(A0, A5-A17)
Word Address
(A1-A4)
Word 1
Word 2
...
Word 16
CE1
CE2
OE
LB, UB
Note: Page mode operation is a method of addressing the SRAM to save operating current. The internal
organization of the SRAM is optimized to allow this unique operating mode to be used as a valuable power
saving feature.
The only thing that needs to be done is to address the SRAM in a manner that the internal page is left open
and 16-bit words of data are read from the open page. By treating addresses A1 - A4 as the least
significant bits and addressing the 16 words within the open page, power is reduced to the page mode
value which is considerably lower than standard operating currents for low power SRAMs.
Stock No. 23451-D 11/06
The specification is ADVANCE INFORMATION and subject to change without notice.
6
N04Q1618C2B
AMI Semiconductor, Inc.
Advance Information
Timing Test Conditions
Item
Input Pulse Level
0.1VCC to 0.9 VCC
Input Rise and Fall Time
5ns
Input and Output Timing Reference Levels
0.5 VCC
Output Load
CL = 30pF
Operating Temperature
0 to +70oC
Timing
-70
-85
-150
Units
Item
Symbol
Read Cycle Time
tRC
Address Access Time
tAA
70
85
150
ns
Page Mode Address Access Time
tAAP
70
85
150
ns
Chip Enable to Valid Output
tCO
70
85
150
ns
Output Enable to Valid Output
tOE
35
45
75
ns
Byte Select to Valid Output
tBE
70
85
150
ns
Chip Enable to Low-Z output
tLZ
10
10
10
ns
Output Enable to Low-Z Output
tOLZ
5
5
5
ns
Byte Select to Low-Z Output
tBZ
10
10
10
ns
Chip Disable to High-Z Output
tHZ
0
20
0
20
0
20
ns
Output Disable to High-Z Output
tOHZ
0
20
0
20
0
20
ns
Byte Select Disable to High-Z Output
tBHZ
0
20
0
20
0
20
ns
Output Hold from Address Change
tOH
10
10
10
ns
Write Cycle Time
tWC
70
85
150
ns
Chip Enable to End of Write
tCW
50
60
120
ns
Address Valid to End of Write
tAW
50
60
120
ns
Byte Select to End of Write
tBW,
50
60
120
ns
Write Pulse Width
tWP
40
50
100
ns
Address Setup Time
tAS
0
0
0
ns
Write Recovery Time
tWR
0
0
0
ns
Write to High-Z Output
tWHZ
Data to Write Time Overlap
tDW
40
50
100
ns
Data Hold from Write Time
tDH
0
0
0
ns
End Write to Low-Z Output
tOW
5
5
5
ns
Min.
Max.
70
Min.
Max.
85
20
Stock No. 23451-D 11/06
The specification is ADVANCE INFORMATION and subject to change without notice.
Min.
Max.
150
20
ns
20
ns
7
N04Q1618C2B
AMI Semiconductor, Inc.
Advance Information
Timing of Read Cycle (CE1 = OE = VIL, WE = CE2 = VIH)
tRC
Address
tAA
tOH
Data Out
Previous Data Valid
Data Valid
Timing Waveform of Read Cycle (WE=VIH)
tRC
Address
tAA
tHZ
CE1
tCO
CE2
tLZ
tOHZ
tOE
OE
tOLZ
tBE
LB, UB
tBLZ
Data Out
High-Z
Stock No. 23451-D 11/06
The specification is ADVANCE INFORMATION and subject to change without notice.
tBHZ
Data Valid
8
N04Q1618C2B
AMI Semiconductor, Inc.
Advance Information
Timing Waveform of Page Mode Read Cycle (WE = VIH)
tRC
Page Address
tAAP
tAA
Word Address
tHZ
CE1
tCO
CE2
tOE
tOHZ
OE
tOLZ
tBE
LB, UB
Data Out
tBLZ
High-Z
Stock No. 23451-D 11/06
The specification is ADVANCE INFORMATION and subject to change without notice.
tBHZ
9
N04Q1618C2B
AMI Semiconductor, Inc.
Advance Information
Timing Waveform of Write Cycle (WE control)
tWC
Address
tWR
tAW
CE1
tCW
CE2
tBW
LB, UB
tAS
tWP
WE
tDW
High-Z
tDH
Data Valid
Data In
tWHZ
tOW
High-Z
Data Out
Timing Waveform of Write Cycle (CE1 Control)
tWC
Address
tAW
CE1
(for CE2 Control, use
inverted signal)
tWR
tCW
tAS
tBW
LB, UB
tWP
WE
tDW
tDH
Data Valid
Data In
tLZ
tWHZ
Data Out
Stock No. 23451-D 11/06
The specification is ADVANCE INFORMATION and subject to change without notice.
High-Z
10
N04Q1618C2B
AMI Semiconductor, Inc.
Advance Information
44-Lead TSOP II Package (T44)
18.41±0.13
11.76±0.20
10.16±0.13
0.80mm REF
DETAIL B
0.45
0.30
SEE DETAIL B
1.10±0.15
0o-8o
0.20
0.00
0.80mm REF
Note:
1. All dimensions in inches (Millimeters)
2. Package dimensions exclude molding flash
Stock No. 23451-D 11/06
The specification is ADVANCE INFORMATION and subject to change without notice.
11
N04Q1618C2B
AMI Semiconductor, Inc.
Advance Information
Ball Grid Array Package
0.28±0.05
1.24±0.10
D
A1 BALL PAD
CORNER (3)
1. 0.35±0.05 DIA.
E
2. SEATING PLANE - Z
0.15 Z
0.05
TOP VIEW
Z
SIDE VIEW
1. DIMENSION IS MEASURED AT THE
A1 BALL PAD
MAXIMUM SOLDER BALL DIAMETER.
CORNER
PARALLEL TO PRIMARY Z.
SD
e
SE
2. PRIMARY DATUM Z AND SEATING
PLANE ARE DEFINED BY THE
SPHERICAL CROWNS OF THE
SOLDER BALLS.
3. A1 BALL PAD CORNER I.D. TO BE
MARKED BY INK.
K TYP
J TYP
e
BOTTOM VIEW
Dimensions (mm)
e = 0.75
D
6±0.10
SD
SE
J
K
BALL
MATRIX
TYPE
0.375
0.375
1.125
1.375
FULL
E
8±0.10
Stock No. 23451-D 11/06
The specification is ADVANCE INFORMATION and subject to change without notice.
12
N04Q1618C2B
AMI Semiconductor, Inc.
Advance Information
Ordering Information
N04Q16 XX C2B X - XX X
Temperature
Performance
Package Type
Operating Voltage
C = 0oC - 70oC
70 = 70ns
85 = 85ns
15 = 150ns (under development)
T2 = 44-pin TSOP II Green (RoHS Compliant)
B2 = 48-ball BGA Green (RoHS Compliant)
W = Wafer (KGD)
12 = 1.2V (under development)
18 = 1.8V
Q = Low Power SRAM with VccQ for dual rail operation
Revision History
Revision
Date
Change Description
A
October 2005
Initial Advanced Release
B
February 2006
Raised maximum Vcc to 3.6V for 3V device
Added green packages
Changed dual rail to ‘Q’ part designator
C
July 2006
Seperated 1,8V dual rail and 3V single rail
Updated VccQ for TSOP
D
September 2006
Converted to AMI Semiconductor
© 2006 AMI Semiconductor, Inc. All rights reserved.
AMI Semiconductor, Inc. ("AMIS") reserves the right to change or modify the information contained in this data sheet and the products described therein, without prior notice.
AMIS does not convey any license under its patent rights nor the rights of others. Charts, drawings and schedules contained in this data sheet are provided for illustration purposes only and they vary depending upon specific applications.
AMIS makes no warranty or guarantee regarding suitability of these products for any particular purpose, nor does AMIS assume any liability arising out of the application or use of
any product or circuit described herein. AMIS does not authorize use of its products as critical components in any application in which the failure of the AMIS product may be
expected to result in significant injury or death, including life support systems and critical medical instruments.
Stock No. 23451-D 11/06
The specification is ADVANCE INFORMATION and subject to change without notice.
13