AMSCO AS1105

Data Sheet AS1105
Serially Interfaced, 4-Digit LED Driver
AS1105
DATA SHEET
Key Features
-
Cost effective version of AS1100 functionality for
applications up to 4-Digits
10MHz Serial Interface
Individual LED Segment Control
Decode/No-Decode Digit Selection
20µA Low-Power Shutdown (Data Retained)
Extremely low Operating Current 0.5mA in open loop
Digital and Analog Brightness Control
Display Blanked on Power-Up
Drive Common-Cathode LED Display
Software Reset 1
Optional External clock
20 pin SO Packages
Every individual segment can be addressed and updated
separately. Only one external resistor is required to set the
current through the LED display. Brightness can be
controlled either in an analog or digital way. The user can
choose the internal code-B decoder to display numeric
digits or to address each segment directly. The AS1105
features an extremely low shutdown current of only 20µA.
and an operational current of less than 500µA. The number
of visible digits can be programmed as well. The AS1105
can be reset by software and an external clock can be used.
Several test modes support easy debugging.
AS1105 is offered in a 20 SOIC package.
Applications
-
General Description
-
The AS1105 is an LED driver for 7 segment numeric
displays of up to 4 digits. The AS1105 can be programmed
via a conventional 4 wire serial interface. It includes a BCD
code-B decoder, a multiplex scan circuitry, segment and
display drivers and a 32 Bit memory. The memory is used to
store the LED settings, so that continuous reprogramming is
not necessary.
TOP
18 SEG E
4
17 SEG C
DIG2 5
16 VDD
DIG3 6
15 ISET
GND
7
AS1105
14 SEG G
DIG1 8
13
SEG B
9
12
SEG F
CLK 10
11
SEG A
LOAD
-
+5V
19 SEG DP
2
DIG0 3
GND
-
20 SEG D
DOUT 1
DIN
-
Bar-Graph Displays
Industrial Controllers
Panel Meters
LED Matrix Displays
White Goods
9.53k
VDD
ISET
MOSI
µP I/O
SCK
DIG0-DIG3
4 Digits
DIN
LOAD
CLK
SEG A-G
SEP DP
GND GND
8 Segments
SO
Pin Configuration
Typical Application Circuit
4-Digit µP Display
Software Reset and external clock are not supported by
MAX7219
1
Revision 1.32, Oct. 2004
Page 1 of 12
Data Sheet AS1105
Absolute Maximum Ratings
Voltage (with respect to GND)
VDD
DIN, CLK, LOAD
All Other Pins
-0.3V to 6V
-0.3V to 6V
-0.3V to (VDD +0.3V)
Current
DIG0–DIG3 Sink Current
SEGA–G, DP Source Current
500mA
100mA
Continuous Power Dissipation (TA = +85°C)
Wide SO (derate 11.8mW/°C above +70°C)
941mW
Operating Temperature Ranges (T MIN to T MA X )
AS1105xL
AS1105xE
Storage Temperature Range
Package body temperature 2
0°C to +70°C
-40°C to +85°C
-65°C to +150°C
+240°C
Electrical Characteristics
(VDD = 5V, R SET = 9.53kΩ±1%, T A = T MIN to T MAX , unless otherwise noted.)
Parameter
Operating Supply Voltage
Symbol Conditions
VDD
All digital inputs at VDD or GND, T A =
Shutdown Supply Current
IDD SD
+25°C
R SET = open circuit
Operating Supply Current
IDD All segments and decimal point on, I SEG = 40mA
Display Scan Rate
f OSC
Digit Drive Sink Current
I DIGIT V OUT = 0.65V
Segment Drive Source Current
I SEG T A = +25°C, V OUT = (VDD -1V)
Segment Drive Current
∆I SEG
Matching
Digit Drive Source Current
I DIGIT Digit off, V DIG IT = (VDD -0.3V)
Segment Drive Sink Current
I SEG Segment off, V SEG = 0.3V
Logic Inputs
Input Current DIN, CLK, LOAD I IH , I IL V IN = 0V or VDD
Logic High Input Voltage
V IH
2
Min
4.0
Typ
5.0
Max
5.5
Units
V
20
50
µA
500
µA
330
500
320
-30
mA
800
1300
-40
-45
Hz
mA
mA
3.0
%
-2
5
-1
3.5
mA
mA
1
µA
V
The reflow peak soldering temperature (body temperature) is specified according IPC/JEDEC J-STD-020B “Moisture/Reflow Sensitivity
Classification for non-hermetic Solid State Surface Mount Devices”.
Revision 1.32, Oct. 2004
Page 2 of 12
Data Sheet AS1105
Parameter
Logic Low Input Voltage
Output High Voltage
Output Low Voltage
Hysteresis Voltage
Timing Characteristics
CLK Clock Period
CLK Pulse Width High
CLK Pulse Width Low
CLK Rise to LOAD Rise Hold
Time
DIN Setup Time
DIN Hold Time
Output Data Propagation Delay
LOAD Rising Edge to Next
Clock Rising Edge
Minimum LOAD Pulse High
Data-to-Segment Delay
Symbol
V IL
V OH
V OL
VI
Conditions
DOUT, I SOURCE = -1mA
DOUT, I SINK = 1.6mA
DIN, CLK, LOAD
Min
Typ
Max
0.8
VDD - 1
0.4
1
Units
V
V
V
V
t CP
t CH
t CL
100
50
50
ns
ns
ns
t CSH
0
ns
t DS
t DH
t DO
25
0
ns
ns
ns
C LOAD = 50pF
25
t LDCK
50
t CSW
t DSPD
50
ns
2.25
ns
ms
Pin Description
Pin
Name
1
DOUT
2
DIN
3,8,5,6
DIG0–DIG3
4, 7
GND
9
LOAD
10
CLK
11–14, 17–20
SEG A–G,
DP
15
ISET
16
VDD
Revision 1.32, Oct. 2004
Function
Serial data output for cascading drivers. The output is valid after 16.5 clock cycles. The
output is never set to high impedance.
Data input. Data is programmed into the 16Bit shift register on the rising CLK edge
4 digit driver lines that sink the current from the common cathode of the display.
In shutdown mode the AS1105 switches the outputs to VDD
both GND pins must be connected
Strobe input. With the rising edge of the LOAD signal the 16 bit of serial data is latched into
the register.
Clock input. The interface is capable to support clock frequencies up to 10MHz. The serial
data is clocked into the internal shift register with the rising edge of the CLK signal. On the
DOUT pin the data is applied with the falling edge of CLK.
Seven segment driver lines including the decimal point. When a segment is turned off the
output is connected to GND.
The current into I SET determines the peak current through the segments and therefore the
brightness.
Positive Supply Voltage (+5V)
Page 3 of 12
Data Sheet AS1105
t CSW
LOAD
t CS
t CL
t CP
t CH
t LDCK
CLK
t DH
t DS
DIN
D15
D1
D14
D0
t DO
DOUT
Figure 1: Timing diagram
D15 D14 D13 D12 D11 D10 D9
X
X
X
X
Address
D8
D7 D6
MSB
D5
D4 D3
Data
D2
D1
D0
LSB
Table 1: Serial data format (16 bits)
Detailed Description
Serial-Addressing Modes
Programming of the AS1105 is done via the 4 wire serial
interface. A programming sequence consists of 16-bit
packages. The data is shifted into the internal 16 Bit
register with the rising edge of the CLK signal. With the
rising edge of the LOAD signal the data is latched into a
digital or control register depending on the address. The
LOAD signal must go to high after the 16 th rising clock
edge. The LOAD signal can also come later but just before
the next rising edge of CLK, otherwise data would be lost.
The content of the internal shift register is applied 16.5
clock cycles later to the DOUT pin. The data is clocked out
at the falling edge of CLK. The Bits of the 16Bitprogramming package are described in table 1. The first 4
Bits D15-D12 are ”don’t care, D11-D8 contain the address
and D7-D0 contain the data. The first bit is D15, the most
significant bit (MSB). The exact timing is given in figure 1.
Digit and Control Registers
The AS1105 incorporates 12 registers, which are listed in
Table 2. The digit and control registers are selected via the
4Bit address word. The 4 digit registers are realized with a
Revision 1.32, Oct. 2004
32bit memory. Each digit can be controlled directly without
rewriting the whole contents. The control registers consist
of decode mode, display intensity, number of scanned
digits, shutdown, display test and reset/external clock
register.
Shutdown Mode
The AS1105 features a shutdown mode, where it consumes
only 20µA current. The shutdown mode is entered via a
write to register 0Ch. Then all segment current sources are
pulled to ground and all digit drivers are connected to VDD,
so that nothing is displayed. All internal digit registers keep
the programmed values. The shutdown mode can either be
used for power saving or for generating a flashing display
by repeatedly entering and leaving the shutdown mode. The
AS1105 needs typically 250µs to exit the shutdown mode.
During shutdown the AS1105 is fully programmable. Only
the display test function overrides the shutdown mode.
Initial Power-Up
After powering up the system all register are reset, so that
the display is blank. The AS1105 starts the shutdown mode.
All registers should be programmed for normal operation.
The default settings enable only scan of one digit, the
internal decoder is disabled, data register and intensity
register are set to the minimum value.
Page 4 of 12
Data Sheet AS1105
Decode-Mode Register
In the AS1105 a BCD decoder is included. Every digit can
be selected via register 09h to be decoded. The BCD code
consists of the numbers 0-9, E,H, L,P and -. In register 09h
a logic high enables the decoder for the appropriate digit. In
case that the decoder is bypassed (logic low) the data Bits
D7-D0 correspond to the segment lines of the AS1105. In
table 4 some possible settings for register 09h are shown.
Bit D7, which corresponds to the decimal point, is not
affected by the settings of the decoder. Logic high means
that the decimal point is displayed. In table 5 the font of the
Code B decoder is shown. In table 6 the correspondence of
the register to the appropriate segments of a 7 segment
display is shown (see figure 2)
should be adjusted accordingly. Table 9 shows the
maximum allowed current, when fewer than 4 digits are
used. To avoid differences in brightness the scan limit
register should not be used to blank portions of the display
(leading zeros).
Register
No-Op
Digit 0
Digit 1
Digit 2
Digit 3
Decode
Mode
Intensity
Scan Limit
Shutdown
Not used
Reset and
ext. Clock
Display
Test
Intensity Control and Interdigit Blanking
Brightness of the display can be controlled in an analog way
by changing the external resistor (R SET ). The current, which
flows between VDD and I SET , defines the current that flows
through the LEDs. The LED current is 100 times the I SET
current. The minimum value of R SET should be 9.53kΩ,
which corresponds to 40mA segment current. The
brightness of the display can also be controlled digitally via
register 0Ah. The brightness can be programmed in 16
steps and is shown in table 7. An internal pulse width
modulator controls the intensity of the display.
No decode for digits 4–0
Code B decode for digit 0
No decode for digits 4–1
Code B decode for digits
3–0
Code B decode for digits
4–0
Register Data
D4 D3 D2
0
0
0
D7
0
D6
0
D5
0
0
0
0
0
0
0
0
0
0
1
1
1
1
D9
0
0
1
1
0
D8
0
1
0
1
0
Hex
Code
0xX0
0xX1
0xX2
0xX3
0xX4
X
1
0
0
1
0xX9
X
X
X
X
1
1
1
1
0
0
1
1
1
1
0
0
0
1
0
1
0xXA
0xXB
0xXC
0xXD
X
1
1
1
0
0xXE
X
1
1
1
1
0xXF
Table 2: Register address map
Address Code
Register Data
D7 D6 D5 D4 D3 D2 D1 D0
(Hex)
Mode
Scan-Limit Register
The scan limit register 0Bh selects the number of digits
displayed. When all 4 digits are displayed the update
frequency is typically 800Hz. If the number of digits
displayed is reduced, the update frequency is reduced as
well. The frequency can be calculated using 8fOSC/N,
where N is the number of digits. Since the number of
displayed digits influences the brightness, the resistor R SET
Decode Mode
Address
D15–D12 D11 D10
X
0
0
X
0
0
X
0
0
X
0
0
X
0
1
Shutdown
Mode
Normal
Operation
0xXC
X
X
X
X
X
X
X
0
0xXC
X
X
X
X
X
X
X
1
Table 3: Shutdown register format (address (hex) = 0xXC)
Hex Code
D1
0
D0
0
0
0
1
0x01
1
1
1
1
0x0F
1
1
1
1
0xFF
0x00
Table 4: Decode-mode register examples (address (hex) = 0xX9)
Revision 1.32, Oct. 2004
Page 5 of 12
Data Sheet AS1105
7-Segment
Register Data
D7*
Character
On Segments = 1
D6–D4
D3
D2
D1
D0
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
2
3
4
5
6
7
8
9
—
E
H
L
P
blank
DP*
A
B
C
D
E
F
G
1
0
1
1
0
1
1
1
1
1
0
1
0
0
1
0
1
1
1
1
1
0
0
1
1
1
0
0
1
0
1
0
1
1
0
1
1
1
1
1
1
1
0
0
1
0
0
0
1
0
1
1
0
1
1
0
1
1
0
1
0
1
0
0
1
0
1
0
0
0
1
0
1
0
0
1
1
1
1
0
1
0
0
0
1
1
1
0
1
1
0
1
1
1
1
0
0
0
1
1
1
1
1
0
1
1
1
1
1
0
1
0
Table 5: Code B font
*The decimal point is set by bit D7 = 1
Corresponding
Segment Line
D7
D6
Register Data
D5 D4 D3 D2
DP
A
B
C
D
E
D1
D0
F
G
Table 6: No-decode mode data bits and corresponding segment lines
A
F
G
B
C
E
D
DP
Figure 2: Standard 7-segment LED
Revision 1.32, Oct. 2004
Page 6 of 12
Data Sheet AS1105
Duty Cycle
1/32 (min on)
3/32
5/32
7/32
9/32
11/32
13/32
15/32
17/32
19/32
21/32
23/32
25/32
27/32
29/32
31/32 (max on)
D7
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
D6
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
D5
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
D4
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
D3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
D2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
D1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
D0 Hex Code
0
0xX0
1
0xX1
0
0xX2
1
0xX3
0
0xX4
1
0xX5
0
0xX6
1
0xX7
0
0xX8
1
0xX9
0
0xXA
1
0xXB
0
0xXC
1
0xXD
0
0xXE
1
0xXF
Table 7: Intensity register format (address (hex) = 0xXA)
Scan Limit
Display
Display
Display
Display
digit 0 only
digits 0 & 1
digits 0 1 2
digits 0 1 2 3
D7
X
X
X
X
D6
X
X
X
X
D5
X
X
X
X
Register Data
D4 D3 D2
X
X
0
X
X
0
X
X
0
X
X
0
D1
0
0
1
1
D0
0
1
0
1
Hex Code
0xX0
0xX1
0xX2
0xX3
Table 8: Scan-limit register format (address (hex) = 0xXB)
Display Test Register
With the display test register 0Fh all LED can be tested. In
the test mode all LEDs are switched on at maximum
brightness (duty cycle 31/32). All programming of digit and
control registers is maintained. The format of the register is
given in table 10.
Number of
Digits
Displayed
1
2
3
Maximum
Segment Current
(mA)
10
20
30
Table 9: Maximum segment current for 1-, 2-, or 3-digit displays
Revision 1.32, Oct. 2004
Register Data
D7 D6 D5 D4 D3 D2 D1 D0
Normal Operation X X X X X X X
0
Display Test
X X X X X X X
1
Mode
Mode
Table 10: Display-test register format (address (hex) = 0xXF)
Note: The AS1105 remains in display-test mode until the
display-test register is reconfigured for normal operation.
No-Op Register (Cascading of AS1105)
The no-operation register 00h is used when AS1105s are
cascaded in order to support more than 4 digit displays. The
cascading must be done in a way that all DOUT are
connected to DIN of the following AS1105. The LOAD and
CLK signals are connected to all devices. For a write
operation for example to the fifth device the command must
be followed by four no-operation commands.
Page 7 of 12
Data Sheet AS1105
When the LOAD signal finally goes to high all shift registers
are latched. The first four devices have got no-operation
commands and only the fifth device sees the intended
command and updates its register.
Reset and external Clock Register 3
This register is addressed via the serial interface. It allows
to switch the device to external clock mode (If D0=1 the
CLK pin of the serial interface operates as system clock
input.) and to apply an external reset (D1). This brings all
registers (except reg. E) to default state. For standard
operation the register contents should be "00h".
Address
Register Data
code (hex) D7 D6 D5 D4 D3 D2 D1 D0
Mode
Normal Operation,
internal clock
Normal Operation,
external clock
Reset state,
internal clock
Reset state,
external clock
0xXE
X
X
X
X
X
X
0
0
0xXE
X
X
X
X
X
X
0
1
0xXE
X
X
X
X
X
X
1
0
0xXE
X
X
X
X
X
X
1
1
Applications Information
Supply Bypassing and Wiring
In order to achieve optimal performance the AS1105 shall
be placed very close to the LED display to minimize effects
of electromagnetic interference and wiring inductance.
Furthermore it is recommended to connect a 10µF
electrolytic and a 0.1µF ceramic capacitor between VDD
and GND to avoid power supply ripple. Also, both GNDs
must be connected to ground.
Selecting R SET Resistor and Using External Drivers
The current through the segments is controlled via the
external resistor R SET . Segment current is about 100 times
the current in I SET . The right values for I SET are given in
table 12. The maximum current the AS1105 can drive is
40mA. If higher currents are needed, external drivers must
be used. In that case it is no longer necessary that the
AS1105 drives high currents. A recommended value for
R SET is 47kΩ. In cases that the AS1105 only drives few
digits table 9 specifies the maximum currents and R SET must
be set accordingly. Refer to absolute maximum ratings to
calculate acceptable limits for ambient temperature,
segment current, and the LED forward-voltage drop.
Table 11: Reset and external Clock register (address (hex) = 0xXE)
I SEG (mA)
40
30
20
10
1.5
12.2
17.8
29.8
66.7
2.0
11.8
17.1
28.0
63.7
V LED (V)
2.5
11.0
15.8
25.9
59.3
3.0
10.6
15.0
24.5
55.4
3.5
9.69
14.0
22.6
51.2
Table 12: RSET vs. segment current and LED forward voltage
3
This register is not used by MAX7219, since it does not support
software reset and external clocks
Revision 1.32, Oct. 2004
Page 8 of 12
Data Sheet AS1105
4x8 LED Dot Matrix Driver
The example in Figure 3 uses the AS1105 to drive an 4x8 LED dot matrix. The LED columns have common cathode
and are connected to the DIG0-3 outputs. The rows are connected to the segment drivers. Each of the 32 LEDs can
be addressed separately. The columns are selected via the digits as shown in Table 2. The decode mode register
(0xX9) has to be programmed to ‘00000000’ as stated in Table 4. The single LEDs in a column can be addressed as
stated in Table 6, where D0 corresponds to segment G and d/ to segment DP. For a multiple digit dot matrix several
AS1105 have to be cascaded.
Diode Arrangement
SEG G
SEG F
SEG E
SEG D
SEG C
SEG B
SEG A
SEG DP
4x8 LED Dot
M t i
DIG 0
µP
SEG A-G DIG 0-3
24
DOUT
SEP DP
19
1
VDD
DIN
12
LOA
1
CLK
18
9
GND GND ISET
4
DIG 3
VBAT
DIG 3
DIG 0
SEG A-G DIG 0-3
SEP DP
1
12
9.53k
4x8 LED Dot
M t i
SEG G
SEG F
SEG E
SEG D
SEG C
SEG B
SEG A
SEG DP
1
9
DIN
VDD
19
VBAT
18
9.53k
LOA
CLK
GND GND
4
ISET
Figure 3: Application example as LED dot matrix driver
Cascading Drivers
The AS1105 can be cascaded as well. The DOUT pin must be connected to the DIN pin of the following AS1105.
Thermal Resistance (θ
θ JA )
Package
20 Wide SO
+85°C/W
Maximum Junction Temperature (T J ) = +150°C
Maximum Ambient Temperature (T A ) = +85°C
Table 13: Package thermal resistance data
Revision 1.32, Oct. 2004
Page 9 of 12
Data Sheet AS1105
Computing Power Dissipation
The upper limit for power dissipation (PD) for the AS1105 is determined from the following equation:
PD = (VDD x 0.5mA) + (VDD - V LED )(DUTY x I SEG x N)
where:
VDD = supply voltage
DUTY = duty cycle set by intensity register
N = number of segments driven (worst case is 4)
V LED = LED forward voltage
I SEG = segment current set by R SET
Dissipation Example:
I SEG = 40mA, N = 4, DUTY = 31/32, V L ED = 1.8V at 40mA, VDD = 5.25V
PD = 5.25V(0.5mA) + (5.25V - 1.8V)(31/32 x 40mA x 4) = 0.54W
Thus, for a SO package θ JA = +85°C/W (from Table 13), the maximum allowed ambient temperature T A is given by:
T J,MAX = T A + PD x θ J A = 150°C = T A +0.54W x 85°C/W.
where T A = +104°C.
Package Information
Revision 1.32, Oct. 2004
Page 10 of 12
Data Sheet AS1105
Figure 4: SOIC-20 package dimensions
Segment Driver Capability, VDD = 5V, Logic Level = High
50
Upper Limit
45
40
Segment Current in mA
35
Lower Limit
30
25
20
15
10
5
0
0
0.5
1
1.5
2
2.5
3
Voltage below VDD at output in V
3.5
4
4.5
Figure 5: Segment driver capability
Revision 1.32, Oct. 2004
Page 11 of 12
Data Sheet AS1105
Segment Current = f(RSET)
50
45
40
ISEGMENT in mA
35
30
25
20
15
10
5
0
1
2
10
10
RSET in kOhm
Figure 6: Segment Current versa R S E T
Ordering Information
Part
AS1105WL
AS1105WE 4
AS1105WL-T
Temp Range
Pin
Package
0°C to +70°C 24 Wide SO
-40°C to +85° 24 Wide SO
0°C to +70°C 24 Wide SO
Contact
austriamicrosystems AG
A 8141 Schloss Premstätten, Austria
T. +43 (0) 3136 500 0
F. +43 (0) 3136 525 01
info@austriamicrosystems.com
Copyright
Delivery
Form
Tubes
T&R
Copyright © 2004 austriamicrosystems. Trademarks
registered ®. All rights reserved. The material herein may
not be reproduced, adapted, merged, translated, stored, or
used without the prior written consent of the copyright
owner. To the best of its knowledge, austriamicrosystems
asserts that the information contained in this publication is
accurate and correct.
Austriamicrosystems reserves the right to change the circuitry and
specifications without notice at any time.
4
Revision 1.32, Oct. 2004
Contact factory for availability
Page 12 of 12