ANADIGICS ATA01502D1C

ATA01502
AGC Transimpedance Amplifier
SONET OC-3
PRELIMINARY DATA SHEET-Rev 2
FEATURES
·
Single +5 Volt Supply
·
Automatic Gain Control
·
100 µm
VDD2
-41 dBm Sensitivity
·
0 dBm Optical Overload
·
120 MHz Bandwidth
VDD1
GND
GND
925 µm
IIN
APPLICATIONS
·
SONET OC-3/SDH STM-1 (155 Mb/s) Receiver
·
FDDI, Ethernet Fiber LAN
·
Low Noise RF Amplifier
GND
GND
VOUT
GND
CBY
GND
CBY
GND
CAGC
GND
1250 µm
D1
PRODUCT DESCRIPTION
The ANADIGICS ATA01502 is a 5V low noise
transimpedance amplifier with AGC designed to be
used in OC-3/STM-1 fiber optic links. The device is
used in conjunction with a photodetector (PIN diode
or avalanche photodiode) to convert an optical signal
into an output voltage. The ATA01502 offers a
bandwidth of 120MHz and a dynamic range of 42dB.
It is manufactured in a GaAs MESFET process and
is available in bare die form.
VDD1
VDD2
AGC
40K
70K
CAGC
+
4.5pF
IIN
GND
or
neg.supply
+ 0.8
- 45
VOUT
VGA
US PATENT
GND
CBY
Photodector cathode must be connected to IIN
for proper AGC Operation
Figure 1: Equivalent Circuit
08/2001
ATA01502
100 µm
V DD2
V DD1
GND
GND
925 µm
I IN
GND
V OUT
GND
GND
GND
CBY
CBY
GND
C AGC
GND
1250 µm
Figure 2: Bonding Pad Layout
Table 1: Pad Description
PAD
D escription
C omment
V DD1
V DD1
Posi ti ve supply for i nput gai n stage
V DD2
V DD2
Posi ti ve supply for second gai n stage
TIA Input C urrent
C onnect detector cathode for proper operati on
VOUT
TIA Output Voltage
Requi res external D C block
C AGC
External AGC C apaci tor
70K* (4.5p + C AGC ) = AGC Ti me C onstant
C BY
Input Gai n Stage Bypass
C apaci tor
>56 pF
IIN
ELECTRICAL CHARACTERISTICS
Table 2: Absolute Maximum Ratings
V DD1
7.0 V
V DD2
7.0 V
IIN
5 mA
TA
Operati ng Temp. - 40 °C to 125 °C
TS
Storage Temp. - 65 °C to 150 °C
Stresses in excess of the absolute ratings may cause
permanent damage. Functional operation is not
implied under these conditions. Exposure to absolute
ratings for extended periods of time may adversely
affect reliability.
2
PRELIMINARY DATA SHEET - Rev 2
08/2001
ATA01502
Table 3: Electrical Specifications (1)
(TA = 25°C, VDD =+5.0V + 10%, CDIODE + CSTRAY = 0.5 pF, Det. cathode to IIN)
PAR AMETER
Transresi stance (RL= ¥ ,IDC<500nA)
Transresi stance (RL=50 W)
(1)
Bandwi dth -3dB
MIN
TYP
20
30
9.5
13
110
120
Output Resi stance
60
30
45
1.0
1.4
Volts
1.4
15
Volts
mA
1
dB m
(3)
0
(4)
KW
MHz
W
50
Output Offset Voltage
AGC Threshold (IIN)
10
30
Supply C urrent
Input Offset Voltage
U N IT
KW
1000
Input Resi stance (2)
Opti cal Overload
MAX
W
mA
12
nA
16
m se c
Offset Voltage D ri ft
1
mV/ º C
Opti cal Sensi ti vi ty (7)
-41
dB m
Input Noi se C urrent
(5)
AGC Ti me C onstant (6)
Operati ng Voltage Range
+ 4.5
Operati ng Temperature Range
- 40
Thermal Resi stance
+ 5.0
+ 6.0
85
20
Volts
ºC
ºC /W
Notes:
1. f = 50MHz
2. Measured with Iin below AGC Threshold. During AGC, input impedance will drecrease
proportionally to Iin.
3. Defined as the Iin where Transresistance has decreased by 50%.
4. See note on “Indirect Measurement of Optical Overload.”
5. See note on “Measurement of Input Referred Noise Current.”
6. CAGC = 220 pF
7. Parameter is guaranteed (not tested) by design and characterization data @155 Mb/s,
assuming dectector responsivity of 0.95.
PRELIMINARY DATA SHEET - Rev 2
08/2001
3
ATA01502
APPLICATION INFORMATION
V DD
56pF
56pF
V DD2
V DD1
G ND
GN D
PIN
I IN
V OUT
G ND
GN D
G ND G ND
CBY
CBY
56pF
GND
C AGC
OUT
G ND
56pF
Figure 3: ATA 01502D1C Typical Bonding Diagram
General Layout Considerations
Since the gain stages of the transimpedance
amplifier have an open loop bandwidth in excess of
1.0 GHz, it is essential to maintain good high
frequency layout practices. To prevent oscillations, a
low inductance RF ground plane should be made
available for power supply bypassing. Traces that
can be made short should be made short. The utmost
care should be taken to maintain very low capacitance
at the photodiode TIA interface (I IN), as excess
capacitance at this node will cause a degradation in
4
bandwidth and sensitivity (see Bandwidth vs. CT
curves).
C T = 0.5 pF
140
VDD = 5.5 V
130
Bandwidth (MHz)
Power Supplies and General Layout Considerations
The ATA01502D1C may be operated from a positive
supply as low as + 4.5 V and as high as + 6.0 V.
Below + 4.5 V, bandwidth, overload and sensitivity
will degrade, while at + 6.0 V, bandwidth, overload
and sensitivity improve (see “Bandwidth vs.
Temperature” curves). Use of surface mount
(preferably MIM type capacitors), low inductance
power supply bypass capacitors (>=56pF) are
essential for good high frequency and low noise
performance. The power supply bypass capacitors
should be mounted on or connected to a good low
inductance ground plane.
120
VDD = 5.0 V
110
VDD = 4.5 V
100
90
-40
10
60
85
Temperature ( OC)
Figure 4: Bandwidth vs. Temperature
PRELIMINARY DATA SHEET - Rev 2
08/2001
ATA01502
Bandwith (MHz)
B(3dB)~ A / 2 π RF(CIN +CT)
140
VDD = 5.5 V
130
VDD = 5.0 V
120
RF
VDD =4.5 V
110
VDD = 4.5 V
100
90
900
VDD = 5.5 V
0
0 .2
0 .4
0 .6
IIN
0 .8
1 .0
1 .2
1 .4
1 .6
- 2.2
- 1.7
1502
50 Ω
- 1.2
CT (pF)
Bandwidth (MHz)
2500
150
- 0.7
120
- 0.2
IIN (mA DC)
Figure 5: Bandwidth vs. CT
Figure 7: Bandwidth vs. IIN
Note: All performance curves are typical @ TA =25 °C
unless otherwise noted.
13.0
RF
11.0
9.0
I
IIN
50 Ω
7.0
5.0
3.0
VDD = 5.5 V
1.0
VDD = 4.5 V
-2.2
- 1.7
-1.2
- 0.7
IIN (mA DC)
VOUT Connection
The output pad should be connected via a coupling
capacitor to the next stage of the receiver channel
(filter or decision circuits), as the output buffers are
not designed to drive a DC coupled 50 ohm load
(this would require an output bias current of
approximately 36 mA to maintain a quiescent 1.8
Volts across the output load). If VOUT is connected to a
high input impedance decision circuit (>500 ohms),
then a coupling capacitor may not be required,
although caution should be exercised since DC
offsets of the photo detector/TIA combination may
cause clipping of subsequent gain or decision
circuits.
heavy AGC
Output Collapse
VDD =5.5 V
Linear Region
RF
IIN
0.0
1502
- 0.2
VDD =4.5 V
Figure 6: Transimpedance vs. IIN
- 5
- 4
- 3
VOUT
3.4
3.2
3.0
2.9
2.7
2.5
2.4
2.2
2.0
1.9
1.7
1.5
1.4
1.2
1.0
0.8
0.7
0.5
0.3
0.2
0.0
VOUT (Volts)
15.0
Transimpedance (K Ohm)
IIN Connection
(Refer to the equivalent circuit diagram) Bonding the
detector cathode to IIN (and thus drawing current from
the ATA01502D1C) improves the dynamic range. The
detector may be used in the reverse direction for input
currents not exceeding 13 mA, however the
specifications for optical overload will not be met.
- 2
IIN (mA DC)
Figure 8: VOUT vs. IIN
PRELIMINARY DATA SHEET - Rev 2
08/2001
5
ATA01502
VDD = 5.5 V
VDD = 5.0V
1.35
1.30
1.25
1.20
1.15
- 40
VDD = 4.5V
10
60
Temperature (OC)
Figure 9: Input Offset Voltage vs. Temperature
CBY Connection
The CBY pad must be connected via a low inductance
path to a surface mount capacitor of at least 56pF
(additional capacitance can be added in parallel with
the 56 pF or 220 pF capacitors to improve low
frequency response and noise performance).
Referring to the equivalent circuit diagram and the
typical bonding diagram, it is critical that the
connection from CBY to the bypass capacitor use two
bond wires for low inductance, since any high
frequency impedance at this node will be fed back to
the open loop amplifier with a resulting loss of
transimpedance bandwidth. Two pads are provided
for this purpose.
Sensitivity and Bandwidth
In order to guarantee sensitivity and bandwidth
performance, the TIA is subjected to a
comprehensive series of tests at the die sort level
(100% testing at 25 oC) to verify the DC parametric
performance and the high frequency performance
(i.e. adequate |S21|) of the amplifier. Acceptably high
|S21| of the internal gain stages will ensure low
amplifier input capacitance and hence low input
referred noise current. Transimpedance sensitivity
and bandwidth are then guaranteed by design and
correlation with RF and DC die sort test results. In
applications that require - 41 dBm sensitivity, a low
capacitance (< 0.5pF) and high responsitivity (> 0.95)
photodiode must be used.
6
Measurement of Input Referred Noise Current
The “Input Noise Current” is directly related to
sensitivity. It can be defined as the output noise
voltage (VOUT), with no input signal, (including a 100
MHz lowpass filter at the output of the TIA) divided by
the AC transresistance.
8
RF
7
6
Hz
1.45
1.40
Indirect Measurement of Optical Overload
Optical overload can be defined as the maximum
optical power above, which the BER (bit error rate)
increases beyond 1 error in 10 10 bits. The
ATA01502D1C is 100% tested at die sort by a DC
measurement, which has excellent correlation with
a PRBS optical overload measurement. The
measurement consists of sinking a negative current
(see VOUT Vs IIN figure) from the TIA and determining
the point of output voltage collapse. In addition, the
input node virtual ground during “heavy AGC” is
checked to verify that the linearity (i.e. pulse width
distortion) of the amplifier has not been
compromised. As a final test, a DC transfer curve is
performed on every die at the wafer level to ensure
excellent overload performance.
pA/
Input Offset Voltage
1.55
1.50
CT
5
1502
50 Ω
4
CT = 1.0pF
3
2
1
CT =0.5pF
1
10
100
1000
Frequency (MHz)
Figure 10: Input Referred Noise Spectral Density
PRELIMINARY DATA SHEET - Rev 2
08/2001
ATA01502
13
12
0.5pF
TIA
100
MHz
LPF
11
VDD = 5.5V
10
η(dBm) = 10 LOG
09
- 40
0
180
VDD = 4.5 V
25 dB
40
Degrees
Input Referred Noise in (nA RMS)
Input Referenced Noise Test Circuit
14
200
220
RF
IIN
6500i n
R
240
VOUT
1502
0.5pF
80
50
100
Frequency (MHz)
Temperature (OC)
FIgure 11: Input Referred Noise vs Temperature
150
Figure 12: Phase (IIN to VOUT)
AGC Capacitor
It is important to select an external AGC capacitor of
high quality and appropriate size. The ATA01502D1C
has an on-chip 70 K W resistor with a shunt 4.5-pF
capacitor to ground. Without external capacitance,
the chip will provide an AGC time constant of 315 nS.
For the best performance in a typical 155 MB/s
SONET receiver, a minimum AGC capacitor of 56pF
is recommended. This will provide the minimum
amount of protection against pattern sensitivity and
pulse width distortion on repetitive data sequences
during high average optical power conditions.
Conservative design practices should be followed
when selecting an AGC capacitor, since unit to unit
variability of the internal time constant and various
data conditions can lead to data errors if the chosen
value is too small.
Phase Response
At frequencies below the 3dB bandwidth of the
device, the transimpedance phase response is
characteristic of a single pole transfer function (as
shown in the Phase Vs Frequency curve). The output
impedance is essentially resistive up to 1000 MHz.
PRELIMINARY DATA SHEET - Rev 2
08/2001
7
ATA01502
ORDERING INFORMATION
PAR T N U MB ER
PAC K AGE OPTION
PAC K AGE D ESC R IPTION
ATA01501D 1C
D 1C
Die
ANADIGICS, Inc.
141 Mount Bethel Road
Warren, New Jersey 07059, U.S.A
Tel: +1 (908) 668-5000
Fax: +1 (908) 668-5132
http://www.anadigics.com
Mktg@anadigics.com
IMPORTANT NOTICE
ANADIGICS, Inc. reserves the right to make changes to its products or to discontinue any product at any time without
notice. The product specifications contained in Advanced Product Information sheets and Preliminary Data Sheets are
subject to change prior to a product’s formal introduction. Information in Data Sheets have been carefully checked and are
assumed to be reliable; however, ANADIGICS assumes no responsibilities for inaccuracies. ANADIGICS strongly urges
customers to verify that the information they are using is current before placing orders.
WARNING
ANADIGICS products are not intended for use in life support appliances, devices, or systems. Use of an ANADIGICS
product in any such application without written consent is prohibited.
PRELIMINARY DATA SHEET - Rev 2
08/2001
8