AZ DISPLAYS, INC. COMPLETE LCD SOLUTIONS SPECIFICATIONS FOR LIQUID CRYSTAL DISPLAY PART NUMBER: DATE: AGM3224I SERIES MAR. 13, 2007 LCD Module Main Data No. Item Contents Unit (1) Module size 167.0(W) x 109.0(H) x 8.5 (D) mm (2) Viewing area 120.0 (W) x 90.0 (H) mm x 3 (R.G.B) (W) x 240 (H) dots (3) Dot Number 320 (4) Dot Size 0.10(W) x 0.34(H) mm (5) Dot pitch 0.12(W) x 0.36(H) mm (6) LCD type •Color-STN (Negative & transmissive type) • with Anti glare upper polarizer . (7) Contrast ratio - 40 - 1/242 - (9) Viewing direction 6 O clock - (10) Operating temperature 0 ~ +50 !C -20 ~ +60 !C (8) Duty (11) Storage temperature (12) Backlight (13) Power Supply Voltage LED x 16 VDD=5.0 V or 3.3 V Vcon=1.8 V (14) Weight AZ DISPLAYS, INC. 200 (Approx.) pcs V g PAGE 01 0.1 AZ DISPLAYS, INC. 0.34 R R 1 CN1 16 320X 3(RGB)X 240 DOTS V IEWING DIRECTION G B G B 0.12 0.02 P0.12x320x(RGB)-0.02=115.18 ( LCD AA ) (MITSUMI) 1 CN2 4 M63-M83-04 R ed Black Outline Dimension 0.02 0.36 PAGE 02 Interface Pin Connection CN1 FFC Pitch 1.0mm, width 17.0mm. Pin No. Signal 1 FLM First Line Marker 2 CL1 Input data latch signal ( LOAD ) 3 CL2 Data shift clock ( CP ) 4 DISP OFF 5 VDD Power supply for Logic 6 VSS GND 7 VCON 8 D0 Display data 9 D1 Display data 10 D2 Display data 11 D3 Display data 12 D4 Display data 13 D5 Display data 14 D6 Display data 15 D7 Display data 16 VSS CN2 Pin Function Display control signal H:ON L:OFF Contrast adjust GND M63-M83-04 ( MITSUMI ) Pin No. Signal 1 LED(+) Power supply voltage for LED 2 LED(-) LED GND Pin No. Signal 1 LED(+) 2 - ----------------------- 3 - ----------------------- 4 LED(-) AZ DISPLAYS, INC. Function Function Power supply voltage for LED LED GND PAGE 03 Block Diagram Timing Circuit CL1 CL2 DISP D0~D7 Driving Circuit Circuit Y1 Y960 Column Row Driving FLM VDD Power VSS Supply VCON CN2 X1 COLOR LCD PANEL 320" RGB" 240 DOTS X240 Circuit LED VLED(+) VLED(-) AZ DISPLAYS, INC. PAGE 04 Power supply for Logic VDD-VSS -0.3 7.0 Contrast Adjustment Voltage VCON-VSS 0 VDD Input voltage (Note 1) Vi -0.3 VDD+0.3 Note 1. FLM,CL1,CL2,DISP,D0~D7. Note 2. Ta=25! C Note 3. Make certain you are grounded when handling LCM. Environmental Absolute Maximum Ratings Operating Item MIN. MAX. Ambient Temperature 0! C 50! C Humidity Note 4 Vibration - 2.45m/s Shock - 29.4m/s Storage MIN. MAX. -20! C 60! C Note 4 11.76 m/s Note 5 490 m/s Note 5 V V V Remark Note1,2,3 No Condensation 1h max Note 6 XYZ directions 11ms Note 1. Ta at -20! C --------<48hours, at 60! C --------<120 hours. Note 2. Background color changes slightly depending on ambient temperature. The phenomenon is reversible. Note 3. Ta<=40! C : 85%RH MAX. Ta> 40! C : Absolute humidity must be lower than the humidity of 85% RH at 40! C. Note 4. The module should be operated normally after the test is finished. Note 5. 5Hz ~ 100Hz (Except resonance frequency). AZ DISPLAYS, INC. PAGE 05 Electrical Characteristics Electrical Characteristics of LCD Item Symbol Power Supply for Logic VDD Input Signal Voltage VIH Note (2) VIL Power supply current Note (4) IDD Icon Note(5) Input Leak Current IIN Note(2) Contrast Adjustment Voltage Note (1) Note (6) Frame Frequency Note (7) Vcon fFLM Condition VDD-VSS #H$ Level #L$ Level VDD=3.3V VCON=0.8~2.8V VIN=VDD or VSS Ta=0! C, φ=0° Ta=25! C, φ=0° Ta=40! C, φ=0° ! MIN. 3.15 0.8VDD 0 ! ! ! 0.3 1.3 ! Typ. 3.3 ! ! 95 0.5 ! ! 1.8 ! 130 150 Max. Unit 5.5 V VDD V 0.2VDD 160 mA 1.0 mA +/- 1.0 µA ! V 2.3 3.3 170 Hz Note (1) In proportion as the VCON voltage decrease the brightness will increase. Note (2) FLM,CL1,CL2,DISPOFF,D0~D7. RGB RGB Note (3) fFLM=150Hz,Ta=25! C,Display pattern is Black/White cross pattern as below. Note (4) At all Q pattern. Note (5) VCON Note (6) Recommended Contrast Adjustment Voltage fluctuates about " 0.5V by each module. Note (7) Need to make sure of flickering and rippling of display when setting the Frame Frequency in your set. Electrical Characteristics of Backlight Item Symbol Min. Typ. Max. Unit Voltage VLED (4.2) (4.3) (4.4) V Current ILED 288.0 mA Number of LED 16 EA Power Consumption 1.24 W Note (1): VLED = VLED(+) %VLED(-) . Note (2): The current of LED is 18 mA for each one. LED driving in constant current mode is recommended . Note (3): LED power consumption is around 0.0775W for each one. AZ DISPLAYS, INC. Condition Note 1 Note 2 Note 3 PAGE 06 Optical Characteristics Optical Characteristics of LCD Item Symbol Condition Viewing Angle Range φ1, φ2 θ=0°K&2 Contrast Ratio Response Time Rise tr Fall tf G B W Note 1. θ=0°,φ=0° x y x y x y x R Color Tone (CIE Coordinate) θ=0° φ=0° θ=0°,φ=0° K θ=0°,φ=0° y Definition of q and f φ2 Y(θ=180°) Typ. (40) 20 40 - (250) - ms - (200) - ms (0.44) (0.26) (0.26) (0.49) (0.10) (0.07) (0.22) (0.27) (0.49) (0.31) (0.31) (0.54) (0.15) (0.12) (0.27) (0.32) (0.54) (0.36) (0.36) (0.59) (0.20) (0.17) (0.32) (0.37) - Note 2 - Definition of Viewing angle f 1 and f 2 CR Eye from (θ,φ2) φ1 X X θ Y(θ=0°) AZ DISPLAYS, INC. Min. - Note 2. Eye from (θ,φ1) Ta= 25! C.(Backlight On) Max. Unit Remark Deg. Note 1,2 Note 2 2.0 φ1<0°<φ2 φ1 φ2 CR vs Viewing and φ PAGE 07 Definition of Contrast Ratio CR! CR= Sensor Brightness at selected dot (B1) Brightness at non-selected dot (B2) B1 φ Brightness B1 B2 LCD Backlight B2 Sensor : BM-7 Aperture : 1! Operation voltage Note 4. Distance : 50 cm Definition of CR! and VOP! CR VOP Note 5. Operation Voltage Definition of optical response time Selected state 10% Non-selected state 90% 100% Brightness Non-selected state tr Rise time AZ DISPLAYS, INC. tf Fall time PAGE 08 Optical Characteristics of Backlight Item Min, Brightness 100 Brightness Uniformity - Typ. 150 - Max. ' 30 Unit 2 cd/m % Remark Note 1,2,3 Note 2,3,4 Note 1. Measurement Condition: • Display data should be all #ON$ (D0~D7=HIGH). • VDD=5.0V, VLED=4.3V, ILED=288mA,VCON should be adjusted at the voltage where the peak contrast is obtained by naked eyes as the #All Q$ pattern. Note 2. Measurement of the following 5 points on the display. Y=160 Y=480 Y=800 dots Active area X=60 X=120 X=180 P1 P4 P3 P2 P5 dots Note3. The brightness shall be the average of P1~P5 point. Note 4. Definition of the brightness Uniformity ( Max brightness or Min brightness %Average brightness AZ DISPLAYS, INC. Average brightness ) x100% PAGE 09 Interface Timing Chart Timing Chart CL1 (240+n)xT FLM D0~D7 X1 X2 X239 X240 Dummy data T CL1 CL2 X2 X1 D7 R0 B2 G5 B314 G317 D6 G0 R3 B5 R315 B317 D5 B0 G3 R6 G315 R318 D4 R1 B3 G6 B315 G318 D3 G1 R4 B6 R316 B318 D2 B1 G4 R7 G316 R319 D1 R2 B4 G7 B316 G319 D0 G2 R5 B7 R317 B319 AZ DISPLAYS, INC. PAGE 10 Electrical Characteristics (MODE1) (VDD=3.0~4.5V , V0= +10.0~ +42.0V, Ta=+0! C~50! C) Item Symbol Min. Typ. Max. Unit Shift clock period tWCK 66 ns Shift clock #H$ pulse wide tWCKH 23 ns Shift clock #L$ pulse wide tWCKL 23 ns Data setup time tDS 10 ns Data hold time tDH 25 ns Latch pulse #H$ pulse wide tWLPH 30 ns Shift clock rise to latch pulse rise time tLD 10 ns Shift clock fall to latch pulse fall time tSL 30 ns Latch pulse rise to shift clock rise time tLS 30 ns Latch pulse fall to shift clock fall time tLH 30 ns Enable setup time tTS 12 ns Input signal rise time tR 50 ns Input signal fall time tF 50 ns Output delay time tD 44 ns FLM setup time tFS 30 ns FLM hold time tFH 50 ns Note 1: (tWCK - tWCKH - tWCKL)/2 is maximum in the case of high speed operation tWLPH VIH CL1 CL2 tLD tR D0~D7 tLS tSL VIL tLH tWCKH tWCKL VIH VIL tF tWCK tDS VIH VIL LAST DATA tDH TOP DATA Horizontal retrace period VIH VIL CL1 tDS tDH 1 2 .. 20 CL2 tFS tFH FLM AZ DISPLAYS, INC. PAGE 11 (MODE2) (VDD=4.5~5.5V , V0= +10.0~ +42.0V, Ta=+0! C~50! C) Item Symbol Min. Typ. Max. Unit Shift clock period tWCK 40 ns Shift clock #H$ pulse wide tWCKH 12 ns Shift clock #L$ pulse wide tWCKL 14 ns Data setup time tDS 5 ns Data hold time tDH 15 ns Latch pulse #H$ pulse wide tWLPH 15 ns Shift clock rise to latch pulse rise time tLD 5 ns Shift clock fall to latch pulse fall time tSL 25 ns Latch pulse rise to shift clock rise time tLS 25 ns Latch pulse fall to shift clock fall time tLH 25 ns Enable setup time tTS 5 ns Input signal rise time (Note 1) tR 50 ns Input signal fall time (Note 1) tF 50 ns Output delay time tD 28 ns FLM setup time tFS 30 ns FLM hold time tFH 50 ns Note 1: (tWCK - tWCKH - tWCKL)/2 is maximum in the case of high speed operation AZ DISPLAYS, INC. PAGE 12 Power Supply and Signal Sequence Do not apply DC voltage to the LCD panel because that induces the electrochemical reaction and reduces its life time. Please follow the power supply ON/OFF sequence to prevent DC driving of LCD or latch-up of COMS LSI, as shown below. max 1ms VDD VDD VSS Sig VSS (FRM, CL1, CL2, DATA) VCON VCON VSS min0 min0 V I VSS VI VI VI min0 VSS min0 VI VI VCON VI VI min 1FRM DISPOFF VDD VI VI min0 VI VSS VSS VI VSS min 1ms POWER ON POWER OFF Note 1. Please keep the specified sequence because wrong sequence may cause permanent damage to the LCD panel. Note 2. Please use DISPOFF function. Switching by other than the DISPOFF function may cause display deterioration. Note 3. VCON voltage should be set up to adjusted voltage before DISPOFF signal arises. Otherwise, when DISPOFF signal arises, adjusted contrast image may not be generated. Note 4. Please keep the specified sequence of DISPOFF signal because if the signal is short enough, LCD panel may not be restarted. (min. 1ms) AZ DISPLAYS, INC. PAGE 13 Input Data Allocation Table D D D D D Data Signal 7 6 5 4 3 Y 1 X 1 2 3 4 5 6 7 8 9 10 | | | 238 239 240 R R R R R R R R R R | | | R R R 2 G G G G G G G G G G | | | G G G 3 B B B B B B B B B B | | | B B B 4 R R R R R R R R R R | | | R R R 5 G G G G G G G G G G | | | G G G D 2 6 B B B B B B B B B B | | | B B B D 1 7 R R R R R R R R R R | | | R R R D 0 8 G G G G G G G G G G | | | G G G D 7 9 B B B B B B B B B B | | | B B B D 6 D 4 D 4 D 3 D 2 D 1 D 0 10 11 12 9 5 6 9 5 7 9 5 8 9 5 9 9 6 0 G G G G G G G G G G | | | G G G B B B B B B B B B B | | | B B B R R R R R R R R R R | | | R R R G G G G G G G G G G | | | G G G B B B B B B B B B B | | | B B B R R R R R R R R R R | | | R R R D 5 G G G G G G G G G G | | | G G G B B B B B B B B B B | | | B B B ------- R : RED G : GREEN B : BLUE AZ DISPLAYS, INC. PAGE 14