INA270 INA271 SBOS381 − FEBRUARY 2007 Voltage Output, Unidirectional Measurement Current-Shunt Monitor FEATURES DESCRIPTION D WIDE COMMON-MODE RANGE: −16V to +80V D CMRR: 120dB D ACCURACY: The INA270 and INA271 family of current-shunt monitors with voltage output can sense voltage drops across current shunts at common-mode voltages from −16V to +80V, independent of the supply voltage. The INA270 and INA271 pinouts readily enable filtering. D D − ±2.5mV offset (max) − ±1% gain error (max) − 20µV/°C offset drift (max) − 55ppm/°C gain drift (max) BANDWIDTH: Up to 130kHz TWO TRANSFER FUNCTIONS AVAILABLE: − 14V/V (INA270) − 20V/V (INA271) D QUIESCENT CURRENT: 900µA (max) D POWER SUPPLY: +2.7V to +18V D PROVISION FOR FILTERING −16V The INA270 and INA271 are available with two output voltage scales: 14V/V and 20V/V. The 130kHz bandwidth simplifies use in current-control loops. The INA270 and INA271 operate from a single +2.7V to +18V supply, drawing a maximum of 900µA of supply current. They are specified over the extended operating temperature range of −40°C to +125°C and are offered in an SO-8 package. RS to +80V Supply Load APPLICATIONS D D D D D D D POWER MANAGEMENT AUTOMOTIVE TELECOM EQUIPMENT NOTEBOOK COMPUTERS BATTERY CHARGERS Single−Pole Filter Capacitor +2.7V to +18V IN+ PRE OUT IN− 5kΩ CELL PHONES WELDING EQUIPMENT BUF IN V+ 5kΩ OUT A1 DEVICE COMPARISON DEVICE GAIN INA270 INA271 14V/V 20V/V 96kΩ A2 RL INA270 GND Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. Copyright 2007, Texas Instruments Incorporated ! ! www.ti.com "#$ "#% www.ti.com SBOS381 − FEBRUARY 2007 This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ABSOLUTE MAXIMUM RATINGS(1) Supply Voltage (VS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +18V Analog Inputs, VIN+, VIN− Differential, (VIN+) − (VIN−) . . . . . . . . . . . . . . . . . −18V to +18V Common-Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . −16V to +80V Analog Output OUT and PRE OUT Pins . . . . . . . . GND − 0.3V to (V+) + 0.3V Input Current Into Any Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5mA Operating Temperature . . . . . . . . . . . . . . . . . . . . . −55°C to +150°C Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . −65°C to +150°C Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +150°C ESD Ratings: Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3000V Charged-Device Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . 750V (1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those specified is not supported. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. ORDERING INFORMATION(1) PRODUCT PACKAGE-LEAD PACKAGE DESIGNATOR GAIN PACKAGE MARKING INA270 SO-8 D 14 I270A INA271 SO-8 D 20 I271A (1) For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com. PIN CONFIGURATION Top View SO IN− 1 GND 2 8 IN+ 7 NC(1) INA27x PRE OUT 3 6 V+ BUF IN 4 5 OUT NOTE (1): NC denotes no internal connection. 2 "#$ "#% www.ti.com SBOS381 − FEBRUARY 2007 ELECTRICAL CHARACTERISTICS Boldface limits apply over the specified temperature range: TA = −40°C to +125°C. At TA = +25°C, VS = +5V, VCM = +12V, VSENSE = 100mV, and PRE OUT connected to BUF IN, unless otherwise noted. INA270, INA271 PARAMETER CONDITIONS MIN TYP MAX UNITS 0.15 (VS − 0.2)/Gain +80 V V dB dB mV mV µV/°C µV/V µA kΩ nA nA/°C INPUT Full-Scale Input Voltage Common-Mode Input Range Common-Mode Rejection Over Temperature Offset Voltage, RTI(1) VSENSE VCM CMRR VOS Over Temperature vs Temperature dVOS/dT vs Power-Supply PSR Input Bias Current, VIN− Pin IB PRE OUT Output Impedance(3) Buffer Input Bias Current Buffer Input Bias Current Temperature Coefficient OUTPUT (VSENSE 20mV)(2) Gain: INA270 Total Gain G INA271 Total Gain G Output Buffer Gain GBUF Total Gain Error Over Temperature vs Temperature Total Output Error(4) Total Output Error Nonlinearity Error Output Impedance, Pin 5 RO Maximum Capacitive Load VOLTAGE OUTPUT(5) Swing to V+ Power-Supply Rail Swing to GND(6) VSENSE = (VIN+) + (VIN−) VIN+ = −16V to +80V VIN+ = +12V to +80V −16 80 100 120 120 ±0.5 2.5 5 ±8 96 −50 ±0.03 VS = +2.7V to +18V, VCM = +18V 14 20 2 ±0.2 VSENSE = 20mV to 100mV ±0.75 ±1.0 ±0.002 1.5 10 VSENSE = 20mV to 100mV VSENSE = 20mV to 100mV No Sustained Oscillation 2.5 ±3 20 100 ±16 ±1 ±2 50 ±2.2 ±3.0 V/V V/V V/V % % ppm/°C % % % Ω nF (V+) − 0.2 VGND + 0.05 V V RL = 10kΩ to GND (V+) − 0.05 VGND + 0.003 FREQUENCY RESPONSE Bandwidth BW Phase Margin Slew Rate Settling Time (1%) NOISE, RTI(1) 130 kHz 40 degrees VSENSE = 10mV to 100mVPP, CLOAD = 5pF 1 2 V/µs µs 40 nV/√Hz SR tS Voltage Noise Density en POWER SUPPLY Operating Range Quiescent Current Over Temperature VS IQ TEMPERATURE RANGE Specified Temperature Range Operating Temperature Range Thermal Resistance SO-8 CLOAD = 5pF CLOAD < 10nF +2.7 VOUT = 2V VSENSE = 0mV 700 350 −40 −55 qJA 150 +18 900 950 V µA µA +125 +150 °C °C °C/W (1) RTI means Referred-to-Input. (2) For output behavior when V SENSE < 20mV, see the section, Accuracy Variations as a Result of VSENSE and Common-Mode Voltage in the Applications Information. (3) Initial resistor variation is ±30% with an additional −2200ppm/°C temperature coefficient. (4) Total output error includes effects of gain error and VOS. (5) See typical characteristic curve Output Swing vs Output Current, and Applications Information section Accuracy Variations as a Result of VSENSE and Common-Mode Voltage. (6) Ensured by design; not production tested. 3 "#$ "#% www.ti.com SBOS381 − FEBRUARY 2007 TYPICAL CHARACTERISTICS At TA = +25°C, VS = +12V, VCM = 12V, and VSENSE = 100mV, unless otherwise noted. GAIN vs FREQUENCY GAIN vs FREQUENCY 45 45 CLOAD = 0pF 40 35 35 30 Gain (dB) Gain (dB) CLOAD = 1000pF 40 G = 20 25 G = 14 20 30 G = 14 20 15 15 10 10 5 G = 20 25 5 10k 1M 100k 10k 100k Frequency (Hz) COMMON−MODE AND POWER−SUPPLY REJECTION vs FREQUENCY GAIN PLOT 20 140 VS = 18V 18 Common−Mode and Power−Supply Rejection (dB) 130 16 14 VOUT (V) 1M Frequency (Hz) 20V/V 12 10 8 14V/V 6 4 2 0 120 CMRR 110 100 90 PSR 80 70 60 50 1300 1200 1100 900 1000 800 700 600 500 400 300 200 100 0 40 10 100 1k 10k 100k Frequency (Hz) VDIFFERENTIAL (mV) OUTPUT ERROR vs COMMON−MODE VOLTAGE 0.1 3.5 0.09 0.08 3.0 Output Error (% ) Total Output Error (% error of the ideal output value) TOTAL OUTPUT ERROR vs VSENSE 4.0 2.5 2.0 1.5 1.0 0.06 0.05 0.04 0.03 0.02 0.5 0.01 0 0 0 50 100 150 200 250 300 VSENSE (mV) 4 0.07 350 400 450 500 −16 −12 −8 −4 0 4 8 12 16 20 Common−Mode Voltage (V) ... 76 80 "#$ "#% www.ti.com SBOS381 − FEBRUARY 2007 TYPICAL CHARACTERISTICS (continued) At TA = +25°C, VS = +12V, VCM = 12V, and VSENSE = 100mV, unless otherwise noted. POSITIVE OUTPUT VOLTAGE SWING vs OUTPUT CURRENT QUIESCENT CURRENT vs OUTPUT VOLTAGE 1000 12 900 VS = 12V 10 9 800 Sourcing Current +25_C 8 700 −40_C +125_ C 7 6 IQ (µA) Output Voltage (V ) 11 VS = 3V 5 Sourcing Current +25_C 4 −40_C 2 1 +125_ C 0 0 500 400 300 Output stage is designed to source current. Current sinking capability is approximately 400µA. 3 600 200 100 0 5 10 20 15 25 30 0 1 2 Output Current (mA) VS = 12V Output Short−Circuit Current (mA) VS = 2.7V 675 575 475 VS = 12V VSENSE = 0mV: VS = 2.7V 275 8 9 10 −40_C 30 +25_ C 26 +125_ C 22 18 14 10 6 0 4 8 12 16 20 ... 76 80 2.5 3.5 4.5 VCM (V) 5.5 6.5 9.5 10.5 11.5 17 7.5 8.5 18 Supply Voltage (V) PREOUT OUTPUT RESISTANCE PRODUCTION DISTRIBUTION BUFFER GAIN vs FREQUENCY 200 150 Gain (dB) Phase Population 100 50 Gain 0 −50 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 IQ (µA) 7 6 34 VSENSE = 100mV: 175 −16 −12 −8 −4 5 OUTPUT SHORT−CIRCUIT CURRENT vs SUPPLY VOLTAGE 775 375 4 Output Voltage (V) QUIESCENT CURRENT vs COMMON−MODE VOLTAGE 875 3 10 100 1k 10k 100k 1M 10M Frequency (Hz) RPREOUT (kΩ) 5 "#$ "#% www.ti.com SBOS381 − FEBRUARY 2007 TYPICAL CHARACTERISTICS (continued) At TA = +25°C, VS = +12V, VCM = 12V, and VSENSE = 100mV, unless otherwise noted. SMALL−SIGNAL STEP RESPONSE 10mV TO 20mV INPUT 500mV/div 50mV/div 10µs/div 6 LARGE−SIGNAL STEP RESPONSE 10mV TO 100mV INPUT 10µs/div "#$ "#% www.ti.com SBOS381 − FEBRUARY 2007 offset, while low values of RS minimize voltage loss in the supply line. For most applications, best performance is attained with an RS value that provides a full-scale shunt voltage range of 50mV to 100mV. Maximum input voltage for accurate measurements is (VS − 0.2)/Gain. APPLICATIONS INFORMATION BASIC CONNECTION Figure 1 illustrates the basic connection of the INA270 and INA271. The input pins, IN+ and IN−, should be connected as closely as possible to the shunt resistor to minimize any resistance in series with the shunt resistance. TRANSIENT PROTECTION Power-supply bypass capacitors are required for stability. Applications with noisy or high-impedance power supplies may require additional decoupling capacitors to reject power-supply noise. Minimum bypass capacitors of 0.01µF and 0.1µF in value should be placed close to the supply pins. Although not mandatory, an additional 10mF electrolytic capacitor placed in parallel with the other bypass capacitors may be useful in applications with particularly noisy supplies. The −16V to +80V common-mode range of the INA270 and INA271 is ideal for withstanding automotive fault conditions ranging from 12V battery reversal up to +80V transients, since no additional protective components are needed up to those levels. In the event that the INA270 and INA271 are exposed to transients on the inputs in excess of their ratings, external transient absorption with semiconductor transient absorbers (zeners or Transzorbs) will be necessary. Use of MOVs or VDRs is not recommended except when they are used in addition to a semiconductor transient absorber. Select the transient absorber such that it will never allow the INA270 and INA271 to be exposed to transients greater than 80V (that is, allow for transient absorber tolerance, as well as additional voltage because of transient absorber dynamic impedance). POWER SUPPLY The input circuitry of the INA270 and INA271 can accurately measure beyond its power-supply voltage, V+. For example, the V+ power supply can be 5V, whereas the load power-supply voltage is up to +80V. The output voltage range of the OUT terminal, however, is limited by the voltages on the power-supply pin. Despite the use of internal zener-type ESD protection, the INA270 and INA271 are not suited to using external resistors in series with the inputs since the internal gain resistors can vary up to ±30%, but are tightly matched (if gain accuracy is not important, then resistors can be added in series with the INA270 and INA271 inputs with two equal resistors on each input). SELECTING RS The value chosen for the shunt resistor, RS, depends on the application and is a compromise between small-signal accuracy and maximum permissible voltage loss in the measurement line. High values of RS provide better accuracy at lower currents by minimizing the effects of RS − 16V to +80V Supply Load Single−Pole Filter Capacitor +2.7V to +18V IN+ PRE OUT IN− 5kΩ BUF IN 0.01µF V+ 0.1µF 5kΩ OUT A1 96kΩ A2 RL INA270 GND Figure 1. INA270 Basic Connections 7 "#$ "#% www.ti.com SBOS381 − FEBRUARY 2007 OUTPUT VOLTAGE RANGE ACCURACY VARIATIONS AS A RESULT OF VSENSE AND COMMON-MODE VOLTAGE The output of the INA270 and INA271 is accurate within the output voltage swing range set by the power-supply pin, V+. The accuracy of the INA270 and INA271 current shunt monitors is a function of two main variables: VSENSE (VIN+ − VIN−) and common-mode voltage, VCM, relative to the supply voltage, VS. VCM is expressed as (VIN+ + VIN−)/2; however, in practice, VCM is seen as the voltage at VIN+ because the voltage drop across VSENSE is usually small. The INA270 and INA271 readily enable the inclusion of filtering between the preamp output and buffer input. Single-pole filtering can be accomplished with a single capacitor because of the 96kΩ output impedance at PRE OUT on pin 3; see Figure 2a. This section addresses the accuracy of these specific operating regions: The INA270 and INA271 readily lend themselves to second-order Sallen-Key configurations, as shown in Figure 2b. When designing these configurations consider that the PRE OUT 96kΩ output impedance exhibits an initial variation of ±30% with the addition of a −2200ppm/°C temperature coefficient. Normal Case 1: VSENSE ≥ 20mV, VCM ≥ VS Normal Case 2: VSENSE ≥ 20mV, VCM < VS Low VSENSE Case 1: VSENSE < 20mV, −16V ≤ VCM < 0 Low VSENSE Case 2: VSENSE < 20mV, 0V ≤ VCM ≤ VS Low VSENSE Case 3: VSENSE < 20mV, VS < VCM ≤ 80V RS Supply Load RS Load Supply Second−Order, Sallen−Key Filter Connection CFIL T Single−Pole Filter Capacitor CFIL T RS +2.7V to +18V IN+ PRE OUT IN− 5kΩ BUF IN +2.7V to +18V V+ IN+ 5kΩ 5kΩ Output A1 BUF IN Output 96kΩ A2 RL V+ 5kΩ A1 96kΩ A2 PRE OUT IN− RL INA270 INA270 GND a) Single−Pole Filter GND b) Second−Order, Sallen−Key Filter Figure 2. The INA270−INA271 can be easily connected for first or second order filtering. Remember to use the appropriate buffer gain (INA270 = 1.4, INA271 = 2) when designing Sallen-Key configurations. 8 "#$ "#% www.ti.com SBOS381 − FEBRUARY 2007 Normal Case 1: VSENSE ≥ 20mV, VCM ≥ VS This region of operation provides the highest accuracy. Here, the input offset voltage is characterized and measured using a two-step method. First, the gain is determined by Equation 1. G+ V OUT1 * V OUT2 100mV * 20mV (1) As VSENSE approaches 0mV, in these VCM regions, the device output accuracy degrades. A larger-than-normal offset can appear at the current shunt monitor output with a typical maximum value of VOUT = 60mV for VSENSE = 0mV. As VSENSE approaches 20mV, VOUT returns to the expected output value with accuracy as specified in the Electrical Characteristics. Figure 3 illustrates this effect using the INA271 (Gain = 20). where: Low VSENSE Case 2: VSENSE < 20mV, 0V ≤ VCM ≤ VS VOUT1 = Output Voltage with VSENSE = 100mV This region of operation is the least accurate for the INA270 family. To achieve the wide input common-mode voltage range, these devices use two op amp front ends in parallel. One op amp front end operates in the positive input common-mode voltage range, and the other in the negative input region. For this case, neither of these two internal amplifiers dominates and overall loop gain is very low. Within this region, VOUT approaches voltages close to linear operation levels for Normal Case 2. VOUT2 = Output Voltage with VSENSE = 20mV Then the offset voltage is measured at VSENSE = 100mV and referred to the input (RTI) of the current shunt monitor, as shown in Equation 2. VOSRTI (Referred−To−Input) + ǒV G Ǔ * 100mV OUT1 (2) In the Typical Characteristics, the Output Error vs Common-Mode Voltage curve shows the highest accuracy for the this region of operation. In this plot, VS = 12V; for VCM ≥ 12V, the output error is at its minimum. This case is also used to create the VSENSE ≥ 20mV output specifications in the Electrical Characteristics table. This region of operation has slightly less accuracy than Normal Case 1 as a result of the common-mode operating area in which the part functions, as seen in the Output Error vs Common-Mode Voltage curve. As noted, for this graph VS = 12V; for VCM < 12V, the Output Error increases as VCM becomes less than 12V, with a typical maximum error of 0.005% at the most negative VCM = −16V. Low VSENSE Case 1: VSENSE < 20mV, −16V ≤ VCM < 0; and Low VSENSE Case 3: VSENSE < 20mV, VS < VCM ≤ 80V Although the INA270 family of devices are not designed for accurate operation in either of these regions, some applications are exposed to these conditions. For example, when monitoring power supplies that are switched on and off while VS is still applied to the INA270 or INA271, it is important to know what the behavior of the devices will be in these regions. 0.36 0.32 0.28 VOUT (V) Normal Case 2: VSENSE ≥ 20mV, VCM < VS 0.40 0.24 Actual 0.20 0.16 Ideal 0.12 0.08 0.04 0 0 2 4 6 8 10 12 14 16 18 20 VSENSE (mV) Figure 3. Example for Low VSENSE Cases 1 and 3 (INA271, Gain = 20) This deviation from linear operation becomes greatest the closer VSENSE approaches 0V. Within this region, as VSENSE approaches 20mV, device operation is closer to that described by Normal Case 2. Figure 4 illustrates this behavior for the INA271. The VOUT maximum peak for this case is determined by maintaining a constant VS, setting VSENSE = 0mV and sweeping VCM from 0V to VS. The exact VCM at which VOUT peaks during this case varies from part to part. The maximum peak voltage for the INA270 is 0.28V; for the INA271, the maximum peak voltage is 0.4V. 9 "#$ "#% www.ti.com SBOS381 − FEBRUARY 2007 0.48 INA271 VOUT Limit(1) 0.48 VCM1 0.40 Ideal 0.36 0.32 VOUT (V) gate should have a supply voltage of 3V or greater because the INA270 and INA271 require a minimum supply greater than 2.7V. In addition to eliminating quiescent current, this gate also turns off the 10µA bias current present at each of the inputs. Note that the IN+ and IN− inputs are able to withstand full common-mode voltage under all powered and under-powered conditions. An example shutdown circuit is shown in Figure 5. VCM2 0.28 VCM3 0.24 0.20 0.16 VOUT limit at VSENSE = 0mV, 0 ≤ VCM1 ≤ VS VCM4 0.12 VCM2, VCM3, and VCM4 illustrate the variance from part to part of the VCM that can cause maximum VOUT with VSENSE < 20mV. 0.08 0.04 0 0 2 4 6 8 10 12 14 16 18 20 22 24 VSENSE (mV) NOTE: (1) INA271 VOUT Limit = 0.4V. INA270 VOUT Limit = 0.28V. Figure 4. Example for Low VSENSE Case 2 (INA271, Gain = 20) SHUTDOWN The INA270 and INA271 do not provide a shutdown pin; however, because they consume a quiescent current less than 1mA, they can be powered by either the output of logic gates or by transistor switches to supply power. Driving the gate low shuts down the INA270/INA271. Use a totem-pole output buffer or gate that can provide sufficient drive along with 0.1µF bypass capacitor, preferably ceramic with good high-frequency characteristics. This Attention to good layout practices is always recommended. Keep traces short and, when possible, use a printed circuit board (PCB) ground plane with surface-mount components placed as close to the device pins as possible. Small ceramic capacitors placed directly across amplifier inputs can reduce RFI/EMI sensitivity. PCB layout should locate the amplifier as far away as possible from RFI sources. Sources can include other components in the same system as the amplifier itself, such as inductors (particularly switched inductors handling a lot of current and at high frequencies). RFI can generally be identified as a variation in offset voltage or dc signal levels with changes in the interfering RF signal. If the amplifier cannot be located away from sources of radiation, shielding may be needed. Twisting wire input leads makes them more resistant to RF fields. The difference in input pin location of the INA270 and INA271 versus the INA193−INA198 may provide different EMI performance. IL RS −16 V to +8 0V S upply RFI/EMI S ingle−P ole F ilter C apa citor IN+ N egative an d P ositive Comm on−Mod e V oltag e P RE OUT IN− 5kΩ Load B UF IN V+ 5kΩ V+ > 3V OUT A1 74HC04 0.1 µF 96kΩ A2 RL INA27 0, IN A271 GND Figure 5. INA270−INA271 Example Shutdown Circuit 10 PACKAGE OPTION ADDENDUM www.ti.com 20-Mar-2007 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty INA270AID ACTIVE SOIC D 8 INA270AIDR ACTIVE SOIC D 8 INA271AID ACTIVE SOIC D 8 INA271AIDR ACTIVE SOIC D 8 75 Lead/Ball Finish MSL Peak Temp (3) Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 75 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. 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