BB OPA2335

 OPA2335M
SGLS320 – SEPTEMBER 2006
0.05 µV/°C MAX, SINGLE-SUPPLY CMOS
OPERATIONAL AMPLIFIER ZERO-DRIFT SERIES
FEATURES
Low Offset Voltage: 5 µV (max)
Zero Drift: 0.02 µV/°C (typ)
Quiescent Current: 570 µA
Single-Supply Operation
Ceramic DIP Package
The OPA2335 CMOS operational amplifier uses
auto-zeroing techniques to simultaneously provide
very low offset voltage (5 µV max), and near-zero
drift over time and temperature. This high-precision,
low quiescent current amplifier offers high input
impedance and rail-to-rail output swing. Single or
dual supplies as low as 2.7 V (±1.35 V) and up to 5.5
V (±2.75 V) may be used. This op amp is optimized
for low-voltage, single-supply operation.
APPLICATIONS
Transducer Applications
Temperature Measurement
Electronic Scales
Medical Instrumentation
Battery-Powered Instruments
Handheld Test Equipment
Offset Voltage − µV
G001
Offset Voltage Drift − µV/°C
0.050
0.045
0.040
0.035
0.030
0.025
0.020
0.015
Absolute Value;
Centered Around Zero
0.000
−3.0
−2.7
−2.4
−2.1
−1.8
−1.5
−1.2
−0.9
−0.6
−0.3
0.0
0.3
0.6
0.9
1.2
1.5
1.8
2.1
2.4
2.7
3.0
Population
Population
The OPA2335 is available in a CDIP-8 package and
is specified for operation from –55°C to 125°C.
0.010
•
•
•
•
•
•
0.005
•
•
•
•
•
DESCRIPTION
G002
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2006, Texas Instruments Incorporated
OPA2335M
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SGLS320 – SEPTEMBER 2006
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be
more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
PACKAGE/ORDERING INFORMATION
PRODUCT
PACKAGE
LEAD
PACKAGE
DESIGNATOR
SPECIFIED
TEMPERATURE
RANGE
PACKAGE
MARKING
ORDERING
NUMBER
OPA2335
CDIP-8
JG
–55°C to 125°C
OPA2335AMJG
OPA2335AMJG
PIN CONFIGURATIONS
OPA2335
Out A 1
-In A
2
+In A
3
A
B
V- 4
8
V+
7
Out B
6
-In B
5
+In B
CDIP
P0037-01
ABSOLUTE MAXIMUM RATINGS (1)
over operating free-air temperature range (unless otherwise noted)
VALUE
Supply voltage
UNIT
7V
Signal input terminals
Voltage (2)
–0.5 to (V+) + 0.5
V
Current (2)
±10
mA
Output short circuit (3)
Continuous
Operating temperature TA
–55 to 150
°C
Storage temperature TA
–65 to 150
°C
Junction temperature
150
°C
Lead temperature (soldering, 10s)
300
°C
(1)
(2)
(3)
Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may
degrade device reliability. These are stress ratings only, and functional operation of the device at these, or any other conditions beyond
those specified, is not implied.
Input terminals are diode-clamped to the power-supply rails. Input signals that can swing more than 0.5 V beyond the supply rails should
be current-limited to 10 mA or less.
Short-circuit to ground, one amplifier per package
ELECTRICAL CHARACTERISTICS
At TA = 25°C, VS = +5 V, RL = 10 kΩ connected to VS/2, and VOUT = VS/2 (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
OFFSET VOLTAGE
Input offset voltage
VOS
VCM = VS/2
TA = 25°C
1
TA = Full
range
vs Temperature
2
±0.02
dVOS/dT
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5
µV
10
µV/°C
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ELECTRICAL CHARACTERISTICS (continued)
At TA = 25°C, VS = +5 V, RL = 10 kΩ connected to VS/2, and VOUT = VS/2 (unless otherwise noted)
PARAMETER
vs Power supply
TEST CONDITIONS
PSSR
VS = 2.7 V to 5.5 V
MIN
TA = Full
range
Long-term stability
TYP
MAX
UNIT
±1
±2
µV/V
See Note
Channel separation, dc
(1)
µV/V
0.1
INPUT BIAS CURRENT
Input bias current
IB
VCM = VS/2
±70
TA = 25°C
TA = Full
range
Input offset current
±200
1
±120
IOS
pA
nA
±400
pA
NOISE
Input voltage noise
en
f = 0.01 Hz to 10 Hz
1.4
µVpp
Input current noise density
in
f = 10 Hz
20
fA/√Hz
INPUT VOLTAGE RANGE
Common-mode voltage range
VCM
Common-mode rejection ratio
CMRR
(V–) –0.1
(V+) –1.5
V
(V–) – 0.1 V < VCM < (V+) – 1.5V
TA = 25°C
110
130
dB
(V–) < VCM < (V+) – 1.5V
TA = Full
range
110
130
dB
Differential
1
pF
Common-mode
5
pF
INPUT CAPACITANCE
OPEN-LOOP GAIN
Open-loop voltage gain
AOL
50 mV < VO < (V+) – 50 mV,
RL = 100 kΩ, VCM = VS/2
TA = Full
range
110
130
dB
100 mV < VO < (V+) – 100 mV,
RL = 10 kΩ, VCM = VS/2
TA = Full
range
110
130
dB
FREQUENCY RESPONSE
Gain-Bandwidth Product
GBW
Slew Rate
SR
G = +1
2
MHz
1.6
V/µs
OUTPUT
Voltage output swing from rail
Short-circuit current
ISC
Capacitive load drive
CLOAD
RL = 10 kΩ
TA = Full
range
15
100
mV
RL = 100 kΩ
TA = Full
range
1
50
mV
±50
mA
See Typical Characteristics
POWER SUPPLY
Operating voltage range
Quiescent current
2.7
IQ
(total-2 amplifiers)
IO = 0, VS = +5 V
5.5
V
700
µA
900
µA
–55
125
°C
–65
150
TA = 25°C
570
TA = Full
range
TEMPERATURE RANGE
Operating range
TA
Storage range
Thermal resistance
(1)
θJA
119
°C
°C/W
500-hour life test at 150°C demonstrated randomly distributed variation approximately equal to measurement repeatability of 1 µV.
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TYPICAL CHARACTERISTICS
At TA = 25°C, VS = +5 V, RL = 10 kΩ connected to VS/2 and VOUT = VS/2 (unless otherwise noted)
OFFSET VOLTAGE DRIFT PRODUCTION DISTRIBUTION
Population
Offset Voltage − µV
Offset Voltage Drift − µV/°C
G001
Figure 1.
Figure 2.
OFFSET VOLTAGE SWING
vs
OUTPUT CURRENT
INPUT BIAS CURRENT
vs
COMMON-MODE VOLTAGE
(V+)
0.050
0.045
0.040
0.035
0.025
0.020
0.015
0.010
0.005
0.000
−3.0
−2.7
−2.4
−2.1
−1.8
−1.5
−1.2
−0.9
−0.6
−0.3
0.0
0.3
0.6
0.9
1.2
1.5
1.8
2.1
2.4
2.7
3.0
Absolute Value;
Centered Around Zero
0.030
Population
OFFSET VOLTAGE PRODUCTION DISTRIBUTION
G002
1200
1255C
| Input Bias Current | − pA
Output Voltage Swing − V
1000
255C
(V+) − 1
−405C
2.7 V
5.5 V
(V+) + 1
1255C
255C −405C
800
600
400
200
(V−)
0
2
4
6
IO − Output Current − mA
8
10
0
0.0
G003
Figure 3.
4
1255C
−405C
0.5
1.0
255C
1.5
2.0
3.0
3.5
G004
Figure 4.
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2.5
Common-Mode Voltage − V
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SGLS320 – SEPTEMBER 2006
TYPICAL CHARACTERISTICS (continued)
At TA = 25°C, VS = +5 V, RL = 10 kΩ connected to VS/2 and VOUT = VS/2 (unless otherwise noted)
INPUT BIAS CURRENT
vs
TEMPERATURE
QUIESCENT CURRENT (per channel)
vs
TEMPERATURE
1k
400
VS = 5.5 V
300
Quiescent Current − µA
| Input Bias Current | − pA
350
100
250
VS = 2.7 V
200
150
100
50
10
−40
−20
0
20
40
60
80
100
0
−40
120
TA − Free-Air Temperature − °C
−20
0
G005
Figure 5.
60
80
100
120
G006
LARGE-SIGNAL RESPONSE
140
−80
G = −1
CL = 300 pF
100
−100
80
−110
60
−120
Gain
40
−130
20
−140
0
−150
1
10
100
1k
10k
100k
1M
VO − Output Voltage − 1 V/div
−90
Phase
Phase − °
120
Gain − dB
40
Figure 6.
OPEN-LOOP GAIN/PHASE
vs
FREQUENCY
−20
0.1
20
TA − Free-Air Temperature − °C
−160
10M
f − Frequency − Hz
G007
Figure 7.
t − Time − 5 µs/div
G008
Figure 8.
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TYPICAL CHARACTERISTICS (continued)
At TA = 25°C, VS = +5 V, RL = 10 kΩ connected to VS/2 and VOUT = VS/2 (unless otherwise noted)
SMALL-SIGNAL RESPONSE
POSITIVE OVER-VOLTAGE RECOVERY
VO − Output Voltage − 50 mV/div
200 mV/div
G=1
CL = 50 pF
0
Input
10 kΩ
1 V/div
2.5 V
Output
100 Ω
0
−
OPA335
+
−2.5 V
t − Time − 5 µs/div
t − Time − 25 µs/div
G009
Figure 9.
Figure 10.
NEGATIVE OVER-VOLTAGE RECOVERY
COMMON-MODE REJECTION
vs
FREQUENCY
G010
CMMR − Common-Mode Rejection Ratio − dB
200 mV/div
140
Input
0
0
10 kΩ
1 V/div
2.5 V
100 Ω
−
Output
OPA335
+
−2.5 V
120
100
80
60
40
20
0
t − Time − 25 µs/div
1
G011
Figure 11.
6
10
100
1k
10k
1M
10M
f − Frequency − Hz
G012
Figure 12.
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100k
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SGLS320 – SEPTEMBER 2006
TYPICAL CHARACTERISTICS (continued)
At TA = 25°C, VS = +5 V, RL = 10 kΩ connected to VS/2 and VOUT = VS/2 (unless otherwise noted)
POWER-SUPPLY REJECTION RATIO
vs
FREQUENCY
SAMPLING FREQUENCY
vs
SUPPLY VOLTAGE
11.0
10.9
120
+PSRR
10.8
100
f − Frequency − kHz
PSRR − Power-Supply Rejection Ratio − dB
140
80
60
−PSRR
40
10.7
10.6
10.5
10.4
10.3
10.2
20
10.1
0
10
100
1k
10k
100k
10.0
2.7
1M
f − Frequency − Hz
3.2
3.7
4.2
4.7
VCC − Supply Voltage − V
G013
Figure 13.
Figure 14.
NOISE
vs
FREQUENCY
0.01-Hz TO 10-Hz NOISE
5.2
G014
400 nV/div
Noise − nV//Hz
1k
100
10
1
10
100
1k
10k
100k
t − Time − 10 s/div
f − Frequency − Hz
G016
G015
Figure 15.
Figure 16.
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TYPICAL CHARACTERISTICS (continued)
At TA = 25°C, VS = +5 V, RL = 10 kΩ connected to VS/2 and VOUT = VS/2 (unless otherwise noted)
SAMPLING FREQUENCY
vs
TEMPERATURE
SMALL-SIGNAL OVERSHOOT
vs
LOAD CAPACITANCE (VS = 2.7 V TO 5 V)
13
50
12
RL = 10 kΩ
VS = 2.7 V to 5 V
40
35
Overshoot − %
fS − Sampling Frequency − kHz
45
11
10
30
25
20
15
9
10
5
8
−40 −25 −10 5
20
35
50
65
80
0
10
95 110 125
TA − Free-Air Temperature − °C
G017
1k
G018
Figure 17.
Figure 18.
SETTLING TIME
vs
CLOSED-LOOP GAIN
COMMON-MODE RANGE
vs
SUPPLY VOLTAGE
100
4.5
4.0
Unity-gain
requires one
complete Auto-Zero
Cycle − See text.
3.5
Common-Mode Range − V
ts − Settling Time − µs
100
Load Capacitance − pF
0.01%
10
0.1%
Maximum Common-Mode
3.0
2.5
2.0
1.5
1.0
0.5
Minimum Common-Mode
0.0
1
1
10
100
−0.5
2.7
Gain − V/V
G019
Figure 19.
8
3.2
3.7
4.2
Figure 20.
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4.7
VCC − Supply Voltage − V
5.2
G020
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SGLS320 – SEPTEMBER 2006
APPLICATION INFORMATION
The OPA2335 op amp is unity-gain stable and free from unexpected output phase reversal. It uses auto-zeroing
techniques to provide low offset voltage and very low drift over time and temperature.
Good layout practice mandates use of a 0.1-µF capacitor placed closely across the supply pins.
For lowest offset voltage and precision performance, circuit layout and mechanical conditions should be
optimized. Avoid temperature gradients that create thermoelectric (Seebeck) effects in thermocouple junctions
formed from connecting dissimilar conductors. These thermally-generated potentials can be made to cancel by
assuring that they are equal on both input terminals.
• Use low thermoelectric-coefficient connections (avoid dissimilar metals).
• Thermally isolate components from power supplies or other heat-sources.
• Shield op amp and input circuitry from air currents, such as cooling fans.
Following these guidelines will reduce the likelihood of junctions being at different temperatures, which can
cause thermoelectric voltages of 0.1 µV/°C or higher, depending on materials used.
OPERATING VOLTAGE
The OPA2335 op amp operates over a power-supply range of 2.7 V to 5.5 V (±1.35 V to ±2.75 V). Supply
voltages higher than 7 V (absolute maximum) can permanently damage the amplifier. Parameters that vary over
supply voltage or temperature are shown in the Typical Characteristics section of this data sheet.
INPUT VOLTAGE
The input common-mode range extends from (V–) – 0.1 V to (V+) – 1.5 V. For normal operation, the inputs must
be limited to this range. The common-mode rejection ratio is only valid within the valid input common-mode
range. A lower supply voltage results in lower input common-mode range; therefore, attention to these values
must be given when selecting the input bias voltage. For example, when operating on a single 3-V power
supply, common-mode range is from 0.1 V below ground to half the power-supply voltage.
Normally, input bias current is approximately 70 pA; however, input voltages exceeding the power supplies can
cause excessive current to flow in or out of the input pins. Momentary voltages greater than the power supply
can be tolerated if the input current is limited to 10 mA. This is easily accomplished with an input resistor, as
shown in Figure 21.
Current-limiting resistor
required if input voltage
exceeds supply rails by
³ 0.5 V.
5V
IOVERLOAD
10 mA max
OPA335
VOUT
VIN
5 kW
S0146-01
Figure 21. Input Current Protection
INTERNAL OFFSET CORRECTION
The OPA2335 op amp uses an auto-zero topology with a time-continuous 2-MHz op amp in the signal path. This
amplifier is zero-corrected every 100 µs using a proprietary technique. Upon power-up, the amplifier requires
one full auto-zero cycle of approximately 100 µs to achieve specified VOS accuracy. Prior to this time, the
amplifier functions properly, but with unspecified offset voltage.
This design has remarkably little aliasing and noise. Zero correction occurs at a 10-kHz rate, but there is virtually
no fundamental noise energy present at that frequency. For all practical purposes, any glitches have energy at
20 MHz or higher and are easily filtered, if required. Most applications are not sensitive to such high-frequency
noise, and no filtering is required.
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APPLICATION INFORMATION (continued)
Unity-gain operation demands that the auto-zero circuitry correct for common-mode rejection errors of the main
amplifier. Because these errors can be larger than 0.01% of a full-scale input step change, one calibration cycle
(100 µs) can be required to achieve full accuracy. This behavior is shown in the typical characteristic section,
see Settling Time vs Closed-Loop Gain.
ACHIEVING OUTPUT SWING TO THE OP AMP’S NEGATIVE RAIL
Some applications require output voltage swing from 0 V to a positive full-scale voltage (such as 2.5 V) with
excellent accuracy. With most single-supply op amps, problems arise when the output signal approaches 0 V,
near the lower output swing limit of a single-supply op amp. A good single-supply op amp may swing close to
single-supply ground, but will not reach ground. The output of the OPA2335 can be made to swing to ground, or
slightly below, on a single-supply power source. To do so requires use of another resistor and an additional,
more negative, power supply than the op amp’s negative supply. A pull-down resistor may be connected
between the output and the additional negative supply to pull the output down below the value that the output
would otherwise achieve, as shown in Figure 22.
V+ = 5 V
VOUT
OPA335
VIN
Op Amp’s V- = Gnd
RP = 40 kW
-5 V
Additional
Negative
Supply
S0147-01
Figure 22. Op Amp With Pull-Down Resistor to Achieve VOUT = Ground
The OPA2335 has an output stage that allows the output voltage to be pulled to its negative supply rail, or
slightly below using the above technique. This technique only works with some types of output stages. The
OPA2335 has been characterized to perform well with this technique. Accuracy is excellent down to 0 V and as
low as –2 mV. Limiting and non-linearity occurs below –2 mV, but excellent accuracy returns as the output is
again driven above –2 mV. Lowering the resistance of the pull-down resistor allows the op amp to swing even
further below the negative rail. Resistances as low as 10 kΩ can be used to achieve excellent accuracy, down to
–10 mV.
LAYOUT GUIDELINES
Attention to good layout practices is always recommended. Keep traces short. When possible, use a PCB
ground plane with surface-mount components placed as close to the device pins as possible. Place a 0.1-µF
capacitor closely across the supply pins. These guidelines should be applied throughout the analog circuit to
improve performance and provide benefits, such as reducing the EMI (electromagnetic-interference)
susceptibility.
10
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APPLICATION INFORMATION (continued)
5V
4.096 V
REF3040
+
0.1 mF
R1
6.04 kW
D1
-
R2
2.94 kW
-
R9
150 kW
R5
31.6 kW
K-Type
Thermocouple
40.7 mV/°C
R4
6.04 kW
R3
60.4 W
0.1 mF
+
R2
549 W
R6
200 W
+ +
5V
VOUT
OPA335
Zero Adj.
S0148-01
Figure 23. Temperature Measurement Circuit
IIN
IIN
R1
R1
2.5 V
5V
Photodiode
Photodiode
OPA343
1 MW
OPA343
-2.5 V
C1
1 MW
C1
2.5 V
5V
R2
C2
-2.5 V
R2
(1)
OPA335
Optional pull-down
resistor to allow below
ground output swing.
OPA335
(1)
40 kW
C2
-5 V
a. Split Supply
b. Single Supply
S0149-01
Figure 24. Auto-Zeroed Transimpedance Amplifier
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APPLICATION INFORMATION (continued)
VEX = 2.5 V
VEX
R1 = 105 W
Select R1 so bridge
output £ VCMmax
R1
R
R
R
R
5V
300 W
Bridge
VOUT
OPA335
@ VS = 2.7 V,
VCMmax = 1.2 V
R2
2.7 V
OPA335
VOUT
R2
R1
VREF
VREF
a. 5 V Supply Bridge Amplifier
b. 2.7 V Supply Bridge Amplifier
S0150-01
Figure 25. Single Op-Amp Bridge Amplifier Circuits
VREF
R2
R1
R1
R2
5V
R
R
R
R
G=1+
1/2
OPA2335
R2
R1
5V
1/2
OPA2335
VOUT
(1)
R3
40 kW
(1)
Optional pull-down resistor to allow accurate swing to 0 V.
-5 V
S0151-01
Figure 26. Dual Op-Amp IA Bridge Amplifier
12
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APPLICATION INFORMATION (continued)
11.5 kW
V
5V
fS = 0.63 V
5V
Load
OPA335
(1)
R3
40 kW
50 mV
Shunt
RS
1 kW
G = 12.5
(1)
-5 V
ADS1100
2
IC
(PGA Gain = 8)
5 V fS
Pull-down resistor to allow accurate swing to 0 V.
S0152-01
Figure 27. Low-Side Current Measurement
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APPLICATION INFORMATION (continued)
R1
4.12 kW
C1
56 pF
5V
C2
0.1 mF
R3
100 W
VOUT
OPA353
Photodiode = 2 pF
(1)
R2
C3
1 nF
2 kW
-5 V
C4
10 nF
R7
1 kW
5V
Photodiode Bias
C7
1 mF
C6
0.1 mF
R4
100 kW
R6
49.9 kW
OPA335
(1)
R5
40 kW
(1)
C5
10 nF
-5 V
Pull-down resistors to allow accurate swing to 0 V.
S0153-01
Figure 28. High Dynamic-Range Transimpedance Amplifier
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» 1 MHz Bandwidth
VOS » 10 mV
MECHANICAL DATA
MCER001A – JANUARY 1995 – REVISED JANUARY 1997
JG (R-GDIP-T8)
CERAMIC DUAL-IN-LINE
0.400 (10,16)
0.355 (9,00)
8
5
0.280 (7,11)
0.245 (6,22)
1
0.063 (1,60)
0.015 (0,38)
4
0.065 (1,65)
0.045 (1,14)
0.310 (7,87)
0.290 (7,37)
0.020 (0,51) MIN
0.200 (5,08) MAX
Seating Plane
0.130 (3,30) MIN
0.023 (0,58)
0.015 (0,38)
0°–15°
0.100 (2,54)
0.014 (0,36)
0.008 (0,20)
4040107/C 08/96
NOTES: A.
B.
C.
D.
E.
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
This package can be hermetically sealed with a ceramic lid using glass frit.
Index point is provided on cap for terminal identification.
Falls within MIL STD 1835 GDIP1-T8
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
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Amplifiers
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amplifier.ti.com
dataconverter.ti.com
dsp.ti.com
www.ti.com/clocks
interface.ti.com
logic.ti.com
power.ti.com
microcontroller.ti.com
www.ti-rfid.com
www.ti.com/lprf
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