BB OPA358AIDCKT

OPA358
SB0S296C − MARCH 2004 − REVISED FEBRUARY 2005
3V Single-Supply
80MHz High-Speed Op Amp in SC70
FEATURES
D HIGH BANDWIDTH: 80MHz
D HIGH SLEW RATE: 55V/µs
D EXCELLENT VIDEO PERFORMANCE
− 0.5dB GAIN FLATNESS: 25MHz
− DIFFERENTIAL GAIN: 0.3%
− DIFFERENTIAL PHASE: 0.7°
D
D
D
D
D
D
INPUT RANGE INCLUDES GROUND
RAIL-TO-RAIL OUTPUT
SHUTDOWN CURRENT: < 5µA
LOW QUIESCENT CURRENT: 5.2mA
SINGLE-SUPPLY OPERATING RANGE:
+2.7V to +3.3V
MicroSIZE PACKAGE: SC70-6
APPLICATIONS
D
D
D
D
D
D
D
D
DESCRIPTION
The high-speed OPA358 amplifier is optimized for 3V
single-supply operation. The output typically swings within
5mV of GND with a 150Ω load connected to GND. The
input common-mode range includes GND and swings to
within 1V of the positive power supply. The OPA358 offers
excellent video performance: 0.5dB gain flatness is
25MHz, differential gain is 0.3%, and differential phase is
0.7°.
The OPA358 is optimized for supply voltages from +2.7V
to +3.3V, with an operating range of +2.5V to +3.6V.
Quiescent current is only 5.2mA per channel.
In shutdown mode, the quiescent current is reduced to
< 5µA, dramatically reducing power consumption. This is
especially important in battery-operated equipment such
as digital still cameras (DSCs) or mobile phones with
integrated cameras.
DIGITAL STILL CAMERAS
The OPA358 is available in SC70-6, the smallest package
currently available for video applications.
CAMERA PHONES
DIGITAL MEDIA PLAYERS
DIGITAL VIDEO CAMERAS
SET-TOP-BOX VIDEO FILTERS
OPA358 RELATED PRODUCTS
OPTICAL POWER MONITORING
TRANSIMPEDANCE AMPLIFIERS
AUTOMATIC TEST EQUIPMENT
FEATURES
PRODUCT
G = 2, Internal Filter, Sag Correction, Shutdown, Video Amp
OPA360
100MHz GBW, RR I/O, Shutdown, CMOS Amp
OPA357
200MHz GBW, RR Out, Shutdown, CMOS Amp
OPA355
38MHz GBW, RR I/O, CMOS Amp
OPA350
> 200MHz, Shutdown, Video Buffer Amp, G = 2
OPA692
100MHz BW, Differential Input/Output, 3.3V Supply
THS412x
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments
semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
Copyright  2004−2005, Texas Instruments Incorporated
! ! www.ti.com
"#$
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SB0S296C − MARCH 2004 − REVISED FEBRUARY 2005
PACKAGE/ORDERING INFORMATION(1)
PRODUCT
PACKAGE
PACKAGE
DESIGNATOR
SPECIFIED
TEMPERATURE
RANGE
PACKAGE
MARKING
OPA358
SC70-6
DCK
−40°C to +85°C
AUS
ORDERING
NUMBER
TRANSPORT
MEDIA, QUANTITY
OPA358AIDCKT
Tape and Reel, 250
OPA358AIDCKR
Tape and Reel, 3000
(1) For the most current package and ordering information, see the Package Option Addendum located at the end of this document, or see the
TI website at www.ti.com.
This integrated circuit can be damaged by ESD. Texas
Instruments recommends that all integrated circuits be
handled with appropriate precautions. Failure to observe
proper handling and installation procedures can cause damage.
ABSOLUTE MAXIMUM RATINGS(1)
Supply Voltage, V+ to V− . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +3.6V
Signal Input Terminals, Voltage(2) . . . . (V−) −0.5V to (V+) + 0.5V
Signal Input Terminals, Current(2) . . . . . . . . . . . . . . . . . . . . ±10mA
Output Short-Circuit(3) . . . . . . . . . . . . . . . . . . . . . . . . . Continuous
Operating Temperature . . . . . . . . . . . . . . . . . . . . . . −40°C to +85°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . −65°C to +150°C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +160°C
Lead Temperature (soldering, 10s) . . . . . . . . . . . . . . . . . . . . +300°C
ESD Rating:
Human Body Model (HBM) . . . . . . . . . . . . . . . . . . . . . . . 4000V
Charged Device Model (CDM) . . . . . . . . . . . . . . . . . . . . 1500V
Machine Model (MM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 400V
(1) Stresses above these ratings may cause permanent damage.
Exposure to absolute maximum conditions for extended periods
may degrade device reliability. These are stress ratings only, and
functional operation of the device at these or any other conditions
beyond those specified is not implied.
(2) Input terminals are diode-clamped to the power-supply rails.
Input signals that can swing more than 0.5V beyond the supply
rails should be current-limited to 10mA or less.
(3) Short-circuit to ground, one amplifier per package.
ESD damage can range from subtle performance degradation to
complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could
cause the device not to meet its published specifications.
PIN CONFIGURATIONS
OPA358
1
GND
2
−In
3
AUS
+In
6
V+
5
Enable
4
Out
SC70−6(1)
(1) Pin 1 is determined by orienting the package marking as indicated in the diagram.
2
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SB0S296C − MARCH 2004 − REVISED FEBRUARY 2005
ELECTRICAL CHARACTERISTICS: VS = +2.7V to +3.3V Single-Supply
Boldface limits apply over the specified temperature range, TA = −40°C to +85°C.
All specifications at TA = +25°C, RL = 150Ω connected to VS/2, unless otherwise noted.
OPA358
PARAMETER
OFFSET VOLTAGE
Input Offset Voltage
Over Temperature
Drift
vs. Power Supply
INPUT BIAS CURRENT
Input Bias Current
Input Offset Current
NOISE
Input Voltage Noise Density
INPUT VOLTAGE RANGE
Common-Mode Voltage Range
Common-Mode Rejection Ratio
CONDITIONS
VOS
dVOS/dT
PSRR
MIN
VS = +3.3V
Specified Temperature Range
Specified Temperature Range
VS = +2.7V to +3.3V
IB
IOS
en
VCM
CMRR
f = 1MHz
FREQUENCY RESPONSE
Gain-Bandwidth Product
Bandwidth for 0.1dB Gain Flatness
Bandwidth for 0.5dB Gain Flatness
Slew Rate
Settling Time to 0.1%
Differential Gain Error
Differential Phase Error
AOL
GBW
f0.1dB
f0.5dB
SR
OUTPUT
Voltage Output Swing from Rail
Over Temperature
Output Current(1)
Open-Loop Output Impedance
POWER SUPPLY
Specified Voltage Range
Minimum Operating Voltage Range
Quiescent Current
IO
ENABLE/SHUTDOWN FUNCTION
Disabled (logic−LOW Threshold)
Enabled (logic−HIGH Threshold)
Enable Time
Disable Time
Shutdown Current
TEMPERATURE RANGE
Specified Range
Operating Range
Storage Range
Thermal Resistance
SC70
UNITS
±2
±6
±15
5
±80
±350
mV
mV
µV/°C
µV/V
±0.3
±1
±50
±50
pA
pA
(V−) − 0.1
60
60
nV/√Hz
80
V
dB
dB
1013 || 1.5
1013 || 1.5
Ω || pF
Ω || pF
VS = +3.3V, 0.1V < VO < 3.1V
84
92
See Typical Characteristics
dB
G = +10, RL = 1kΩ
G = +2, VO = 100mVPP, RF = 560Ω
G = +2, VO = 100mVPP, RF = 560Ω
VS = +3.3V, G = +2, 2.5V Output Step
G = 1, RL = 150Ω
PAL, RL = 150Ω
PAL, RL = 150Ω
80
12
25
55
35
0.3
0.7
MHz
MHz
MHz
V/µs
ns
%
°
VS = +3.3V, −0.1V < VCM < 2.3V
Specified Temperature Range
VS = +3.3V, AOL > 84dB
VS = +3.3V
VS = +3.3V, VIN = 0V, RL = 150Ω to GND
VS = +3.3V, 0.5V from Supplies
f = 1MHz, IO = 0
VS
IQ
MAX
6.4
INPUT IMPEDANCE
Differential
Common-Mode
OPEN-LOOP GAIN
Open-Loop Voltage Gain
Over Temperature
TYP
(V+) − 1.0
(V−) + 100
(V−) + 100
(V+) − 200
(V+) − 300
mV
mV
mV
mA
Ω
3.3
V
V
mA
mA
5
±50
20
2.7
2.5 to 3.6
5.2
VS = +3.3V, Enabled, IO = 0
Specified Temperature Range
7.5
8.5
0.8
5
V
V
µs
ns
µA
+85
+85
+150
°C
°C
°C
1.6
1.5
50
2.5
VS = +3.3, Disabled
−40
−40
−65
qJA
250
°C/W
(1) See typical characteristics chart, Output Voltage Swing vs Output Current.
3
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SB0S296C − MARCH 2004 − REVISED FEBRUARY 2005
TYPICAL CHARACTERISTICS
All specifications at TA = +25°C, RL = 150Ω connected to VS/2, unless otherwise noted.
POWER−SUPPLY AND COMMON−MODE
REJECTION RATIO vs FREQUENCY
180
180
160
160
140
140
120
120
Phase
100
100
80
80
60
60
Gain
40
40
20
20
0
0
−20
100
1k
10k
100k
1M
10M
100M
100
PSRR and CMRR (dB)
200
Open−Loop Phase ( _ )
Open−Loop Gain (dB)
OPEN−LOOP GAIN AND PHASE vs FREQUENCY
200
80
+PSRR
60
CMRR
40
−PSRR
20
−20
1G
0
1k
Frequency (MHz)
10k
100k
1M
10M
100M
Frequency (Hz)
INPUT VOLTAGE NOISE SPECTRAL DENSITY
GAIN FLATNESS vs FREQUENCY
1.0
1000
Voltage Noise (nV/√Hz)
Normalized Gain (dB)
G=2
0.5
0
−0.5
−1.0
10
1
1
10
100
Frequency (MHz)
6
5
4
3
2
1
0
−1
−2
−3
−4
−5
100
1k
10k
DIFFERENTIAL GAIN
INP = C A SYNC = INT
−1
0 . 1 9 %1
DG1
0.28 % .
DG2
0.30 % .
DG3
0.30 % .
DG4
0 . 2 8 %5
DG5
STEPS
4
5
Population
−6
Offset Voltage (mV)
10
100k
1M
10M
Frequency (Hz)
OFFSET VOLTAGE PRODUCTION DISTRIBUTION
4
100
DIFFERENTIAL PHASE
INP = C A SYNC = INT
−1
DP1 − 0 . 1 3 d g 1
DP2
0.16dg.
DP3
0.47dg.
DP4
0.66dg.
DP5
0.69dg5
STEPS
4
5
MTIME = 1
0
0
ZOOM
1
2
MTIME = 1
0
0
ZOOM
1
2
LIN E = 330
+1
SAVE
RESULTS
LIN E = 330
+1
SAVE
RESULTS
"#$
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SB0S296C − MARCH 2004 − REVISED FEBRUARY 2005
TYPICAL CHARACTERISTICS (continued)
All specifications at TA = +25°C, RL = 150Ω connected to VS/2, unless otherwise noted.
QUIESCENT CURRENT vs TEMPERATURE
SHUTDOWN CURRENT vs TEMPERATURE
8
3.5
3.0
6
Shutdown Current (µA)
Quiescent Current (mA)
7
5
4
3
2
1
2.5
2.0
1.5
1.0
0.5
0
−50
−25
0
25
50
75
0
100
−50
Temperature (_C)
−25
0
25
75
100
125
OPEN−LOOP GAIN, COMMON−MODE REJECTION, AND
POWER−SUPPLY REJECTION RATIO vs TEMPERATURE
INPUT BIAS CURRENT vs TEMPERATURE
10
110
AOL
100
1
AOL, PSRR, CMRR (dB)
Input Bias Current (pA)
50
Temperature (_ C)
0.1
0.01
PSRR
90
80
70
CMRR
60
50
40
30
20
0.001
−50
10
−25
0
25
50
75
100
Temperature (_ C)
0
−50
−25
0
25
50
75
100
Temperature (_ C)
OUTPUT VOLTAGE vs OUTPUT CURRENT
LARGE−SIGNAL TRANSIENT
(V+)
−55_C
G=2
85_C
(V+) − 1.0
25_C
(V+) − 1.5
(V−) + 1.5
−55_ C
(V−) + 1.0
500mV/div
Output Voltage (V)
(V+) − 0.5
25_C
85_C
(V−) + 0.5
(V−)
0
20
40
60
Output Current (mA)
80
100
Time (25ns/div)
5
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SB0S296C − MARCH 2004 − REVISED FEBRUARY 2005
TYPICAL CHARACTERISTICS (continued)
All specifications at TA = +25°C, RL = 150Ω connected to VS/2, unless otherwise noted.
ENABLE FUNCTION
SMALL−SIGNAL TRANSIENT
G=1
20mV/div
500mV/div
Enabled
Disabled
Time (25ns/div)
6
VOUT
Time (500ns/div)
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SB0S296C − MARCH 2004 − REVISED FEBRUARY 2005
APPLICATIONS INFORMATION
OPERATING VOLTAGE
The OPA358 is fully specified from +2.7V to +3.3V over a
temperature range of −40°C to +85°C. Parameters that
vary significantly with operating voltages or temperature
are shown in the Typical Characteristics.
Power-supply pins should be bypassed with a 100nF
ceramic capacitor.
INPUT VOLTAGE
The input common-mode range of the OPA358 extends
from (V−) − 0.1V to (V+) − 1.0V.
INPUT OVER-VOLTAGE PROTECTION
All OPA358 pins are static-protected with internal ESD
protection diodes connected to the supplies. These diodes
will provide input overdrive protection if the current is
externally limited to 10mA.
RAIL-TO-RAIL OUTPUT
A class AB output stage with common-source transistors
is used to achieve rail-to-rail output. For a 150Ω load, the
output voltage swing is 100mV from the negative rail and
200mV from the positive rail when the load is connected
to VS/2. For lighter loads, the output swings significantly
closer to the supply rails while maintaining high open-loop
gain. If the load is connected to ground, the OPA358 output
typically swings to within 5mV of ground. See the typical
characteristic curve, Output Voltage Swing vs Output
Current.
ENABLE/SHUTDOWN
The OPA358 has a shutdown feature that disables the
output and reduces the quiescent current to less than 5µA.
This feature is especially useful for portable video
applications such as digital still cameras (DSCs) and
camera phones, where the equipment is infrequently
connected to a TV or other video device.
The Enable logic input voltage is referenced to the
OPA358 GND pin. A logic level HIGH applied to the enable
pin enables the op amp. A valid logic HIGH is defined as
≥ 1.6V above GND. A valid logic LOW is defined as ≤ 0.8V
above GND. If the Enable pin is not connected, internal
pull-up circuitry will enable the amplifier. Enable pin
voltage levels are tested for a valid logic HIGH threshold
of 1.6V minimum and a valid logic LOW threshold of 0.8V
maximum.
The enable time is 1.5µs and the disable time is only 50ns.
This allows the output of the OPA358 to be multiplexed
onto a common output bus. When disabled, the output
assumes a high-impedance state.
+3V
100nF
VIN
VOUT
Television
75Ω
75Ω
1kΩ
1kΩ
Figure 1. Typical Circuit Using the OPA358 in a Gain = 2 Configuration
7
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SB0S296C − MARCH 2004 − REVISED FEBRUARY 2005
VIDEO PERFORMANCE
Industry standard video test patterns include:
D Multiburst—packets of different test frequencies to
check for basic frequency response.
D Multipulse—pulses
modulated
at
different
frequencies to test for comprehensive measurement
of amplitude and group delay errors across the video
baseband.
D Chrominance-to-luminence (CCIR17) — tests amplitude, phase and some distortion
amplitudes. Figure 3 shows the multiburst test pattern;
Figure 4 shows the multipulse. The top waveforms in
these figures show the full test pattern. The middle and
bottom waveform are a more detailed view of the critical
portion of the full waveform. The middle waveform
represents the input signal from the video generator; the
bottom waveform is the OPA358 output to the line.
Figure 2 shows the test circuits for Figure 3 through
Figure 13 and Figure 16. (NOTE: 1 and 2 indicate
measurement points corresponding to the waveforms
labeled 1 and 2 in the figures.)
1
2
500Ω
500Ω
a. Test circuit for Figure 3 through Figure 5.
Figure 3. Multiburst (CCIR 18) Test Pattern (PAL)
1
2
500Ω
500Ω
b. Test circuit for Figure 6.
NOTE: 1 and 2 indicate measurement points
corresponding to the waveforms labeled 1 and
2 in the figures.
Figure 2. Test Circuits Used for Figure 3 through
Figure 6
FREQUENCY RESPONSE OF THE OPA358
Frequency response measurements evaluate the ability of
a video system to uniformly transfer signal components of
different frequencies without affecting their respective
8
Figure 4. Multipulse Test Pattern (PAL)
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SB0S296C − MARCH 2004 − REVISED FEBRUARY 2005
Chrominance-to-luminence gain inequality (or relative
chrominance level) is a change in the gain ratio of the
chrominance and luminence components of a video
signal, which are at different frequencies. A common test
pattern is the pulse in test pattern CCIR 17, shown in
Figure 5. As in Figure 3 and Figure 4, the top waveform
shows the full test pattern. The middle and bottom
waveform are a more detailed view of the critical portion of
the full waveform, with the middle waveform representing
the input signal from the video generator and the bottom
waveform being the OPA358 output to the line.
100Hz range produces field tilt which can interfere with
proper recovery of synchronization signals in the television
receiver.
600mV
0V
Figure 6. OPA358 Output Swing with Input Sync
Level at 0V
Figure 5. CCIR 17 Test Pattern (PAL)
The OPA358 with sag correction (Figure 7b) creates an
amplitude response peak in the 20Hz region. This small
amount of peaking (a few tenths of a dB) provides
compensation of the phase response in the critical 50Hz
to 100Hz range, greatly reducing field tilt. Note that two
significantly smaller and lower-cost capacitors are
required.
Gain errors most commonly appear as attenuation or
peaking of the chrominance information. This shows up in
the picture as incorrect color saturation. Delay distortion
will cause color smearing or bleeding, particularly at the
edges of objects in the picture. It may also cause poor
reproduction of sharp luminence transitions.
220µF 75Ω
75Ω
G=2
Figure 3 through Figure 5 show that the OPA358 causes
no visible distortion or change in gain throughout the entire
video frequency range.
a) Traditional Video Circuit
OUTPUT SWING TO GND (SYNC PULSE)
Figure 6 shows the output swing capability of the OPA358
by driving the input with a sync level of 0V. The output of
the OPA358 swings very close to 0V, typically to within less
than 5mV with an 150Ω load connected to ground.
SAG CORRECTION
Sag correction provides excellent video performance with
two small output coupling capacitors. It eliminates the
traditional, large 220µF output capacitor. The traditional
220µF circuit (Figure 7a) creates a single low frequency
pole (−3dB frequency) at 5Hz. If this capacitor is made
much smaller, excessive phase shift in the critical 50Hz to
47µF
1.3kΩ
499Ω
1kΩ
75Ω
22µF
75Ω
825Ω
DC Gain = 2.8
AC Gain = 2
b) OPA358 with Sag Correction
Figure 7. Traditional Video Circuit vs OPA358
with Sag Correction
9
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SB0S296C − MARCH 2004 − REVISED FEBRUARY 2005
WIDEBAND VIDEO MULTIPLEXING
The output voltage swing for the circuit with sag correction
(see Figure 7b) is a function of the coupling capacitor
value. The value of the sag correction capacitor has only
a minor influence. The smaller the coupling capacitor, the
greater the output swing. Therefore, to accommodate the
large signal swing with very small coupling capacitors
(22µF and 33µF), a higher supply voltage might be
needed.
One common application for video amplifiers which
include an enable pin is to wire multiple amplifier outputs
together, then select which one of several possible video
inputs to source onto a single line. This simple Wired-OR
Video Multiplexer can be easily implemented using the
OPA358, as shown in Figure 9.
DC-COUPLED OUTPUT
V+ = 2.7V to 3.3V
Due to the excellent swing to ground, the OPA358 can also
be DC- coupled to a video load. As shown in Figure 8, this
eliminates the need for AC-coupling capacitors at the
output. This is especially important in portable video
applications where board space is restricted.
Enable
R OUT
75Ω
Video
DAC
(1)
OPA358
75Ω
The DC-coupled output configuration also shows the best
video performance. There is no line or field tilt—allowing
use of the lowest power supply. In this mode, the OPA358
will safely operate down to 2.5V with no clipping of the
signal.
R1
G=1+
R1
R2
R2
Television
or VCR
GND
The disadvantage with DC-coupled output is that it uses
somewhat higher supply current.
NOTE: (1) Optional 200Ω for use with TI’s digital media processors,
and 500Ω for OMAP2420 and OMAP2430 processors.
Figure 8. DC-Coupled Input/DC-Coupled Output
+3.3
+
75Ω
Signal #1
1µF
10nF
OPA358
1kΩ
75Ω
VOUT
1kΩ
75Ω
+3.3V
+
75Ω
Signal #2
1µF
10nF
OPA358
1kΩ
1kΩ
HCO4
BON
Select
AON
Figure 9. Multiplexed Output
10
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SB0S296C − MARCH 2004 − REVISED FEBRUARY 2005
CAPACITIVE LOAD AND STABILITY
The OPA358 can drive a wide range of capacitive loads.
However, all op amps under certain conditions may
become unstable. Op amp configuration, gain, and load
value are just a few of the factors to consider when
determining stability. An op amp in unity-gain configuration
is most susceptible to the effects of capacitive loading. The
capacitive load reacts with the op amp output resistance,
along with any additional load resistance, to create a pole
in the small-signal response that degrades the phase
margin.
One method of improving capacitive load drive in the
unity-gain configuration is to insert a 10Ω to 20Ω resistor
in series with the output, as shown in Figure 10. This
significantly reduces ringing with large capacitive loads.
However, if there is a resistive load in parallel with the
capacitive load, RS creates a voltage divider. This
introduces a DC error at the output and slightly reduces
output swing. This error may be insignificant. For instance,
with RL = 10kΩ and RS = 20Ω, there is only about a 0.2%
error at the output.
The key elements to a transimpedance design, as shown
in Figure 11, are the expected diode capacitance
(including the parasitic input common-mode and
differential-mode input capacitance (1.5 + 1.5)pF for the
OPA358), the desired transimpedance gain (RF), and the
Gain Bandwidth Product (GBW) for the OPA358 (80MHz).
With these 3 variables set, the feedback capacitor value
(CF) may be set to control the frequency response.
CF
<1pF
(prevents gain peaking)
RF
10MΩ
+V
λ
CD
VOUT
OPA358
To enable,
connect to V+
or drive with logic.
V+
RS
VOUT
OPA358
VIN
RL
CL
To enable,
connect to V+
or drive with logic.
Figure 10. Series Resistor in Unity-Gain
Configuration Improves Capacitive Load Drive
WIDEBAND TRANSIMPEDANCE AMPLIFIER
Wide bandwidth, low input bias current, and low input
voltage and current noise make the OPA358 an ideal
wideband photodiode transimpedance amplifier for
low-voltage single-supply applications. Low-voltage noise
is important because photodiode capacitance causes the
effective noise gain of the circuit to increase at high
frequency.
Figure 11. Transimpedance Amplifier
To achieve a maximally flat 2nd-order Butterworth
frequency response, the feedback pole should be set to:
1
+
2pR FCF
GBW
Ǹ4pR
C
F
D
(1)
Typical surface-mount resistors have a parasitic
capacitance of around 0.2pF that must be deducted from
the calculated feedback capacitance value.
Bandwidth is calculated by:
f *3dB +
GBW Hz
Ǹ2pR
C
F
D
(2)
For even higher transimpedance bandwidth, the CMOS
OPA380 (90MHz GBW), OPA355 (200MHz GBW), or the
OPA655 (400MHz GBW) may be used.
11
PACKAGE OPTION ADDENDUM
www.ti.com
3-Feb-2005
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
OPA358AIDCKR
ACTIVE
SC70
DCK
6
3000
None
CU SNPB
Level-2-240C-1 YEAR
OPA358AIDCKT
ACTIVE
SC70
DCK
6
250
None
CU SNPB
Level-2-240C-1 YEAR
Lead/Ball Finish
MSL Peak Temp (3)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - May not be currently available - please check http://www.ti.com/productcontent for the latest availability information and additional
product content details.
None: Not yet available Lead (Pb-Free).
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean "Pb-Free" and in addition, uses package materials that do not contain halogens,
including bromine (Br) or antimony (Sb) above 0.1% of total product weight.
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDECindustry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
MECHANICAL DATA
MPDS114 – FEBRUARY 2002
DCK (R-PDSO-G6)
PLASTIC SMALL-OUTLINE PACKAGE
0,30
0,15
0,65
6
0,10 M
4
1,40
1,10
1
0,13 NOM
2,40
1,80
3
Gage Plane
2,15
1,85
0,15
0°–8°
0,46
0,26
Seating Plane
1,10
0,80
0,10
0,00
0,10
4093553-3/D 01/02
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion.
Falls within JEDEC MO-203
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
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