CIRRUS CRD4202-1

CRD4202-1
CrystalClear™ AC '97 Six Channel CNR Audio Reference Design
Features
Description
! Six
The CRD4202-1 reference design features six channel
analog audio outputs, an optical S/PDIF digital output,
and Communication and Networking Riser (CNR) interface. This design uses the CS4202 audio codec which
has several advanced features including a built-in headphone amplifier, simultaneous six channel analog and
S/PDIF optical digital output, GPIO for headphone detection, and up to 30 dB of internal microphone boost.
Channel Analog Audio Outputs
! Headphone Sense using GPIO
! CS4202 codec and two CS4334 DACs
! 20-bit D to A conversion (DAC)
! 18-bit A to D conversion (ADC)
! S/PDIF (IEC-958) optical digital output
! Complete suite of Analog I/O connections:
– Line, Mic, CD, Video, Modem, and Aux Inputs
– Modem, Headphone, Line Front, Line Rear
and Line Center/Sub-Woofer Outputs
! 2-layer
low cost PC board
Intel ® AC '97 revision 2.2
! Exceeds Microsoft’s® PC 2001 audio
performance requirements.
! Meets
The CRD4202-1 reference design is available by ordering the CMK4202-1 manufacturing kit. This kit includes
the CRD4202-1 board, a full set of schematic design
files (OrCAD® format), PCB job files (PADS® ASCII),
PCB artwork files, and bill of materials. This reference
design offers significant cost savings over competing
solutions and can be easily modified to meet your specific design goals.
ORDERING INFO
CMK4202-1
(Manufacturing Kit)
Microphone Input
MIC
IN
INT MODEM
Line Input
LINE
IN
Line Output
LINE
OUT
Headphone Output
Rear Channel Output
Center / Sub-Woofer Output
S/PDIF Digital Optical Output
Preliminary Product Information
P.O. Box 17847, Austin, Texas 78760
(512) 445 7222 FAX: (512) 445 7581
http://www.cirrus.com
HEADPH
OUT
CD IN
VIDEO IN
AUX IN
Cirrus Logic
CRD4202-1
CS4202
SURR
OUT
CNT/LFE
OUT
S/PDIF
OUT
This document contains information for a new product.
Cirrus Logic reserves the right to modify this product without notice.
Copyright  Cirrus Logic, Inc. 2002
(All Rights Reserved)
JAN ‘02
DS549RD1A1
1
CRD4202-1
TABLE OF CONTENTS
1. GENERAL INFORMATION ...................................................................................3
2. SCHEMATIC DESCRIPTION ................................................................................3
2.1 CS4202 Audio Codec .................................................................................3
2.2 Analog Inputs ..............................................................................................3
2.3 Rear Channel and Surround Outputs .........................................................4
2.4 Front Channel and Headphone Outputs .....................................................4
2.5 S/PDIF Optical Output ................................................................................4
2.6 CNR Connector and EEPROM ...................................................................4
2.7 Auto Demotion Circuit .................................................................................4
2.8 Phase Locked Loop (Optional) ...................................................................4
2.9 Component Selection .................................................................................4
2.10 EMI Components ......................................................................................5
3. GROUNDING AND LAYOUT ................................................................................5
3.1 Partitioned Voltage and Ground Planes .....................................................5
3.2 AC-Link .......................................................................................................5
3.3 CS4202 Layout Notes .................................................................................5
4. REFERENCES .......................................................................................................6
4.1 ADDENDUM ...............................................................................................6
5. BILL OF MATERIALS .........................................................................................21
LIST OF FIGURES
Figure 1. Block Diagram ....................................................................................................7
Figure 2. CS4202 Audio Codec .........................................................................................8
Figure 3. Analog Inputs ......................................................................................................9
Figure 4. Center Channel, Surround, and Sub-Woofer Outputs ......................................10
Figure 5. Front Channel and Headphone Sense Output .................................................11
Figure 6. S/PDIF Optical Output ......................................................................................12
Figure 7. CNR Connector ................................................................................................13
Figure 8. Phase Locked Loop ..........................................................................................14
Figure 9. Auto Demotion and Serial Buffers ....................................................................15
Figure 10. PCB Layout: Top Assembly Drawing ..............................................................16
Figure 11. PCB Layout: Top Layer ..................................................................................17
Figure 12. PCB Layout: Bottom Layer .............................................................................18
Figure 13. PCB Layout: Drill Drawing ..............................................................................19
Figure 14. PCB Layout: Top Silkscreen ...........................................................................20
Contacting Cirrus Logic Support
For a complete listing of Direct Sales, Distributor, and Sales Representative contacts, visit the Cirrus Logic web site at:
http://www.cirrus.com/corporate/contacts/
Microsoft, Windows 95, Windows 98 and Windows Millennium and WHQL is registered trademark of Microsoft.
CrystalClear is a trademark of Cirrus Logic, Inc.
Intel is a registered trademark of Intel Corporation.
OrCAD is a registered trademark of OrCAD, Inc.
PADS is a registered trademark of, PADS Software, Inc.
Preliminary product information describes products which are in production, but for which full characterization data is not yet available. Advance product information
describes products which are in development and subject to development changes. Cirrus Logic, Inc. has made best efforts to ensure that the information contained
in this document is accurate and reliable. However, the information is subject to change without notice and is provided “AS IS” without warranty of any kind (express
or implied). No responsibility is assumed by Cirrus Logic, Inc. for the use of this information, nor for infringements of patents or other rights of third parties. This
document is the property of Cirrus Logic, Inc. and implies no license under patents, copyrights, trademarks, or trade secrets. No part of this publication may be
copied, reproduced, stored in a retrieval system, or transmitted, in any form or by any means (electronic, mechanical, photographic, or otherwise) without the prior
written consent of Cirrus Logic, Inc. Items from any Cirrus Logic website or disk may be printed for use by the user. However, no part of the printout or electronic
files may be copied, reproduced, stored in a retrieval system, or transmitted, in any form or by any means (electronic, mechanical, photographic, or otherwise) without the prior written consent of Cirrus Logic, Inc.Furthermore, no part of this publication may be used as a basis for manufacture or sale of any items without the
prior written consent of Cirrus Logic, Inc. The names of products of Cirrus Logic, Inc. or other vendors and suppliers appearing in this document may be trademarks
or service marks of their respective owners which may be registered in some jurisdictions. A list of Cirrus Logic, Inc. trademarks and service marks can be found at
http://www.cirrus.com.
2
DS549RD1A1
CRD4202-1
1. GENERAL INFORMATION
The CRD4202-1 reference design is a CNR card
that features six channel CD quality analog and
S/PDIF digital audio outputs. The card includes a
CS4202 AC '97 audio codec and two CS4334 24bit serial stereo DACs. This combination gives the
CRD4202-1 a rich feature set and industry leading
audio performance.
The CS4202 audio codec includes a stereo 20-bit
DAC, a stereo 18-bit ADC, and a very flexible analog audio mixer. The serial data outputs are paired
with two CS4334 DACs to provide four additional
channels of analog audio. The CS4202 also features three stereo pairs of line level analog inputs, a
microphone input, and a stereo pseudo-differential
CD input. The input signals can be routed to the
ADC for recording or mixed together for recording
and direct playback. The CS4202 has internal registers that are used to control its various features
such as volume levels, audio muting, and signal
routing. The CS4202 maintains high audio quality
and exceeds the Microsoft® PC 2001 audio performance specifications.
The CS4202 audio codec communicates to the audio controller across the CNR interface through the
AC-Link. The AC-Link is a 5-wire serial digital interface that transfers digital audio between the two
devices and also sends commands from the audio
controller to the CS4202 registers. For more information on the AC-Link, see the Intel® AC '97 revision 2.2 specification.
2. SCHEMATIC DESCRIPTION
The block diagram in Figure 1 illustrates the interconnections between the schematic pages found at
the end of this document. Sections 2.1 through 2.8
describe the circuitry contained in these schematics.
2.1
CS4202 Audio Codec
The CS4202 audio codec is shown in Figure 2. The
analog input signals to the CS4202 originate from
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the inputs in Figure 3, while the analog outputs are
shown in Figure 4 and Figure 5. AFLT1 and
AFLT2 (pins 29, 30) require 1000 pF NPO/COG
capacitors connected to analog ground. These capacitors provide a single pole lowpass filter to the
inputs of the CS4202 ADC. No other input filtering
is required.
The AC-Link may require series termination resistors to prevent reflections. These are normally
placed as close as possible to the transmitting end
of the AC-Link signal. The CS4202 SDATA_IN
(pin 8) and BIT_CLK (pin 6) outputs have 47 Ω series termination resistors.
The CS4202 is powered by separate analog and
digital power supplies, each with their own respective grounds. The AGND symbols refer to analog
ground and DGND symbols refer to digital ground.
For best results, connect the grounds together at a
single point with a 0.050 inch trace underneath the
CS4202. Each power pin requires an individual decoupling capacitor. These decoupling capacitors
are placed as close as possible to their respective
pins. The CS4202 audio codec uses a 0.1 µF ceramic capacitor for each of the 3.3 V digital and
5 V analog supply pins.
2.2
Analog Inputs
The LINE_IN, VIDEO_IN, and AUX_IN stereo
inputs in Figure 3 are connected to 6 dB voltage dividers and AC-coupled to the CS4202 with 1 µF
capacitors to minimize low frequency roll-off. The
voltage divider allows input signal levels of up to
2 Vrms. The 6 dB dividers are for PC 99 compatibility and not required for PC 2001 compliance.
The microphone input is AC-coupled using a 1 µF
capacitor to minimize low frequency roll-off. The
microphone circuit provides low voltage phantom
power for electret microphones. Phantom power is
derived from the +5 V analog supply and provides
a maximum of 4.2 V under no load and a minimum
of 2.0 V under a 0.8 mA load, as required by
PC 2001 specifications.
3
CRD4202-1
The CS4202 features a pseudo-differential CD input that minimizes common mode noise and interference. Each CD signal acts as one side of the
differential input and CD_COM acts as the other
side. CD_COM is used as the common return path
for both the left and right channels.
ed at OEMs, system manufacturers, and system integrators who wish take advantage of physically
separating their audio, modem, or LAN circuitry
from the PC motherboard. CNR accomplishes this
without the additional cost associated with the interface circuitry required for a PCI bus add-in card.
2.3
The CRD4202-1 uses the AC-Link, SMBus, and
power supply pins. The SMBus signals are connected to an AT24C02 EEPROM to provide Plugand-Play functionality for the CNR card. The EEPROM holds the Subsystem Vendor ID and Subsystem ID. It also contains other information for
implementing a Plug-and-Play CNR card. For additional information on the CNR design specifications, programming utilities, and information on
programming the EEPROM, visit the Intel® Communications and Network Riser (CNR) homepage
at http://developer.intel.com/technology/cnr/.
Center, LFE, and Surround Outputs
The audio outputs in Figure 4 drive the rear speakers (surround), center speaker (CNT), and subwoofer (LFE) in six channel applications. These
four outputs are driven digitally from the CS4202
through two serial output ports and converted to analog audio through two high-performance CS4334
24-bit stereo DACs.
2.4
Front Channel and Headphone
Outputs
Figure 5 details the Headphone and Line Output
circuits. The Line Outputs are the main analog outputs in a two channel system, and become the Front
Outputs in a six channel audio system.
The CS4202 has a built in headphone amplifier on
pins 39 and 41. These outputs are capable of driving headphones with impedances as low as 32 Ω.
The headphone outputs are AC-coupled through
220 µF capacitors. These large capacitor values
create excellent low frequency response even under
32 Ω loads.
2.7
Auto Demotion Circuit
The configuration of the codec on the CRD4202-1
will always be set as the primary audio codec.
However, it can automatically demote to secondary
in the presence of a motherboard codec when R54
is changed to 100 kΩ (Figure 9). This feature is in
accordance with the AC '97 Codec Disable and Demotion Rules.
2.8
Phase Locked Loop (Optional)
The S/PDIF (IEC-958) digital output shown in
Figure 6 is compatible with digital inputs on consumer devices such as Mini Disk recorders and
consumer stereo receivers. The S/PDIF output operates at a fixed sampling frequency of 48 kHz. It
uses an industry standard Toshiba TOTX-173 digital optical TOSLINK transmitter.
The internal ADCs, DACs, and AC-Link operate at
a fixed 48k Hz rate. The CS4202 is clocked by a
24.576 MHz (±50 PPM) crystal. Footprint Y2 is for
an optional surface mounted clock oscillator for
use with the Phase Locked Loop (PLL) feature of
the CS4202. Figure 8 shows the population options
for implementing the PLL that will convert various
clock rates to the required 24.576 MHz operating
speed.
2.6
2.9
2.5
S/PDIF Optical Output
CNR Connector and EEPROM
The CNR connector is shown in Figure 7. CNR is a
motherboard interface that supports audio, modem,
and LAN subsystems. CNR applications are target4
Component Selection
Great attention was given to the particular components used on the CRD4202-1 board with cost, per-
DS549RD1A1
CRD4202-1
formance, and package selection as the most
important factors. Listed are some of the guidelines
used in the selection of components:
•
No components smaller than 0805 SMT package.
•
Only single package passive components. No
resistor packs. This reduces the risk of crosstalk
between analog audio signals.
•
All components except connectors are in surface mount packages.
2.10
EMI Components
out. The analog and digital ground planes must be
tied together externally for the CS4202 to maintain
proper voltage references. For best results, the two
ground planes are tied together with a single 0.050
inch trace under the CS4202 near its digital ground
pins.
Data converters are generally susceptible to noise
on the crystal pins. In order to reduce noise from
coupling onto these pins, the area around the
24.576 MHz crystal and its signal traces are filled
with copper on the top and bottom of the PCB and
attached to digital ground.
Optional capacitors or inductors may be included
to help the board meet EMI compliance tests, such
as FCC Part 15. Choose these component values
according to individual requirements.
A separate chassis ground provides a noise-free
reference point for all of the EMI suppression components. The chassis ground plane is connected to
the analog ground plane at the external jacks.
3. GROUNDING AND LAYOUT
3.2
The component layout and signal routing of the
CRD4202-1 provide a good model for developing
new CNR add-in card designs.
According to the AC '97 revision 2.2 specification,
the AC-Link signals can have a maximum capacitance (including traces, connectors, and circuitry)
of 47.5 pF on BIT CLK and SDATA_IN (assuming
a single codec). If this capacitance is exceeded,
timing violations may occur and cause the system
to malfunction. In order to avoid adding excessive
capacitance, do not add any EMI capacitors to
ground on any of the AC-Link lines. In addition,
keep the trace length of the AC-Link as short as
possible. Keeping the AC-Link trace length under 8
inches is strongly recommend.
3.1
Partitioned Voltage and Ground
Planes
It is critical for good audio performance to separate
digital and analog sections to prevent digital noise
from affecting the performance of the analog circuits. The analog section of the CRD4202-1 is
physically isolated from the digital section with a
0.10 inch partition. Partitioning is defined as the
absence of copper on all PCB signal layers. The analog and digital sections have their own separate
ground planes. All analog components, power traces, and signal traces are routed over the analog
ground plane. Digital components, power traces,
and signal traces are not allowed to crossover into
the analog section.
3.3
AC-Link
CS4202 Layout Notes
Refer to the CS4202 Data Sheet for analog and digital partitioning guidelines and bypass capacitor
placement. Pay special attention to the location of
bypass capacitors on REFFLT, AFLT1, AFLT2,
and the placement of the power supply capacitors.
The CS4202 audio codec is placed at the transition
point between the analog and digital ground planes.
The codec pins are grouped into analog and digital
sections to help facilitate printed circuit board lay-
DS549RD1A1
5
CRD4202-1
4. REFERENCES
1) Intel®, Audio Codec '97 Component Specification, Revision 2.2, September, 2000.
http://developer.intel.com/ial/scalableplatforms/audio/index.htm/
2) Intel®, CNR Specification, Revision 1.1, October 18, 2000.
http://developer.intel.com/technology/cnr/
3) Cirrus Logic, CS4202 Audio Codec '97 Data Sheet
http://www.cirrus.com/products
4) Steve Harris, Clif Sanchez, Personal Computer Audio Quality Measurements, Version 1.0
http://www.cirrus.com/pubs/meas100.pdf
5) Microsoft, PC Design Guidelines,
http://www.microsoft.com/hwdev/desguid.htm
6) M. Montrose, Printed Circuit Board Design Techniques for EMC Compliance (2nd edition), IEEE
Press, New York: 2000.
4.1
ADDENDUM
•
Schematic drawings
•
Layout drawings
•
Bill of materials
6
DS549RD1A1
CRD4202-1
ANALOG_IN
CS4202
LINE_IN_L
LINE_IN_R
CD_IN_L
CD_IN_R
CD_C
VIDEO_IN_L
VIDEO_IN_R
AUX_IN_L
AUX_IN_R
ANALOG_OUT
LINE_IN_L
LINE_IN_R
HP_OUT_L
HP_OUT_R
HP_OUT_C
CD_IN_L
CD_IN_R
CD_C
GPIO2
VIDEO_IN_L
VIDEO_IN_R
HP_OUT_L
HP_OUT_R
HP_OUT_C
GPIO2
LINE_OUT_L
LINE_OUT_L
LINE_OUT_R
LINE_OUT_R
AUX_IN_L
AUX_IN_R
SPDIF_OUT
MIC_IN
PHONE_IN
MONO_OUT
PC_BEEP
MIC1
PHONE_IN
MONO_OUT
SPDIF_OUT
SPDIF_TX
PC_BEEP
PLL (optional)
ID0#
ID0#
ID1#
ID1#
SERIAL_PORT
ARST#
ABITCLK
ASYNC
ASDOUT
XTAL_IN
XTAL_OUT
ASDIN
PRIM_DN#
XTAL_IN
XTAL_OUT
SDOUT0
SDOUT1
SCLK
LRCLK
SDOUT0
SDOUT1
SCLK
LRCLK
MCLK
PRIM_SEC_SWITCH
ASDIN0
ASDIN1
ARST#
ABITCLK
ASYNC
ASDOUT
ASDIN0
ASDIN1
CNR_BUS
PRIM_DN#
ASDIN
PRIM_DN#
Figure 1. Block Diagram
DS549RD1A1
7
8
U1
+3.3VD
25
38
+5VA
1
9
12
PC_BEEP
C1
0.1uF
Z5U
C2
0.1uF
Z5U
C3
0.1uF
Z5U
DGND
C4
0.1uF
Z5U
AGND
13
14
PHONE_IN
AUX_IN_L
AUX_IN_R
VIDEO_IN_L
15
16
17
VIDEO_IN_R
CD_IN_L
18
19
CD_C
CD_IN_R
MIC1
20
21
22
23
24
LINE_IN_L
LINE_IN_R
28
27
29
30
R55
PRIM_DN#
C5
2.2uF
Y5V
C6
0.1uF
X7R
C7
1000pF
NPO
0
45
46
C8
NPO
2
3
XTAL_IN
XTAL_OUT
CS4202
AVdd1
AVdd2
AVss1
AVss2
DVdd1
DVss1
DVdd2
DVss2
PC_BEEP
PHONE
AUX_L
AUX_R
VIDEO_IN_L
VIDEO_IN_R
CD_L
CD_C
BIT_CLK
SDATA_OUT
SDATA_IN
SYNC
RESET#
LINE_OUT_L
LINE_OUT_R
CD_R
MIC1
MIC2
HP_OUT_L
HP_OUT_C
LINE_IN_L
LINE_IN_R
HP_OUT_R
GPIO2
Vrefout
MONO_OUT
REFFLT
AFLT1
AFLT2
SPDIF_OUT
EAPD/SCLK
ID0#
HPCFG
ID1#
GPIO0/LRCLK
GPIO1/SDOUT
GPIO3
GPIO4/SDO2
XTL_IN
XTL_OUT
26
42
4
7
6
R1
47
5
8
R2
47
10
11
35
36
ABITCLK
ASDOUT
ASDIN
ASYNC
ARST#
DGND
AGND
LINE_OUT_L
LINE_OUT_R
39
40
HP_OUT_L
HP_OUT_C
HP_OUT_R
GPIO2
41
32
37
MONO_OUT
48
47
SPDIF_OUT
SCLK
31
43
44
33
34
LRCLK
SDOUT0
SDOUT1
DGND
AGND
ID1#
ID0#
GND TIE 0.050 inches
DS549RD1A1
AGND
C12
1000pF
NPO
DGND
Y1
24.576 MHz
C13
1000pF
NPO
C14
22pF
NPO
DGND
C15
22pF
NPO
DGND
Figure 2. CS4202 Audio Codec
CRD4202-1
C11
1000pF
NPO
MONO_OUT
LINE_OUT_L
LINE_OUT_R
AGND
For 6 channel
configuration GPIO3 (pin 33)
is tied to
DGND.
LINE IN
L1
C16
J2
1uF
ELEC
+
3
2
1
R5
J1
4
3
5
2
1
L2
C18
1uF
ELEC
+
C19
100pF
NPO
CD_C
100K
Connect CGND
C20
100pF
NPO
to AGND at
R4
6.8K
R6
6.8K
R8
6.8K
R10
6.8K
C17
1uF
ELEC
C21
LINE_IN_R
1uF
ELEC
+
R9
AGND
AGND
[email protected]
CD_IN_R
100K
+
[email protected]
AGND
4
AGND
DS549RD1A1
CD IN
LINE_IN_L
the jack
L3
C22
1uF
ELEC
+
AGND
[email protected]
R12
CD_IN_L
AGND
CGND
100K
+5VA
VIDEO IN
MIC IN
L4
R13
6.8K
C23
J4
1uF
ELEC
+
6.8K
L5
R18
6.8K
[email protected]
R19
6.8K
2.2K
4
3
5
2
1
R15
1.5K
C24
1uF
ELEC
+
R16
[email protected]
AGND
4
3
2
R14
J3
VIDEO_IN_R
MIC_IN
1
C25
1uF
ELEC
+
VIDEO_IN_L
C26
100pF
NPO
Connect CGND
C27
100pF
NPO
+ C28
10uF
ELEC
AGND
to AGND at
the jack
AGND
AGND
AUX IN
AGND
CGND
BEEP IN
L6
R20
6.8K
C30
J5
1uF
ELEC
+
[email protected]
AGND
4
3
2
1
L8
R22
R21
47K
C31
J6
6.8K
6.8K
C33
R23
4.7K
C32
2700pF
X7R
1uF
ELEC
+
R25
0.1uF
Z5U
PC_BEEP
[email protected]
2
1
R24
AGND
[email protected]
L7
AUX_IN_R
AUX_IN_L
6.8K
-3 dB corners at 60 Hz
and 13.8 kHz
(Ri >= 28 kOhm)
DGND
AGND
AGND
AGND
INTERNAL MODEM CONNECTION
R26
6.8K
[email protected]
R27
6.8K
L10
R28
0
[email protected]
R29
47K
C34
1uF
ELEC
+
2
1
AGND
4
3
C35
1uF
ELEC
AGND
+
AGND
PHONE_IN
MONO_OUT
Figure 3. Analog Inputs
9
CRD4202-1
L9
J7
10
+5VA
SURROUND
JACK
C36
SDOUT0
1
2
3
4
SDATA
DEM#/SCLK
LRCK
AOUTR
VA+
AGND
MCLK
AOUTL
5
7
6
1uF
ELEC
R30
+
CS4334
1uF
ELEC
R31
+
U2
C37
8
560
J8
4
3
5
2
1
560
Connect CGND
R32
270K
R33
270K
R34
47K
R35
47K
C38
2700pF
X7R
+5VA
+ C40
10uF
ELEC
C41
0.1uF
Z5U
C39
2700pF
X7R
to AGND at
the jack
C42
0.1uF
Z5U
AGND
AGND
AGND
CGND
AGND
CNT/LFE
JACK
C43
SDOUT1
SCLK
LRCLK
MCLK
1
2
3
4
SDATA
DEM#/SCLK
LRCK
MCLK
AOUTR
VA+
AGND
AOUTL
5
7
6
8
1uF
ELEC
R36
+
CS4334
1uF
ELEC
R37
+
U3
C44
560
J9
4
3
5
2
1
560
Connect CGND
R38
270K
R39
270K
R40
47K
R41
47K
C45
2700pF
X7R
C46
2700pF
X7R
to AGND at
the jack
AGND
AGND
DS549RD1A1
Figure 4. Center Channel, Surround, and Sub-Woofer Outputs
CGND
AGND
CRD4202-1
AGND
DS549RD1A1
LINE OUT
+
1uF
ELEC
+
JACK
C48
1uF
ELEC
LINE_OUT_R
C49
LINE_OUT_L
J10
4
3
5
2
1
Connect CGND
to AGND at
R44
220K
R45
220K
AGND
C50
100pF
NPO
the jack
C51
100pF
NPO
AGND
CGND
+3.3VD
R56
10K
HEADPHONE
GPIO2
+
C54
+
220uF
ELEC
+
HP_OUT_L
C55
1uF
ELEC
HP_OUT_R
C56
HP_OUT_C
JACK
220uF
ELEC
J11
7
6
2
3
1
Connect CGND
R48
10K
C57
100pF
NPO
CGND
Figure 5. Front Channel and Headphone Sense Output
to AGND at
C58
100pF
NPO
the jack
AGND
DGND
11
CRD4202-1
AGND
R49
10K
CRD4202-1
SPDIF_TX
J12
5
4
+5VD
3
R50
DGND
8.2K
2
C59
0.1uF
Z5U
1
6
TOTX-173
DGND
DGND
Figure 6. S/PDIF Optical Output
12
DS549RD1A1
DS549RD1A1
P1
B1
B2
B3
B5
B6
B8
B9
B12
B13
reserved
reserved
GND
GND
LAN_TXD2
LAN_TXD1
LAN_TXD0
B16
B17
LAN_RXD2
LAN_RXD1
LAN_RXD0
reserved
USB+
GND
+5Vdual
USB-
USB_OC#
+12V
GND
B18
GND
-12V
B19
+3.3Vdual
+3.3VD
B20
+5VD
GND
B21
GND
EE_DOUT
B22
EE_DIN
EE_SHCLK
B23
B24
B25
SMB_A1
SMB_A0
SMB_A2
SMB_SDA
CDC_DN_ENAB#
B27
B28
B29
B30
EE_CS
GND
SMB_SCL
B26
GND
LAN_CLK
reserved
B15
ASYNC
ASDOUT
ABITCLK
reserved
GND
B14
PRIM_DN#
GND
GND
B11
DGND
GND
LAN_RSTSYNC
B10
+ C62
10uF
ELEC
reserved
reserved
B7
C61
0.1uF
Z5U
reserved
reserved
reserved
B4
+3.3VD
reserved
AC97_RESET#
GND
AC97_SDATA_IN2
AC97_SYNC
AC97_SDATA_IN1
AC97_SDATA_OUT
AC97_SDATA_IN0
AC97_BITCLK
GND
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
+5VD
A13
A14
+12VD
A15
A16
C63
0.1uF
Z5U
A17
A18
+ C64
10uF
ELEC
A19
A20
+3.3VD
DGND
A21
A22
U5
A23
2
A24
3
A25
5
A26
6
ARST#
A27
A28
ASDIN1
ASDIN0
A29
A30
1
A1
Vcc
8
C60
A2
SDA
SCL
A0
WP
Vss
7
0.1uF
Z5U
4
AT24C02
DGND
CNR Connector
TP1
TP2
TP3
DGND
DGND
+12VD
TP4
TP5
TP6
+5VA
U6
IN
OUT
3
C65
0.1uF
Z5U
+ C66
10uF
ELEC
2
GND
1
MC78M05C
AGND
Connect AGND to DGND with a 50 mil trace near the codec.
Connect CGND to DGND with a 50 mil trace near the finger
edge of the board.
Figure 7. CNR Connector
13
CRD4202-1
DGND
+ C67
10uF
ELEC
CRD4202-1
OPTIONAL PLL (Phase Locked Loop)
ID0#
ID1#
XTAL_OUT
XTAL_IN
Test Clock Only
For PLL operation:
+3.3VD
R52
NO POP
R51
NO POP
Populate R54 = 1K
2)
DO NOT populate: Y1, C14, C15, and R55
3)
Apply external oscillator to XTAL_IN (pin 2)
C69
NO POP
4
1
R53
NO POP
1)
(CRD4202-1 can use test oscillator on Y2: ECS-8FA3)
3
C68
NO POP
4)
Populate R51, R52, R53, C68, and C69 according to
2
your input clock rate:
Y2
NO POP
DGND
DGND
clock rate (MHz)
R51
R52
R53
C68
14.31818
2.2K
NO POP
0 ohm
0.022uF
C69
220pF
24.576
NO POP
NO POP NO POP
NO POP
NO POP
27
2.2K
0 ohm
NO POP
0.022uF
220pF
48
2.2K
0 ohm
0 ohm
0.022uF
220pF
DGND
Figure 8. Phase Locked Loop
14
DS549RD1A1
CRD4202-1
+3.3VD
C70
0.1uF
X7R
R54 = 1K forces
R54
1K
U7
TC7SZ125FU
5
motherboard codec(s)
to be held in RESET
4
ASDIN1
3
1
2
PRIM_DN#
DGND
2
4
ASDIN0
3
ASDIN
C71
0.1uF
X7R
5
U8
TC7SZ126FU
1
+3.3VD
DGND
DO NOT use this circuit for motherboard designs. This circuit is strictly for CNR cards.
For motherboard designs:
connect ASDIN to ASDIN0 if primary codec,
connect ASDIN to ASDIN1 if secondary codec.
Replace R54 with 100K for automatic demotion
when used with primary motherboard codec(s).
Figure 9. Auto Demotion and Serial Buffers
DS549RD1A1
15
CRD4202-1
Figure 10. PCB Layout: Top Assembly Drawing
16
DS549RD1A1
CRD4202-1
Figure 11. PCB Layout: Top Layer
DS549RD1A1
17
CRD4202-1
Figure 12. PCB Layout: Bottom Layer
18
DS549RD1A1
CRD4202-1
Figure 13. PCB Layout: Drill Drawing
DS549RD1A1
19
CRD4202-1
Figure 14. PCB Layout: Top Silkscreen
20
DS549RD1A1
DS549RD1A1
5. BILL OF MATERIALS
Quantity
Reference
Manufacturer
Part Number
Description
1
12
C1,C2,C3,C4,C31,C41,
C42,C59,C60,C61,C63,C65
KEMET
C0805C104M5UAC
CAP, 0805, Z5U, 0.1 µF, 20%, 50V
2
1
C5
KEMET
C1206C225M8VAC
CAP, 1206, Y5V, 2.2 µF, 20%, 10V
3
3
C6,C70,C71
KEMET
C0805C104K5RAC
CAP, 0805, X7R, 0.1 µF, 10%, 50V
4
5
C7,C8,C11,C12,C13
KEMET
C0805C102K5GAC
CAP, 0805, C0G, 1000 pF, 10%, 50V
5
2
C14,C15
KEMET
C0805C220K5GAC
CAP, 0805, C0G, 22 pF, 10%, 50V
6
19
C16,C17,C18,C21,C22,
C23,C24,C25,C30,C33,
C34,C35,C36,C37,C43,
C44,C48,C49,C56
PANASONIC
ECE-V1HA010R
CAP, SMT B, ELEC, 1 µF, 20%, 50V
7
4
C19,C20,C26,C27
KEMET
C0805C101J5GAC
CAP, 0805, COG, 100 pF, 5%, 50V
8
6
C28,C40,C62,C64,C66,C67
PANASONIC
ECE-V1CA100R
CAP, SMT B, ELEC, 10 µF, 20%, 16V
9
5
C32,C38,C39,C45,C46
KEMET
C0805C272K5RAC
CAP, 0805, X7R, 2700 pF, 10%, 50V
10
4
C50,C51,C57,C58
KEMET
C0805C101J5GAC
CAP, 0805, C0G, 100 pF, 5%, 50V
11
2
C54,C55
PANASONIC
ECE-V0GA221P
CAP, SMT D, ELEC, 220 µF, 20%, 4V
12
2
C68,C69
NO POP
NO POP
NO POP
13
5
J1,J3,J8,J9,J10
A/D ELECTRONICS
3570-50
CONN, 1/8" DOUBLE SW. STEREO PHONE
JACK
14
4
J2,J4,J5,J7
MOLEX
70553-0003
HDR, 4X1, 0.025" PIN, 0.1" CTR, 15u" AU
15
1
J6
MOLEX
70553-0036
HDR, 2X1, 0.025" PIN, 0.1" CTR, 150u" SN/PB
16
1
J11
SINGATRON
2SJ-09075N53
CONN, 1/8" SINGLE SW. STEREO PHONE
JACK W/INSULATOR
17
1
J12
TOSHIBA
TOTX173
CONN, OPTICAL TOSLINK TRANSMITTER
21
CRD4202-1
Item
22
10
L1,L2,L3,L4,L5,L6,L7,L8,
L9,L10
TDK
HF50ACB321611-T
IND, FBEAD, 1206, [email protected], 25%
19
1
P1
NONE
NONE
CNR BUS CONNECTOR
20
2
R2,R1
PHILIPS
9C08052A47R0J
RES, SO, 0805, 47, 5%, 1/10W, METAL FILM
21
14
R4,R6,R8,R10,R13,R16,
R18,R19,R20,R22,R24,
R25,R26,R27
PHILIPS
9C08052A6801F
RES, SO, 0805, 6.8K, 1%, 1/10W, METAL FILM
22
3
R5,R9,R12
PHILIPS
9C08052A1003J
RES, SO, 0805, 100K, 5%, 1/10W, METAL FILM
23
1
R14
PHILIPS
9C08052A2201J
RES, SO, 0805, 2.2K, 5%, 1/10W, METAL FILM
24
1
R15
PHILIPS
9C08052A1501J
RES, SO, 0805, 1.5K, 5%, 1/10W, METAL FILM
25
6
R21,R29,R34,R35,R40,R41
PHILIPS
9C08052A4702J
RES, SO, 0805, 47K, 5%, 1/10W, METAL FILM
26
1
R23
PHILIPS
9C08052A4701J
RES, SO, 0805, 4.7K, 5%, 1/10W, METAL FILM
27
2
R28,R55
PHILIPS
9C08052A0R00J
RES, SO, 0805, 0, 5%, 1/10W, METAL FILM
28
4
R30,R31,R36,R37
PHILIPS
9C08052A5600J
RES, SO, 0805, 560, 5%, 1/10W, METAL FILM
29
4
R32,R33,R38,R39
PHILIPS
9C08052A2703J
RES, SO, 0805, 270K, 5%, 1/10W, METAL FILM
30
2
R45,R44
PHILIPS
9C08052A2203J
RES, SO, 0805, 220K, 5%, 1/10W, METAL FILM
31
3
R48,R49,R56
PHILIPS
9C08052A1002J
RES, SO, 0805, 10K, 5%, 1/10W, METAL FILM
32
1
R50
PHILIPS
9C08052A8201J
RES, SO, 0805, 8.2K, 5%, 1/10W, METAL FILM
33
3
R51,R52,R53
NO POP
NO POP
NO POP
34
1
R54
PHILIPS
9C08052A1001J
RES, SO, 0805, 1K, 5%, 1/10W, METAL FILM
35
6
TP1,TP2,TP3,TP4,TP5,TP6
KEYSTONE
5015
mini SMT test point
36
1
U1
Cirrus Logic
CS4202-JQ
IC, TQFP, AC '97 2.2 SERIAL CODEC W/ HP
AMP + SRC
37
2
U2,U3
Cirrus Logic
CS4334-KS
IC, SO, SOIC8, STEREO DAC, 24 BITS
CRD4202-1
DS549RD1A1
18
DS549RD1A1
38
1
U5
ATMEL
AT24C02N-10SC2.7
IC, SO, SOIC8, SERIAL EEPROM, 256 x 8, 2.7V
39
1
U6
MOTOROLA
MC78M05CDT
IC, SO, +5V REGULATOR, DPAK, 4%, 500mA
40
1
U7
TOSHIBA
TC7SZ125FU
IC, SSOP5-P-0.65A, single 3 state buffer, 2.6ns
41
1
U8
TOSHIBA
TC7SZ126FU
IC, SSOP5-P-0.65A, single 3 state buffer, 2.6ns
42
1
Y1
FOX
FS24.576
XTAL, 24.576MHz, HC49S, Fund Mode, Par Res
43
1
Y2
NO POP
NO POP
NO POP
CRD4202-1
23