CMEDIA CM106-F+

Best USB Audio I/O Controller for
External High End 8CH Audio Devices
CM106-F+/L+ High Integrated
USB Audio I/O Controller
(Dolby Digital Live and DTS Connect Software Technology Bundle)
DataSheet 1.0
C-MEDIA ELECTRONICS INC.
TEL: 886-2-8773-1100
FAX: 886-2-8773-2211
6F, 100, Sec. 4, Civil Boulevard, Taipei, Taiwan 106, R.O.C.
For detailed product information, please contact sales@cmedia.com.tw
CM106-F+/L+
High End 8CH DAC and 2CH ADC Integrated Solution
NOTICES
THIS DOCUMENT IS PROVIDED “AS IS” WITH NO WARRANTIES WHAT SO EVER,
INCLUDING ANY WARRANTY OF MERCHANT ABILITY, NONINFRINGEMENT, FITNESS FOR
ANY PARTICULAR PURPOSE, OR ANY WARRANTY OTHERWISE ARISING OUT OF ANY
PROPOSAL, DOCUMENT OR SAMPLE.
ALL RIGHTS RESERVED. NO PART OF THIS DOCUMENT MAY BE REPRODUCED OR
TRANSMITTED IN ANY FORM OR BY ANY MEANS, ELECTRONIC OR MECHANICAL,
INCLUDING INFORMATION STORAGE AND RETRIEVAL SYSTEMS, WITHOUT
PERMISSION IN WRITING FROM C-MEDIA ELECTRONICS, INC.
COPYRIGHT
Copyright (c) 2005-2007 C-Media Electronics Inc.
All rights reserved. All content included on this document, such as text, graphics, logos, button
icons, images, audio clips, digital downloads, data compilations, and software, is either the
exclusive property of C-Media Electronics Inc., its affiliates (collectively, "C-Media"), its content
suppliers, or its licensors and protected by Republic of China and international copyright laws.
TRADEMARKS
C-Media, the C-Media Logo, Xear 3D, Xear 3D Logo and Speaker Shifter are trademarks of
C-Media Electronics Inc. in Republic of China and/or other countries. Dolby Digital and dts are
trademarks of Dolby Laboratories, Inc. and DTS Corporate. and All other brand, logos and
product names listed are trademarks or registered trademarks of their respective holders and are
hereby recognized as such.
*C-Media reserves the right to modify the specifications without further notice*
Date: 08/19/2005
Version: 1.01
-2-
CM106-F+/L+
High End 8CH DAC and 2CH ADC Integrated Solution
Table of Contents
1. DESCRIPTIONS AND OVERVIEW
5
2. FEATURES
6
3. PIN DESCRIPTIONS
8
3.1 CM106-F+ QFP 100 PIN TABLE
8
3.2 CM106-L+ LQFP 48 PIN TABLE
8
3.3 CM106-F+ QFP 100 PIN DESCRIPTION
10
3.4 CM106-L+ LQFP 48 PIN DESCRIPTION
13
4. ORDERING INFORMATION
16
4.1 CM106-L+ (LQFP 48 PIN) PACKAGE
16
4.2 CM106-F+ (QFP 100 PIN) PACKAGE
17
5. FUNCTION BLOCK DIAGRAM OF CM106-F+/L
18
6. FUNCTION DESCRIPTIONS
19
6.1 INTERNAL REGISTER
19
6.2 MCU INTERFACE
22
6.3 SERIAL EEPROM CONTENT
24
6.4 DAC
25
6.5 ADC
25
6.6 POWER MANAGEMENT
25
Date: 08/19/2005
Version: 1.01
-3-
CM106-F+/L+
High End 8CH DAC and 2CH ADC Integrated Solution
7. SOFTWARE TECHNOLOGY
26
7.1 Xear 3DTM SOUND
26
7.2 DOLBY® DIGITAL LIVE
27
7.3 DTS® CONNECT
28
8. VOLUME CONTROL
30
8.1 DAC VOLUME CONTROL
30
8.2 ADC VOLUME CONTROL
30
8.3 MIC / LINE-IN MONITOR VOLUME CONTROL
31
9. ELECTRICAL CHARACTERISTICS
32
9.1 ABSOLUTE MAXIMUM RATING
32
9.2 RECOMMENDED OPERATION CONDITIONS
32
9.3 AUDIO PERFORMANCE
33
10. AUDIO PERFORMANCE CURVES
35
10.1 AA PATH (LINE IN TO LINE OUT) FREQUENCY RESPONSE
35
10.2 AA PATH (LINE IN TO LINE OUT) CROSS TALK
35
10.3 DAC (FRONT) FREQUENCY RESPONSE @ 48KS/SEC
36
10.4 DAC (FRONT) FREQUENCY RESPONSE @ 44.1KS/SEC
36
10.5 DAC (FRONT) PASS BAND RIPPLE @ 48KS/SEC
37
10.6 DAC (FRONT) PASS BAND RIPPLE @ 44.1KS/SEC
37
10.7 ADC (LINE IN) FREQUENCY RESPONSE @ 48KS/SEC
38
10.8 ADC (MIC IN) FREQUENCY RESPONSE @ 48KS/SEC
38
11. APPLICATION CIRCUIT
39
11.1 CM106-L+ (LQFP 48) / CM106-F+ (QFP 100)
Date: 08/19/2005
39
Version: 1.01
-4-
CM106-F+/L+
High End 8CH DAC and 2CH ADC Integrated Solution
1. DESCRIPTIONS AND OVERVIEW
CM106-F+/ L+ is a highly integrated single chip USB audio solution. All essential analog
modules are embedded in CM106F+/L+, including 8CH DAC and earphone buffer, 2CH ADC,
microphone booster, PLL, regulator, and USB transceiver. This chip design can provided more
efficiency features and high quality sound for high end USB audio products application. It is
very suitable for USB external audio box, USB multi-channel headphone, USB Ducking System,
USB Portable Home Theater Adoptoror and USB audio interface multi-channel speaker set
application.
CM106F+/L+ is design for all kind of PC base USB multi-media audio device products. It is
USB 2.0 full speed compatible and utilizes USB bus power for plug-and-play feature. Via
C-Media Xear 3D Sound USB audio driver, users can avail themselves of a much better virtual
7.1 CH environment capable. Moreover, Xear 3D sound also supported unique enviromentFX,
10 band equalizer sound effects and Karaoke function. For high-end consumer application, this
multi-media audio device can easy to processing any sound source to Dolby Digital AC-3 and
DTS interactive raw data by real-time encoding function. The world first innovation software
function to grade up every PC system and output high quality digital sound effects for link up
with high-end home theater equipments like amplifier, DVD player or decoder etc.
These special features are Dolby Digital Live and DTS Connect function modules. As we know,
Dolby Digital and DTS (Digital Theater System) are the world well-known sound technology
brands and generality using on consumer electronics. Therefore, if PC products need to be
home theater equipment or media center this would be key feature and selling point for product
development. These functions not only provide easy bridge to connect PCs and consumer
electronics but also adding value and upgrade sound quality to PC products. In the future, PCs
can put on Dolby Digital and DTS logo on it and provide advanced sound quality to end-user.
All of modules were implemented by C-Media in software technology and anyone can request
these features by license from Dolby Lab. and DTS Corporate. through C-Media.
Furthemore, Many features are programmable with external EEPROM and MCU interface. In
addition, Venders can using MCU/EEPROM/GPIO control interface easily via HID software to
develop remote control or keypad button functions. Better yet, CM106-F+/L support stereo MIC,
phone jack sense, S/PDIF I/O and 48/44.1 Khz sampling rate.
Date: 08/19/2005
Version: 1.01
-5-
CM106-F+/L+
High End 8CH DAC and 2CH ADC Integrated Solution
2. FEATURES
USB spec. 2.0 full speed compliant and USB IF certification
USB audio device class spec. 1.0 and USB HID class spec. 1.1 compliant
IEC60958 spec. Compliant (consumer format S/PDIF input and output with loop-back
support)
SCMS (Serial Copy Management System) compliant
Dolby® Digital and DTS audio streaming via S/PDIF out
USB remote wake-up support
8 channel DAC output with
16 bit resolution
3.1 Vpp (1.1 Vrms) biased at 2.25V output swing
Volume control and mute function
Earphone buffer
2X interpolator for digital playback data to improve quality
2 channel ADC input with
16 bit resolution
3.2 Vpp (or 4.0 Vpp programmed by vendor driver) biased at 2.25V input swing
Volume control and mute function
Date: 08/19/2005
Version: 1.01
-6-
CM106-F+/L+
High End 8CH DAC and 2CH ADC Integrated Solution
Additional headphone output with selectable source and phone jack sense
Stereo MIC support with boost capability
Recording source select from S/PDIF, MIC, Line-in and summation of MIC, Line-in
and front channel
MIC, Line-in monitor from front channel (all channels optional) with volume control
and mute function
Master volume control by default; per-channel volume control by C-Media driver
Playback with soft-mute function
Support 48 / 44.1 KHz sampling rate for both playback and recording
MCU support with two-wire serial interface
Serial EEPROM support for customized VID/PID
MCU / EEPROM / GPIO control via HID software interface
Volume up / volume down / playback mute HID button
LED indicator pins: operation / recording mute / SCMS protection
Embedded USB transceiver and power on reset circuit
Single 12MHz crystal input with embedded PLL
Single 5V power supply with embedded 5V to 3.3V regulator
Industry standard LQFP-48 (CM106-L+) or QFP-100 (CM106-F+) package
C-Media value added patent software driver
Xear 3D sound
Earphone Plus
SPEAKER SHIFTER
Environment sound effects
Room Size Mode
Graphic Equalizer
Karaoke Function
Software Driver support Dolby Digital Live for multi-media content real-time encoder
with Dolby Digital AC-3 Raw data bit stream
Software Driver support DTS Connect with DST Interactive and DTS NEO:PC sound
technology
DST Interactive>multi-media content real-time encoder with DTS Raw data bit
stream
NEO:PC>audio up-mix matrix technology that turns any 2 channel audio into 7.1
surrounds sound.
Date: 08/19/2005
Version: 1.01
-7-
CM106-F+/L+
High End 8CH DAC and 2CH ADC Integrated Solution
3. PIN DESCRIPTIONS
3.1 CM106-F+ QFP 100PIN TABLE
PIN # Signal Name
1~7
NC
8
DVSS5
9
PHONES
10
CS
11
SK
12
DR
13
DW
14
MSEL1
15
MSEL2
16
DVSS2
17
USBDP
18
USBDM
19
REGV
20
DVDD1
21
AVSS3
22
MICINL
23
MICINR
24~30
NC
PIN #
31~34
35
36
37
38
39
40
41
42
43
44
45
46
47~50
51~57
58
59
60
Signal Name PIN # Signal Name PIN #
NC
61
LOCF
85
LIL
62
LOLFE
86
LIR
63
AVSS2
87
AVDD1
64
DVSS6
88
VREF
65
VOLUP
89
VBIAS
66
VOLDN
90
AVSS1
67
SPDIFI
91
HPOUTL
68
MUTER
92
HPOUTR
69
MUTEP
93
LOSL
70
SPDIFO
94
LOSR
71
GPIO2
95
LOFL
72
GPIO3
96
LOFR
73
GPIO4
97
NC
74
DVSS7
98
NC
75~80
NC
99
AVDD2
81~82
NC
100
LOLS
83
PDSW
LORS
84
XI
Signal Name
XO
DVSS1
PWRSEL
PWRSEL1
DVSS3
SDAT
SCLK
TEST
MCLK
DVSS4
MINT
GPIO1
LEDO
LEDR
LEDS
NC
3.2 CM106-L+ LQFP 48PIN TABLE
PIN #
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Signal Name
PDSW
XI
XO
DVSS1
SDAT
SCLK
TEST
MCLK
MINT
GPIO1
LEDO
LEDR
PHONES
CS
SK
DR
PIN #
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
Signal Name
DW
USBDP
USBDM
REGV
DVDD1
AVSS3
MICINL
MICINR
LIL
LIR
AVDD1
VREF
VBIAS
AVSS1
HPOUTL
HPOUTR
Date: 08/19/2005
PIN #
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
Signal Name
LOSL
LOSR
LOFL
LOFR
AVDD2
LOLS
LORS
LOCF
LOLFE
AVSS2
VOLUP
VOLDN
SPDIFI
MUTER
MUTEP
SPDIFO
Version: 1.01
-8-
CM106-F+/L+
High End 8CH DAC and 2CH ADC Integrated Solution
Figure 1. CM106-F+ QFP 100 Pin Assignments (Top View)
Figure 2. CM106-L+ LQFP 48 Pin Assignments (Top View)
Date: 08/19/2005
Version: 1.01
-9-
CM106-F+/L+
High End 8CH DAC and 2CH ADC Integrated Solution
3.3 CM106-F+ QFP 100 PIN DESCRIPTION
Pin #
Symbol
Type
Description
1~7
NC
--
--
8
DVSS5
P
9
PHONES
DI
10
CS
DO
EEPROM interface chip select
11
SK
DO
EEPROM interface clock
12
DR
DO
EEPROM interface data read
13
DW
DI
EEPROM interface data write
14
MSEL1
DI
15
MSEL2
DI
16
DVSS2
P
Digital ground
17
USBDP
AIO
USB data D+
18
USBDM
AIO
USB data D-
19
REGV
AO
3.3V reference output for internal 5
20
DVDD1
P
5V power supply to internal regulator
21
AVSS3
P
Analog ground
22
MICINL
AI
Microphone input left channel
23
MICINR
AI
Microphone input right channel
24~30
NC
--
--
31~34
NC
--
--
35
LIL
AI
Line-In input left channel
36
LIR
AI
Line-In input right channel
37
AVDD1
P
5V analog power for analog circuit
38
VREF
AO
Digital ground
Phone jack sense pin for line out Tri-state; an internal register bit will be
set when activated (active H)
0: MICINL/R and LIL/R mix to 8 channels
1: MICINL/R and LIL/R mix to LOFL and LOFR
0: playback only
1: playback and recording
3.3V regulator
Connecting to external decoupling capacitor for embedded band-gap
circuit; 2.25V output
Date: 08/19/2005
Version: 1.01
- 10 -
CM106-F+/L+
High End 8CH DAC and 2CH ADC Integrated Solution
Pin #
Symbol
Type
Description
39
VBIAS
AO
40
AVSS1
P
41
HPOUTL
AO
Headphone out left channel
42
HPOUTR
AO
Headphone out right channel
43
LOSL
AO
Line out side (back) left channel
44
LOSR
AO
Line out side (back) right channel
45
LOFL
AO
Line out front left channel
46
LOFR
AO
Line out front right channel
47~50
NC
--
--
51~57
NC
--
--
58
AVDD2
P
59
LOLS
AO
Line out surround (rear) left channel
60
LORS
AO
Line out surround (rear) right channel
61
LOCF
AO
Line out center channel
62
LOLFE
AO
Line out LFE (subwoofer) channel
63
AVSS2
P
Analog ground
64
DVSS6
P
Digital ground
65
VOLUP
DI
Volume up (edge trigger with de-bouncing)
66
VOLDN
DI
Volume down (edge trigger with de-bouncing)
67
SPDIFI
DI
S/PDIF input
68
MUTER
DI
Mute recording (edge trigger with de-bouncing)
69
MUTEP
DI
Mute playback (edge trigger with de-bouncing)
70
SPDIFO
DO
S/PDIF output
71
GPIO2
DIO
GPIO pin #2
72
GPIO3
DIO
GPIO pin #3
73
GPIO4
DIO
GPIO pin #4
74
DVSS7
P
Microphone bias voltage supply (4.5V/2.25V)
Analog ground
5V analog power for analog circuit
Digital ground
Date: 08/19/2005
Version: 1.01
- 11 -
CM106-F+/L+
High End 8CH DAC and 2CH ADC Integrated Solution
Pin #
Symbol
Type
Description
75~80
NC
--
--
81~82
NC
--
-Power down switch control (for PMOS polarity)
83
PDSW
DO
0: normal mode
1: power down mode
84
XI
DI
12MHz crystal, or oscillator input
85
XO
DO
12MHz crystal output
86
DVSS1
P
87
PWRSEL
DI
88
PWRSEL1
DI
89
DVSS3
P
90
SDAT
DIO
External MCU serial bus data pin
91
SCLK
DI
External MCU serial bus clock pin
92
TEST
DI
Test mode select pin; pull low in normal operation
Digital ground
0: self power
1: bus power
0: 100mA operation current
1: 500mA operation current
Digital ground
External MCU clock pin; clock frequency is programmable (12MHz,
93
MCLK
DO
6MHz, 3MHz, 1.5MHz)
Default is 1.5 MHz
94
DVSS4
DO
Digital ground
External MCU interrupt pin (active L)
95
MINT
DO
When internal register address 0 ~ 3 or external serial EEPROM is
accessed,
MINT is set low; after MCU read, MINT is reset to H
96
GPIO1
DIO
GPIO pin #1
97
LEDO
DO
LED for operation; output H for power on; toggling for data transmit
98
LEDR
DO
LED for mute recording indication; output H when recording is muted
99
LEDS
DO
100
NC
--
LED for SCMS indication; output H when S/PDIF input is not
authorized to record
--
Date: 08/19/2005
Version: 1.01
- 12 -
CM106-F+/L+
High End 8CH DAC and 2CH ADC Integrated Solution
3.4 CM106-L+ LQFP 48 PIN DESCRIPTION
Pin #
Symbol
Type
Description
Power down switch control (for PMOS polarity)
1
PDSW
DO
0: normal mode
1: power down mode
2
XI
DI
12MHz crystal, or oscillator input
3
XO
DO
12MHz crystal output
4
DVSS1
P
5
SDAT
DIO
External MCU serial bus data pin
6
SCLK
DI
External MCU serial bus clock pin
7
TEST
DI
Test mode select pin; pull low in normal operation
Digital ground
External MCU clock pin; clock frequency is programmable
8
MCLK
DO
(12MHz, 6MHz, 3MHz, 1.5MHz)
Default is 1.5 MHz
External MCU interrupt pin (active L)
9
MINT
DO
When internal register address 0 ~ 3 or external serial EEPROM is
accessed,
MINT is set low; after MCU read, MINT is reset to H
10
GPIO1
DIO
GPIO pin #1
11
LEDO
DO
LED for operation; output H for power on; toggling for data transmit
12
LEDR
DO
LED for mute recording indication; output H when recording is muted
13
PHONES
DI
14
CS
DO
EEPROM interface chip select
15
SK
DO
EEPROM interface clock
16
DR
DO
EEPROM interface data read
17
DW
DI
EEPROM interface data write
18
USBDP
AIO
USB data D+
19
USBDM
AIO
USB data D-
20
REGV
AO
3.3V reference output for internal 5
21
DVDD1
P
5V power supply to internal regulator
22
AVSS3
P
Analog ground
23
MICINL
AI
Microphone input left channel
Phone jack sense pin for line out Tri-state; an internal register bit will be
set when activated (active H)
Date: 08/19/2005
3.3V regulator
Version: 1.01
- 13 -
CM106-F+/L+
High End 8CH DAC and 2CH ADC Integrated Solution
Pin #
Symbol
Type
Description
24
MICINR
AI
Microphone input right channel
25
LIL
AI
Line-In input left channel
26
LIR
AI
Line-In input right channel
27
AVDD1
P
5V analog power for analog circuit
28
VREF
AO
29
VBIAS
AO
30
AVSS1
P
31
HPOUTL
AO
Headphone out left channel
32
HPOUTR
AO
Headphone out right channel
33
LOSL
AO
Line out side (back) left channel
34
LOSR
AO
Line out side (back) right channel
35
LOFL
AO
Line out front left channel
36
LOFR
AO
Line out front right channel
37
AVDD2
P
38
LOLS
AO
Line out surround (rear) left channel
39
LORS
AO
Line out surround (rear) right channel
40
LOCF
AO
Line out center channel
41
LOLFE
AO
Line out LFE (subwoofer) channel
42
AVSS2
P
Analog ground
43
VOLUP
DI
Volume up (edge trigger with de-bouncing)
44
VOLDN
DI
Volume down (edge trigger with de-bouncing)
45
SPDIFI
DI
S/PDIF input
46
MUTER
DI
Mute recording (edge trigger with de-bouncing)
47
MUTEP
DI
Mute playback (edge trigger with de-bouncing)
48
SPDIFO
DO
S/PDIF output
Connecting to external decoupling capacitor for embedded band-gap
circuit; 2.25V output
Microphone bias voltage supply (4.5V/2.25V)
Analog ground
5V analog power for analog circuit
Date: 08/19/2005
Version: 1.01
- 14 -
CM106-F+/L+
High End 8CH DAC and 2CH ADC Integrated Solution
*Note 1: DI – digital input pad
DO – digital output pad
DIO – digital bi-directional pad
AI/AO/AIO – analog pad
P – power pad
*Note 2: For LQFP 48 package, PWRSEL, PWRSEL1, MSEL1 and MSEL2 are internal bonding
options; They are not bonded by default.
Date: 08/19/2005
Version: 1.01
- 15 -
CM106-F+/L+
High End 8CH DAC and 2CH ADC Integrated Solution
4. ORDERING INFORMATION
4.1 CM106-L+ (LQFP48) PACKAGE
Date: 08/19/2005
Version: 1.01
- 16 -
CM106-F+/L+
High End 8CH DAC and 2CH ADC Integrated Solution
4.2 CM106-F+ (QFP100) PACKAGE
Date: 08/19/2005
Version: 1.01
- 17 -
CM106-F+/L+
High End 8CH DAC and 2CH ADC Integrated Solution
5. FUNCTION BLOCK DIAGRAM OF CM106-F+/L+
Figure 3:Function Block Diagram Of CM106-F+/L+
Signal Set
EEPROM
VOL I/F
LED I/F
MCU I/F
SEL
GPIO
Power
Signals
CS, SK, DR, DW
VOLUP, VOLDN, MUTER, MUTEP
LEDO, LEDR, LEDS
SCLK, SDAT, MCLK, MINT
PWRSEL, PWRSEL1, MSEL1, MSEL2
GPIO1, GPIO2, GPIO3, GPIO4
AVDD1, AVDD2, AVSS1, AVSS2, DVDD1, DVSS1, DVSS2
Date: 08/19/2005
Version: 1.01
- 18 -
CM106-F+/L+
High End 8CH DAC and 2CH ADC Integrated Solution
6. FUNCTION DESCRIPTION
6.1 INTERNAL REGISTER
The internal registers of CM106F+/L+ can be divided to two parts. Some of them (REG0, REG1,
REG2 and REG3) are 16-bit width and can be accessed via HID interface. The others are 8-bit
width and can be accessed by vendor requests. To access registers via HID interface, users
should issue a “Set Output Report” HID request. The four bytes of output report data is organized
as below:
Byte [0]
Read: 8’d48
Write: 8’d32
Byte [1]
DATAL
Byte [2]
DATAH
Byte [3]
Register address (0, 1, 2, 3)
In addition to internal registers, users can also access external serial EEPROM by the same
way:
Byte [0]
Read: 8’d80
Write: 8’d64
Byte [1]
DATAL
Byte [2]
DATAH
Byte [3]
EEPROM address (0 ~ 8’d63)
When users intend to read register / EEPROM by “Set Output Report”, the returned data will be
transferred to USB host via HID input report through interrupt pipe. The three bytes of input
report data is organized as below:
Byte [0]
MCUIN
EEIN
REGIN
HEADPON
MUTE
VDN
VUP
DATAL from MCU when MCUIN = 1
Byte [1]
DATAL from EEPROM when EEIN = 1
DATAL from Register when REGIN = 1
DATAH from MCU when MCUIN = 1
Byte [2]
DATAH from EEPROM when EEIN = 1
DATAH from Register when REGIN = 1
Date: 08/19/2005
Version: 1.01
- 19 -
CM106-F+/L+
High End 8CH DAC and 2CH ADC Integrated Solution
Users can distinguish the source of input report by Byte[0], Byte[1] and Byte[2] consist a word
which may be the content of addressed register or serial EEPROM. It may also be an arbitrary
word programmed by external MCU. In addition, Byte[0] carries the information of HID button
status (MUTE, VDN and VUP), and phone jack sense (HEADPON). VDN/VUP would be 1 when
VOLDN/VOLUP button is pressed, and keeps pressed (VOLDN/VOLUP keeps 0). MUTE would
be 1 when MUTEP button is pressed, and would be cleared to 0 after USB host reads the input
report. HEADPON would be 1 when headphone is plugged in (PHONES is 1).
Refer to the following tables for the definition of internal registers can be accessed via HID
interface:
Address: 0x00
Reset State: 0x0000
REG0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
CSR
Bit
Number
12-0
Bit
Mnemonic
CSR
Read/
Write
R/W
Function
SPDIF out control
Address: 0x01
Reset State: 0xb000
REG1
15
14
DACX2en
FS
7
6
GPIO2_
OEN
GPIO2_o
Bit
Number
15
14
13
12
11
10
9
8
7
13
PLLBINe
n
12
SOFTMU
TEen
5
4
GPIO1_
OEN
GPIO1_o
Bit
Mnemonic
DACX2en
FS
PLLBINen
SOFTMUTEen
GPIO4_o
GPIO4_OEN
GPIO3_o
GPIO3_OEN
GPIO2_o
Read/
Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
11
GPIO4_o
3
LOWFIR
SET
10
GPIO4_
OEN
2
SPDIFLO
OP
9
GPIO3_o
1
DIS_SPD
IFO
8
GPIO3_
OEN
0
SPDIFMI
X
Function
DAC X 2 enable
ADC full scale setting
PLL binary search enable
Soft mute enable
Gpio4 signal
Gpio4 output enable
Gpio3 signal
Gpio3 output enable
Gpio2 signal
Date: 08/19/2005
Version: 1.01
- 20 -
CM106-F+/L+
High End 8CH DAC and 2CH ADC Integrated Solution
Bit
Number
6
5
4
3
2
1
0
Bit
Mnemonic
GPIO2_OEN
GPIO1_o
GPIO1_OEN
LOWFIRSET
SPDIFLOOP
DIS_SPDIFO
SPDIFMIX
Read/
Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Function
Gpio2 output enable
Gpio1 signal
Gpio1 output enable
Low pass filter setting
SPDIF loop-back enable
SPDIF out disable
SPDIF in mix enable
Address: 0x02
Reset State: 0x0004
REG2
15
DRIVERON
7
14
13
HEADPSEL
6
5
PLAYMUTE
Bit
Number
15
Bit
Mnemonic
DRIVERON
Read/
Write
R/W
14~13
HEADPSEL
R/W
12~3
PLAYMUTE
R/W
MICRSEL
R/W
MCUCLKSE
L
R/W
2
1~0
12
11
10
PLAYMUTE
9
8
4
3
2
MICRSEL
1
0
MCUCLKSEL
Function
If (HEADPON = 1 and DRIVERON = 0)
1. All channels muted except Headphone channels
2. Select Headphone source from Front channels
Else
1. Channel mute controlled by PLAYMUTE registers
2. Headphone source selected by HEADPSEL
registers
Headphone source select
00: Front channels
01: Center and Subwoofer
02: Surround channels
03: Side channels
Channel mute control (high active)
PLAYMUTE[0]: mute Left Front
PLAYMUTE[1]: mute Right Front
PLAYMUTE[2]: mute Center
PLAYMUTE[3]: mute Subwoofer
PLAYMUTE[4]: mute Left Surround
PLAYMUTE[5]: mute Right Surround
PLAYMUTE[6]: mute Side Left
PLAYMUTE[7]: mute Side Right
PLAYMUTE[8]: mute Headphone Left
PLAYMUTE[9]: mute Headphone Right
MIC right channel source select
0: left channel (mono)
1: right channel (stereo)
MCU clock frequency
00: 1.5Mhz
01: 3Mhz
10: 6Mhz
11: 12Mhz
Date: 08/19/2005
Version: 1.01
- 21 -
CM106-F+/L+
High End 8CH DAC and 2CH ADC Integrated Solution
Address: 0x03
Reset State: 0x003f / 0x007f
REG3
15
14
13
12
11
10
VRAP
25EN
9
MSEL1
8
SPDFI_
FREQ[1]
7
SPDFI
_FREQ[0]
6
PINSEL
5
FOE
4
ROE
3
CBOE
2
LOSE
1
HPOE
0
CANREC
Bit
Number
10
Bit
Mnemonic
VRAP25EN
Read/
Write
R/W
9
MSEL1
R/W
8~7
SPDFI_FREQ
R
6
PINSEL
R
5
FOE
R/W
4
ROE
R/W
3
CBOE
R/W
2
LOSE
R/W
1
HPOE
R/W
0
CANREC
R
Function
Microphone bias voltage supply select
0: 4.5V
1: 2.25V
0: MICINL/R and LIL/R mix to LOFL and LOFR
1: MICINL/R and LIL/R mix to 8 channels
SPDIF in sample rate
00: 44.1K
01: reserved
10: 48K
11: 32K
0: 100 pin package
1: 48 pin package
1: LOFL/LOFR enable
0: LOFL/LOFR disable (Hi Z)
1: LOLS/LORS enable
0: LOLS/LORS disable (Hi Z)
1: LOCF/LOLFE enable
0: LOCF/LOLFE disable (Hi Z)
1: LOSL/LOSR enable
0: LOSL/LOSR disable (Hi Z)
1: HPOUTL/HPOUTR enable
0: HPOUTL/HPOUTR disable (Hi Z)
SPDIF in recording status
0: SPDIF in can not be recorded
1: SPDIF in can be recorded
6.2 MCU INTERFACE
CM106F+/L+ can communicate with external MCU via two-wire serial interface and act as a
slave device. By this way, MCU can read four bytes from and write two bytes to USB host
through CM106.When MCU writes two bytes to CM106F+/L+, the data will be transferred to USB
host via HID ‘Input Report’. USB host will keep polling HID report every 32ms.
CM106F+/L+ can also transfer four bytes from USB host to MCU. This is accomplished by a ‘Set
Output Report’ HID request issued by USB host. CM106F+/L+ will then assert MINT to inform
Date: 08/19/2005
Version: 1.01
- 22 -
CM106-F+/L+
High End 8CH DAC and 2CH ADC Integrated Solution
MCU to read them.
CM106F+/L+ has one input pin ‘SCLK’ to get serial clock from MCU, and one open-drain output
pin ‘SDAT’ to send or receive serial signal to/from MCU. As shown below, ‘SDAT’ should be
stable when ‘SCLK’ is high, and can have transition only when ‘SCLK’ is low.
START and STOP conditions shown below are the exception. Every transaction begins from a
START, and ends with a STOP, or another START (repeated START).
The figure below demonstrates a transaction example. After every 8 bits sent by the transmitter,
the receiver should send one bit low for positive acknowledgement or one bit high for negative
acknowledgement. After the negative acknowledgement, a STOP or repeated START should
follow.
Date: 08/19/2005
Version: 1.01
- 23 -
CM106-F+/L+
High End 8CH DAC and 2CH ADC Integrated Solution
The figure below shows typical transactions between MCU and CM106. After a START, MCU
should send 7-bit slave address (7’b0111000) first, and then the 8th bit denotes a read transfer
when it’s high; or a write transfer when it’s low.
MCU write:
S
8’h70
MCU read:
S
8’h70
S
8’h71
0
8’h01
0
Byte[1]
0
Byte[2]
1
0
0
8’h00
Byte[0]
1
0
Byte[1]
0
Byte[2]
0
: From CM106 to MCU
Byte[3]
1
P
: From MCU to CM106
S
: START condition
P
: STOP condition
0
: Positive acknowledge
1
: Negative acknowledge
Byte
P
: One byte data
In a write transfer, MCU keeps acting as the transmitter. CM106F+/L+ regards the first DATA byte
as start register address. The second and third DATA bytes are the content that MCU writes to
the register addresses.
In a read transfer, two transactions are necessary. MCU resets start register address by the first
transaction. Then MCU changes to be the receiver during the second transaction to get four
bytes of data.
6.3 SERIAL EEPROM CONTENT
CM106F+/L+ supports four-wire serial EEPROM interface. When an external serial EEPROM is
detected, Vendor ID and Product ID reported within Device Descriptor will be derived from the
content of serial EEPROM. The organization of serial EEPROM is shown below:
Address = 0
Address = 1
Address = 2
16’h630X
Vendor ID
Product ID
Address = 63
16’hXXXX
Users can program serial EEPROM via HID interface, as described in the former section.
Although 64 words can be accessed by CM106F+/L+, only the first three words are significant to
CM106F+/L+. The first word is a magic code. Only when it matches, CM106F+/L+ will regard the
serial EEPROM valid.
Date: 08/19/2005
Version: 1.01
- 24 -
CM106-F+/L+
High End 8CH DAC and 2CH ADC Integrated Solution
6.4 DAC
CM106F+/L+ contains eight 16-bit DACs. The DACs are implemented in two-stage resister
ladder architecture. With 2X interpolator in logic block, these DACs are indeed operated at two
time of sample rate. The playback stream from USB host is in signed 16-bit binary.
CM106F+/L+’s logic block converts the data to unsigned format, and adds 64 as a fixed offset.
The converted data to DAC input is then in unsigned 17-bit binary. The 2X interpolator, and fixed
offset value added upon playback stream could improve SNR.
6.5 ADC
CM106F+/L+ contain two 16-bit ADCs. The ADCs are implemented in Sigma-Delta architecture.
In addition to the default digital low pass filter, CM106F+/L+ provides an alternate one that could
improve SNR further. A larger ADC input swing (4.0Vp-p) is also available. Refer to the internal
register section for more information.
6.6 POWER MANAGEMENT
To meet suspend current specification of USB, CM106 F+/L+ turns off most blocks when entering
suspend. The only two exception are power-on-reset and regulator.
To meet unconfigured current specification of USB, CM106 F+/L+ provides a control signal
PDSW to turn off external components. PDSW would be active when USB host does not
configure CM106 F+/L+. PDSW would also be active when CM106 F+/L+ is suspended. If serial
EEPROM is exist, notice that it should not be powered off anyway because it contains Vendor ID
and Product ID which should be returned to USB host before CM106 F+/L+ is configured.
The value of two input pin PWRSEL and PWRSEL1 (for CM106-F+ only) would affect
configuration descriptor. If users declare the device as bus-power and high-power, and it is
attached to a bus-power hub, USB host would not configure the device because the power
budget is over.
Date: 08/19/2005
Version: 1.01
- 25 -
CM106-F+/L+
High End 8CH DAC and 2CH ADC Integrated Solution
7. SOFTWARE TECHNOLOGY
7.1 Xear 3DTM SOUND
C-Media provides new generation USB Digital Audio with exclusive Xear 3DTM sound technology.
This is a value-added PC audio total solution, that integrated advance Dolby Digital and DTS
sound technology. All kinds of applications can get maximum support. This patented 3D sound
technology not only supports real-time 3D gaming and industry-standard 5.1CH or 7.1CH DVD,
but also offers an immersive virtual 5.1Ch and 7.1CH sound field to the users regardless of what
type of output device is actually utilized.
Thanks to Xear 3D™ Sound Technology, even if users are using a pair of earphones or 2CH
speakers, still they can avail themselves of a much better virtual 5.1CH or 7.1CH environment
capable only by Xear 3D™ Sound Technology. Better yet, all audio formats can be converted to
thrilling 3-dimensional audio by this technology. Personalized and optimum 5.1CH/7.1CH
listening environment and experience is thus achieved.
- Support EAX2.0TM
- Support DS3DTM H/W &S/W
-
Games
5.1 & 7.1 Virtual SPEAKER SHIFTER
5.1 Xearphone
2-Speaker Virtual Theater
Earphone Plus Personal Theater
DVD Movies
-
Environment Emulation
Environment Sizes
10-Band Equalizer
Microphone Echo Effect
Magic Voice
Key-Shifting
Vocal Cancellation
Music
(MP3/CD)
Karaoke
Xear 3D Sound Features for All Applications
Date: 08/19/2005
Version: 1.01
- 26 -
CM106-F+/L+
High End 8CH DAC and 2CH ADC Integrated Solution
7.2 DOLBY® DIGITAL LIVE
C-Media Xear 3D™ Sound Solution provides another state-of-the-art high quality audio
function--Dolby digital AC-3 encoder module. With this real-time software encoder, the existing
and future customers who are using C-Media USB audio solution and devices can obtain this
digital quality audio output by S/PDIF format much easier than before. This function can output
various 3D and environmental sound effects by high quality AC-3 encoding; in the meantime, it
exhibits supreme efficiency—it takes only 7% of CPU consumption from a Pentium 4
Processor.
A technology that can encode all the digital audio content on PC into
Dolby Digital stream in real-time. It can then be sent to external
decoder for playback. All path are digital and wiring is simple.
Dolby® Digital Live was a real-time encoding technology it converts any audio signal into a Dolby
Digital bit stream for transport and playback through a home theater system. With it, your PC or
game console can be hooked up to your Dolby Digital-equipped audio/video receiver or digital
speaker system via a single digital connection, eliminating the confusion of multiple cables and
ensuring the integrity of the audio signal.
The real-time interactive capabilities of Dolby Digital Live technology are ideally suited to PCs
and video game consoles because it reproduces audio cues and effects that follow the on-screen
action, transforming game play into an exciting and realistic entertainment experience.
Systems using Dolby Digital Live technology can provide Dolby Digital (5.1-channel surround
sound) during game play, immersing players in high-quality surround sound that puts them at the
center of the action. Gamers hear every window shatter, feel every explosion, and experience
every wipeout.
These high-performance device provide an S/PDIF connector and use a digital cable for
one-step connection to a home theater system. Dolby Digital Live can also enable other future
entertainment capabilities on the PC because of its ability to deliver any audio source via a single
digital interface to an existing home theater system.
Date: 08/19/2005
Version: 1.01
- 27 -
CM106-F+/L+
High End 8CH DAC and 2CH ADC Integrated Solution
7.3 DTS® CONNECT
Besides Dolby, C-Media was also the world first PC audio provider whom can integrate whole
DTS Digital DSP technology in software module. Everyone knows that, DTS is the famous of
the world sound technology which guarantee high quality and performance. DTS Connect
comprised two technology : one is DTS Interactive the other is NEO : PC.
A real-time DTS encoder which takes any LPMC (2 channel or
more) and encodes it into DTS bit stream. The data transfer format
is 48 KHz at 1.5 mb/sec. Just using a single cable connection to
your DTS enabled surround sound system such as, powered PC
speakers, an A/V receiver or any other DTS compatible surround
sound system.
DTS Interactive
A real-time DTS encoder which takes any LPMC (2 channel or more) and encodes it into DTS
bit stream. The data transfer format is 48 KHz at 1.5 mb/sec. Just using a single cable
connection to your DTS enabled surround sound system such as, powered PC speakers, an
A/V receiver or any other DTS compatible surround sound system. It can take any content
(WMA, MP3, CD, and more!) to transfer 5.1 multi-chances with real-time whenever play on line
game, listen music, and watch VCD.
Uses a single digital connection
Transforms all PC audio signals into a DTS signal
Optimized for low-latency interactive applications
Provides realistic 5.1-channel surround sound effects during interactive video game play
NEO:PC
An audio up-mix matrix technology that turns any 2 channel audio into 7.1 surrounds sound. It
can turn your stereo audio (WMA, MP3, CD, and more!) into a convincing multi-channel audio
experience.
Date: 08/19/2005
Version: 1.01
- 28 -
CM106-F+/L+
High End 8CH DAC and 2CH ADC Integrated Solution
Music mode allows you to control music’s vocal to be concentrated or separated with
center gain adjustment bar.
Cinema mode can set to let you enjoy dramatic impact.
Wide mode is a special effect signal to the surround channels for wide space feeling.
Date: 08/19/2005
Version: 1.01
- 29 -
CM106-F+/L+
High End 8CH DAC and 2CH ADC Integrated Solution
8. VOLUME CONTROL
8.1 DAC VOLUME CONTROL
VOL_*_<5:0> Scale (linear) VOL_*_<5:0> Scale (linear) VOL_*_<5:0> Scale (linear) VOL_*_<5:0> Scale (linear)
00
1.000
10
0.724
20
0.448
30
0.171
01
0.973
11
0.696
21
0.420
31
0.144
02
0.944
12
0.669
22
0.392
32
0.116
03
0.917
13
0.641
23
0.365
33
0.088
04
0.890
14
0.613
24
0.337
34
0.061
05
0.862
15
0.586
25
0.309
35
0.033
06
0.834
16
0.558
26
0.282
36
0.006
07
0.807
17
0.530
27
0.254
37
mute
08
0.779
18
0.503
28
0.227
09
0.751
19
0.475
29
0.199
Note: VOL_*_ stands for VOL_FL_, VOL_FR_, VOL_CF_, VOL_LFE_, VOL_LS_, VOL_RS_, VOL_SL_, OL_SR_.
The volume control is in linear scale.
8.2 ADC VOLUME CONTROL
VOL_*_<3:0>
Scale (log)
VOL_*_<3:0>
Scale (log)
VOL_*_<3:0>
Scale (log)
VOL_*_<3:0>
Scale (log)
00
+22.5dB
04
+16.5dB
08
+10.5dB
12
+4.5dB
01
+21.0dB
05
+15.0dB
09
+9.0dB
13
+3.0dB
02
+19.5dB
06
+13.5dB
10
+7.5dB
14
+1.5dB
03
+18.0dB
07
+12.0dB
11
+6.0dB
15
0.0dB
Note: VOL_*_ stands for VOL_REC_L_ and VOL_REC_R_. The volume control is in log scale.
Date: 08/19/2005
Version: 1.01
- 30 -
CM106-F+/L+
High End 8CH DAC and 2CH ADC Integrated Solution
8.3 MIC / LINE-IN MONITOR VOLUME CONTROL
VOL_*_<4:0>
Scale (log)
VOL_*_<4:0>
Scale (log)
VOL_*_<4:0>
Scale (log)
VOL_*_<4:0>
Scale (log)
00
+12.0dB
08
0.0dB
16
-12.0dB
24
-24.0dB
01
+10.5dB
09
-1.5dB
17
-13.5dB
25
-25.5dB
02
+9.0dB
10
-3.0dB
18
-15.0dB
26
-27.0dB
03
+7.5dB
11
-4.5dB
19
-16.5dB
27
-28.5dB
04
+6.0dB
12
-6.0dB
20
-18.0dB
28
-30.0dB
05
+4.5dB
13
-7.5dB
21
-19.5dB
29
-31.5dB
06
+3.0dB
14
-9.0dB
22
-21.0dB
30
-33.0dB
07
+1.5dB
15
-10.5dB
23
-22.5dB
31
mute
Note: VOL_*_ stands for VOL_MICM_L_, VOL_MICM_R_, VOL_LINEM_L_, VOL_LINEM_R_. The volume
control is in log scale.
Date: 08/19/2005
Version: 1.01
- 31 -
CM106-F+/L+
High End 8CH DAC and 2CH ADC Integrated Solution
9. ELECTRICAL CHARACTERISTICS
9.1 ABSOLUTE MAXIMUM RATING
Symbol
Parameter
Value
Unit
Dvmin
Min Digital Supply Voltage
– 0.3
V
Dvmax
Max Digital Supply Voltage
+6
V
Avmin
Min Analog Supply Voltage
– 0.3
V
Avmax
Max Analog Supply Voltage
+6
V
Dvinout
Voltage on any Digital Input or Output
–0.3 to +5.5
V
–0.3 to +5.5
V
Pin
Avinout
Voltage on any Analog Input or Output
Pin
TBstgB
Storage Temperature Range
-40 to +125
o
C
ESD (HBM)
ESD Human Body Mode
3500
V
ESD (MM)
ESD Machine Mode
200
V
Latch Up Trigger Current
400
mA
ILatch_Up
9.2 RECOMMENDED OPERATION CONDITIONS
Operation conditions
Min
Typ
Max
Unit
Analog Supply Voltage
4.5
5.0
5.5
V
Digital Supply Voltage
4.5
5.0
5.5
V
-
-
350
mA
80
mA
uA
Operating Current:
Un-configure Current
Suspend Current
-
-
250
Operating ambient temperature
0
-
70
Date: 08/19/2005
P0P
C
Version: 1.01
- 32 -
CM106-F+/L+
High End 8CH DAC and 2CH ADC Integrated Solution
9.3 AUDIO PERFORMANCE
Min
Typ
Max
Unit
AA Path (Line In to Line Out)
THD + N (-3dBr)
-89
dB
Dynamic range
99
dB
Cross talk
101
dB
Frequency response 48KHz
20
20K
Hz
DAC (Front)
THD + N (-3dBr)
-
-69
-
dB
SNR
-
92
-
dB
Dynamic range
90
dB
Frequency response @ 48KHz
20
20K
Hz
Frequency Response @ 44.1KHz
20
17.6K
Hz
Full Scale Output Voltage Range
-
-
Vrms
Center Voltage
1.17
2.25
V
Pass Band Ripple @ 48KHz
+-0.05
dB
Pass Band Ripple @ 44.1KHz
+-0.05
dB
DAC (Rear)
THD + N (-3dBr)
-
-70
-
dB
SNR
-
91
-
dB
Dynamic range
90
dB
DAC (Center/Bass)
THD + N (-3dBr)
-
-68
-
dB
SNR
-
91
-
dB
Dynamic range
90
dB
DAC (Back Surround)
THD + N (-3dBr)
-
-68
-
dB
SNR
-
91
-
dB
Dynamic range
90
Date: 08/19/2005
dB
Version: 1.01
- 33 -
CM106-F+/L+
High End 8CH DAC and 2CH ADC Integrated Solution
Min
Typ
Max
Unit
ADC (Line In)
THD + N (-3dBr)
-70
dB
SNR
84
dB
Dynamic Range
85
dB
Frequency Response @ 48KHz
20
Input Range
0
-
20K
Hz
3.2 (4.0)
Vpp
ADC (Mic)
THD + N (-3dBr)
-68
dB
SNR
83
dB
Dynamic Range
84
dB
Frequency Response @ 48KHz
70
Input Range
0
-
12.5
Hz
3.2 (4.0)
Vpp
*Note: All specifications at +25oC, AVdd=DVdd=5V, 10k Ohm loading
Date: 08/19/2005
Version: 1.01
- 34 -
CM106-F+/L+
High End 8CH DAC and 2CH ADC Integrated Solution
10. AUDIO PERFORMANCE CURVES
10.1 AA PATH (LINE IN TO LINE OUT) FREQUENCY RESPONSE
C -Media
A nalog P ass-Through (A-A ) for Line Input to Line O utput
Frequency R esponse
08/12/04 10:44:41
-19
-19
-19.25
-19.25
-19.5
-19.5
d
B
r
-19.75
-20
-19.75 d
B
-20
r
A
-20.25
-20.25 B
-20.5
-20.5
-20.75
-20.75
-21
20
-21
50
100
200
500
1k
2k
5k
10k
20k
Hz
Sw eep
Trace
C olor
Line Style
Thick
D ata
Axis
C om m ent
1
1
1
2
C yan
Yellow
Solid
Solid
2
2
Anlr.Level A
Anlr.Level B
Left
R ight
LL-FreqR es p.at2
10.2 AA PATH (LINE IN TO LINE OUT) CROSS TALK
C-Media
Analog to A nalog C rosstalk
08/12/04 15:20:08
+0
-25
-50
d
B
-75
-100
-125
20
50
100
200
500
1k
2k
5k
10k
20k
Hz
Sw eep
Trace
C olor
Line Style
Thick
D ata
Axis
1
1
1
2
Green
Yellow
Solid
Solid
3
3
Anlr.C ros s talk
Anlr.C ros s talk
Left
Left
C om m ent
Line In to Line Out(10k ohm s Load)
0dBr = 0dBFS = 1.9 dBV
aa-axtalk.at2
Date: 08/19/2005
Version: 1.01
- 35 -
CM106-F+/L+
High End 8CH DAC and 2CH ADC Integrated Solution
10.3 DAC (FRONT) FREQUENCY RESPONSE @ 48KS/SEC
C -Media
D igital P layback (P C -D -A ) for Line O utput Frequency
R esponse
08/12/04 14:53:18
30
5k
+1
+0
d
B
r
-1
-2
-3
A
-4
-5
-6
50
100
200
500
1k
2k
10k
Hz
Sw e ep
Trace
C o lo r
L in e Style
Th ick
D a ta
Axis
1
1
1
2
Gre en
Ye llow
So lid
So lid
3
3
Fa s tte s t.C h .1 Am p l!N o rm alize
Fa s tte s t.C h .2 Am p l!N o rm alize
Le ft
Le ft
C o m m en t
WL -Mu ltito ne -48 k.a t2
10.4 DAC (FRONT) FREQUENCY RESPONSE @ 44.1KS/SEC
C -Media
D igital P layback (PC -D -A) for Line O utput Frequency
R esponse
08/12/04 14:54:41
+1
+0
d
B
r
-1
-2
-3
A
-4
-5
-6
20
50
100
200
500
1k
2k
5k
10k
Hz
Sw eep
Trace
C olor
Line Style
Thick
D ata
Axis
1
1
1
2
Green
Yellow
Solid
Solid
3
3
Fas ttes t.C h.1 Am pl!N orm alize
Fas ttes t.C h.2 Am pl!N orm alize
Left
Left
C om m ent
WL-Multitone-44k.at2
Date: 08/19/2005
Version: 1.01
- 36 -
CM106-F+/L+
High End 8CH DAC and 2CH ADC Integrated Solution
10.5 DAC (FRONT) PASS BAND RIPPLE @ 48KS/SEC
C -Media
D igital Playback (P C -D -A) for Line O utput Passband
R ipple @ 48ks/sec
08/12/04 14:54:00
+ 0.4
+ 0.2
d
B
+0
-0.2
-0.4
-0.6
40
50
100
200
500
1k
2k
5k
9k
Hz
Sw eep
Trace
C olor
Line Style
Thick
D ata
Axis
1
1
1
2
Green
Yellow
Solid
Solid
3
3
Fas ttes t.C h.1 Am pl!N orm alize
Fas ttes t.C h.2 Am pl!N orm alize
Left
Left
C om m ent
WL-Pas s bandR ipple-M48k.at2
10.6 DAC (FRONT) PASS BAND RIPPLE @ 44.1KS/SEC
C -Media
D igital Playback (PC -D -A ) for Line O utput Passband
R ipple @44.1ks/sec
08/12/04 14:55:21
+ 0.4
+ 0.2
d
B
+0
-0.2
-0.4
-0.6
40
50
100
200
500
1k
2k
5k
8k
Hz
Sw eep
Trace
C olor
Line Style
Thick
D ata
Axis
1
1
1
2
Green
Yellow
Solid
Solid
3
3
Fas ttes t.C h.1 Am pl!N orm alize
Fas ttes t.C h.2 Am pl!N orm alize
Left
Left
C om m ent
WL-Pas s bandR ipple-M44k.at2
Date: 08/19/2005
Version: 1.01
- 37 -
CM106-F+/L+
High End 8CH DAC and 2CH ADC Integrated Solution
10.7 ADC (LINE IN) FREQUENCY RESPONSE @ 48KS/SEC
C-Media
D igital R ecording (A-D -PC) for Line Input Frequency Response
+1
+0
d
B
r
-1
-2
-3
1
-4
-5
-6
20
50
100
200
500
1k
2k
5k
10k
Hz
Sw eep
Trace
C olor
Line Style
Thick
D ata
Axis
1
1
1
2
Green
Yellow
Solid
Solid
3
3
Fas ttes t.C h.1 Am pl!N orm alize
Fas ttes t.C h.2 Am pl!N orm alize
Left
Left
C om m ent
LW-MFreqR es p-48K.at2
10.8 ADC (MIC IN) FREQUENCY RESPONSE @ 48KS/SEC
C-Media
D igital R ecording (A-D -PC) for Line Input Frequency Response
+1
+0
d
B
r
-1
-2
-3
1
-4
-5
-6
20
50
100
200
500
1k
2k
5k
10k
Hz
Sw eep
Trace
C olor
Line Style
Thick
D ata
Axis
1
1
1
2
Green
Yellow
Solid
Solid
3
3
Fas ttes t.C h.1 Am pl!N orm alize
Fas ttes t.C h.2 Am pl!N orm alize
Left
Left
C om m ent
LW-MFreqR es p-48K.at2
Date: 08/19/2005
Version: 1.01
- 38 -
CM106-F+/L+
High End 8CH DAC and 2CH ADC Integrated Solution
11. APPLICATION CIRCUIT
11.1 CM106-L+ (LQFP48) / CM106-F+ (QFP100)
Date: 08/19/2005
Version: 1.01
- 39 -
CM106-F+/L+
High End 8CH DAC and 2CH ADC Integrated Solution
Date: 08/19/2005
Version: 1.01
- 40 -
CM106-F+/L+
High End 8CH DAC and 2CH ADC Integrated Solution
REFERENCE
USB-IF, USB Specification, Revision 1.1 and 2.0, and USB Audio Device Class Specification,
Revision 1.0,.
-End of Specifications-
C-MEDIA ELECTRONICS INC.
6F., 100, Sec. 4, Civil Boulevard, Taipei, Taiwan 106 R.O.C.
TEL:886-2-8773-1100
FAX:886-2-8773-2211
E-mail: sales@cmedia.com.tw
TU
UT
URL: http://www.cmedia.com.tw
TU
Date: 08/19/2005
UT
Version: 1.01
- 41 -