ESTEK IW4013B

IW4013B
Description
The IW4013B consists of two identical, independent data-type flip-flops. Each flip-flop has independent data,
set, reset, and clock inputs and Q and Q outputs. These devices can be used for shift register applications,
and, by connecting Qoutput to the data input,for counter and toggle applications. The logic level present at the
Q output during the positive- going
Input is transferred to the
Transition of the clock pulse. Setting or
Dresetting is independent of
clock and is accomplished by a high level on the set or reset line,respectively.
the
Features



Operating Voltage Range: 3.0 to 18 V
Maximum input current of 1 u A at 18 V over full packagetemperature range ;100 nA at 18 V and 25 C
Noise margin (over full package temperature range):
1.0 V min @ 5.0 V supply
2.0 V min @ 10.0 V supply
14
1
SOP
14
14
1
DIP
2.5 V min @ 15.0 V supply
Package
Pin Assignment
Logic Diagram
Set 1
Data
1
6
5
3
1
Q1
2
Set 2
Data 2
Clock 2
Reset 2
Q1
Vcc
Q1
Q2
Clock 1
Q2
Reset 1
Clock 2
Data 1
Reset 2
Set 1
Data 2
GND
Set 2
Q1
Clock 1
Reset
1
14
4
Function Table
8
9
13
11
12
Inputs
Q2
Outputs
Clock Data Reset Set
L
L
L
Q
L
Q
H
H
L
L
H
L
X
L
L
Q
Q
X
X
H
L
L
H
X
X
L
H
H
L
X
X
H
H
H
H
Q2
10
PIN 14 =
V
DD
PIN 7
=
X = don ' t care
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IW4013B
Absolute Maximum Ratings
Symbol
Parameter
VCC
DC Supply Voltage (Referenced to GND)
VIN
DC Input Voltage (Referenced to GND)
IIN
DC Input Current, per Pin
PD
Power Dissipation in Still Air, Plastic
SOIC Package
Ptot
Power Dissipation per Output Transistor
Tstg
Storage Temperature
TL
DIP,
Lead Temperature, 1 mm from Case for 10 Seconds
(Plastic DIP or SOIC Package)
Value
Unit
-0.5 to +20
V
-0.5 to VCC+0.5
+- 10
V
mA
500
mW
100
mW
-65 to +150
°C
260
°C
Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
**Derating - Plastic DIP from - 55 to+100°C
- SOIC Package from -55 to + 65°C
- Plastic DIP: - 12 mW/ °C from +100 to+125°C
- SOIC Package: : - 7 mW/ °C from +65 to+125°C
Recommended Operating Conditions
Symbol
Parameter
VCC
DC Supply Voltage (Referenced to GND)
VIN
DC Input Voltage (Referenced to GND)
TA
Operating Temperature, All Package Types
Min
Max
Unit
3.0
18
V
0
VCC
V
-55
+125
°C
This device contains protection circuitry to guard against damage due to high static voltages or
electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum
rated voltages to this high-impedance circuit. For proper operation VIN should be constrained to the range
GND VIN VCC .
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC ).
Unused outputs must be left open.
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IW4013B
DC Electrical Characteristics
VCC
Symbol
Parameter
Test Conditions
(Voltages Referenced to GND)
Guaranteed Limit
V
-55°C
25°C
125
°C
Unit
VIH
Minimum High-Level VOUT=0.5 V or VCC - 0.5 V
Input Voltage
VOUT=1.0 V or VCC - 1.0 V
VOUT=1.5 V or VCC - 1.5 V
5.0
10
15
3.5
7
11
3.5
7
11
3.5
7
11
V
VIL
Maximum Low Level Input Voltage
5.0
10
15
1.5
3
4
1.5
3
4
1.5
3
4
V
VOH
Minimum High-Level VIN=GND or VCC
Output Voltage
5.0
10
15
5.0
10
15
4.95
9.95
14.95
4.5
9.0
13.5
4.95
9.95
14.95
4.5
9.0
13.5
4.95
9.95
14.95
4.5
9.0
13.5
V
0.05
0.05
0.05
0.5
1.0
1.5
0.05
0.05
0.05
0.5
1.0
1.5
0.05
0.05
0.05
0.5
1.0
1.5
V
VIL =1.5V, VIH=3.5V, IO=1µA
VIL =3.0V, VIH=7.0V, IO=1µA
VIL =4.0V, VIH=11V, IO=1µA
5.0
10
15
5.0
10
15
VIN= GND or VCC
18
+- 0.1
+- 0.1
+- 1.0
uA
VIN= GND or VCC
5.0
10
15
20
1
2
4
20
1
2
4
20
30
60
120
600
uA
VIN= GND or VCC
UOL=0.4 V
UOL=0.5 V
UOL=1.5 V
5.0
10
15
0.64
1.6
4.2
0.51
1.3
3.4
0.36
0.9
2.4
VIN= GND or VCC
UOH=2.5 V
UOH=4.6 V
UOH=9.5 V
UOH=13.5 V
5.0
5.0
10
15
-2.0
-0.64
-1.6
-4.2
-1.6
-0.51
-1.3
-3.4
-1.15
-0.36
-0.9
-2.4
VOUT=0.5 V or VCC - 0.5 V
VOUT=1.0 V or VCC - 1.0 V
VOUT=1.5 V or VCC - 1.5 V
VIL =1.5V, VIH=3.5V, IO=-1µA
VIL =3.0V, VIH=7.0V, IO=-1µA
VIL =4.0V, VIH=11V, IO=-1µA
VOL
IIN
Maximum Low-Level VIN=GND or VCC
Output Voltage
Maximum Input
Leakage Current
ICC
Maximum
Quiescent
Supply Current
(per Package)
I
Minimum
Low (Sink)Output
Current
IOH
Minimum Output
High (Source)
Current
mA
mA
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IW4013B
AC Electrical Characteristics
Symbol
fmax
(CL=50pF, RL=200 k , Input t r =t f =20
ns)
VCC
Guaranteed Limit
Parameter
Maximum Clock Frequency (Figure 1)
tPLH, tPHL MaximumPropagation Delay, Clock to Q or Q
(Figure 1)
tPLH
Maximum Propagation Delay, Set to
Q orQ
to
(Figure 2)
Reset
V
 -55°C
25°C
 125°C
Unit
5.0
10
15
3.5
8
12
3.5
8
12
3.0
6
10
MHz
5.0
10
15
300
130
90
300
130
90
450
200
150
ns
5.0
10
15
300
130
90
300
130
90
450
200
150
ns
tPHL
Maximum PropagationDelay,Set to QQ or
Reset
to (Figure 2)
5.0
10
15
400
170
120
400
170
120
600
250
150
ns
tTLH, tTHL
Maximum Output Transition Time, Any
Output (Figure 1)
5.0
10
15
200
100
80
200
100
80
250
150
100
ns
CIN
Maximum Input Capacitance
5.0
Timing
Requirements
(CL=50pF, RL=200 k
, Input t r =t f =20 ns)
VCC
Symbol
tw
tw
pF
7.5
Parameter
Minimum Pulse Width, Clock (Figure 1)
Minimum Pulse Width, Set or Reset (Figure2)
Guaranteed Limit
V
 -55°C
25°C
125°C
Unit
5.0
10
15
140
60
40
140
60
40
200
80
50
ns
5.0
10
15
180
80
50
180
80
50
250
120
80
ns
tsu
Minimum Setup Time, Data to Clock
(Figure 3)
5.0
10
15
40
20
15
40
20
15
40
20
15
ns
th
Minimum Hold Time, Clock to Data
(Figure 3)
5.0
10
15
5
5
5
5
5
5
8
5
5
ns
Maximum Input Rise or Fall Time, Clock
(Figure 1)
5.0
10
15
500
30
6
500
30
6
500
30
6
s
tr, tf
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IW4013B
t
tw
tfr
VCC
%
90
K
50%
10
CLOC
0V
%
SET O R
RESET
0V
t PHL
tw
1/fma x
tH PHL
tPL
OR 90Q
VCC
%
OR Q
50Q
VCC
%
50%
10%
0V
tPLH
VCC
OR 0QV
tH THL
tTL
VCC
%
50%
Figure 1. Switching Waveforms
0V
Figure 2. Switching Waveforms
V CC
DAT
50%
A
0V
t su
th
V CC
CLOC
50%
K
0V
Figure 3. Switching Waveforms
Expanded Logic Diagram
(1/2 of the Device)
Address :
6A06--6A07
Rm 6A07,Changyin Office Building ,No.88,Yong Ding Road,Hai Dian District ,Beijing
Postalcode:100039
Tel: 86-010-58895780 / 81 / 82 / 83 / 84
Fax : 010-58895793
Http://www.estek.com.cn
Email:sales@estek.com.cn
REV No:01-060832
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