EUP7966 2A Low-Dropout Regulator with Enable DESCRIPTION FEATURES The EUP7966 is a high current, fast response voltage regulator designed for use in applications requiring very low input voltage and very low dropout voltage at up to 2 amps. It operates from two input voltages : VBIAS provides 5V voltage to drive the gate of the N-MOS power transistor, while VIN is the input voltage which supplies power to the load. The use of an external bias rail allows the part to operate from ultra low VIN voltage. The EUP7966 features ultra low dropout, ideal for applications where VOUT is very close to VIN. z z z z z z z z Additionally, the EUP7966 has an enable pin to further reduce power dissipation while shutdown. The EUP7966 provides excellent regulation over variations in line, load and temperature. The EUP7966 provides a power OK signal to indicate if the voltage level of VOUT reaches 92% of its rating value. The EUP7966 is available in the power SOP-8 (FD) package. It is available with 1.2V, 1.5V, 1.8V and 2.5V internally preset outputs, that are also be able to programmed as low as 0.8V with ADJ pin configured with external resistors. z z Input Voltage as Low as 1.2V and VBIAS Voltage 5V ± 2% Output Voltage 300mV Dropout @ 2A, VOUT=1.2V Over Current and Over Temperature Protection Enable Pin Low Reverse Leakage (Output to Input) Power OK Output 1.2V, 1.5V, 1.8V and 2.5V Standard Voltages Available and Each also can be Adjustable by Connecting ADJ with External Resistors SOP-8 (FD) Package RoHS Compliant and 100% Lead (Pb)-Free APPLICATIONS z z z z z Motherboards Peripheral Cards Network cards Set Top Boxes Notebook Computers Typical Application Circuit Figure 1. Fixed Output Voltage DS7966 Ver1.0 Aug. 2006 1 EUP7966 Figure 2. Adjustable Output Voltage Block Diagram Figure 3. DS7966 Ver1.0 Aug. 2006 2 EUP7966 Pin Configurations Part Number Pin Configurations EUP7966 SOP-8 (FD) Pin Description PIN SOP-8 DESCRIPTION POK 1 VEN 2 VIN 3 VBIAS 4 Assert high once VOUT reaches 92% of its rating voltage. Open-drain output. Enable Input. Pulling this pin below 0.4V turns the regulator off, reducing the quiescent current to a fraction of its operating value. The device will be enabled if this pin is left open. High current input voltage. Large bulk capacitance should be placed closely to this pin . A 10µF ceramic capacitor is recommended at this pin. Input voltage for controlling circuit. NC 5 VOUT 6 ADJ 7 GND 8 DS7966 Ver1.0 Aug. 2006 Not connected. The power output of the device. A pull low resistance exists when deactivate device by VEN. This pin, when grounded, sets the output voltage by the internal feedback resistors. If external feedback resistors are used , the output voltage will be VOUT=0.8(R1+R2)/R2 Volts. Reference ground. 3 EUP7966 Ordering Information Order Number Package Type EUP7966-12DIR1 SOP-8 (FD) EUP7966-15DIR1 SOP-8 (FD) EUP7966-18DIR1 SOP-8 (FD) EUP7966-25DIR1 SOP-8 (FD) EUP7966-□ □ □ Marking xxxx EUP7966 T xxxx EUP7966 C xxxx EUP7966 D xxxx EUP7966 B □ □ □ □ Lead Free Code 1: Lead Free 0: Lead Packing R: Tape & Reel Operating temperature range I: Industry Standard Package Type D: SOP (FD) Output Voltage 12: 1.2V 15: 1.5V 18: 1.8V 25: 2.5V DS7966 Ver1.0 Aug. 2006 4 Operating Temperature range -40 °C to 85°C -40 °C to 85°C -40 °C to 85°C -40 °C to 85°C EUP7966 Absolute Maximum Ratings VBIAS,VIN ,Input Voltage -------------------------------------------------------------- 6V Junction Temperature ------------------------------------------------------------------- 150°C Storage Temperature ------------------------------------------------------ -65°C to +150°C Power Dissipation ------------------------------------------------------------- Internal Limiting Lead Temperature (Soldering, 10sec.) ------------------------------------------------- 260°C Thermal Resistance θJA, SOP-8 (FD) ------------------------------------------------ 42.3°C/W ESD Rating Human Body Model ------------------------------------------------------------------- 1kV Operating Ratings VIN Voltage ---------------------------------------------------------------------------- 1.2 to 3.6V VPP Voltage ----------------------------------------------------------------------------- 4.5 to 5.5V Temperature Range --------------------------------------------------------- -40°C ≤ TA ≤ 85°C Electrical Characteristics VBIAS= 5V, VIN=VOUT+0.5V, IO=10mA,CIN=COUT=10µF, CBIAS=1µF ,TA =TJ= 25°C unless otherwise specified. Symbol VIN IQ ISD VBIAS IBH IBL VOUT Parameter Input Voltage Range Quiescent Current (Ground Current) ADJ VREF EUP7966 Typ Max. Unit -1 1.1 3.6 1.6 2.5 VEN=0V,VIN=2.2V -- 0.1 1 VEN=0V,VIN=3.6V -- 0.4 5 4.2 -- 5.5 V VOUT=1.2V -- 0.8 1.2 mA VEN=0V -- -- 1 µA -2 -- 2 TA=-40 to 85℃ VIN=(VOUT+0.5V) to 5V, TA=-40 to 85℃ 10mA ≤ Io ≤ 1A Io=0.1A -3 -- 3 -- 0.2 1 -- 3.5 10 -- 10 15 Io=2A -- 200 300 mV Short Circuit Current VO=GND -- 2 -- VOUT Pull Low Resistance VEN=0V -- 75 -- A Ω Reference Voltage VADJ=V0UT 0.792 0.804 0.816 V -- -- 1 µA 0.17 0.22 0.27 V Shutdown Current VIN=VOUT+0.5V,IO=10mA VIN=VOUT+3.6V,IO=100mA VBIAS Voltage Range VBIAS Current Output Voltage Accuracy (Fixed) Load Regulation ISC Min 1.2 --- Line Regulation VDROP Conditions Dropout Voltage Adjust Pin Current Adjust Pin Threshold DS7966 Ver1.0 Aug. 2006 5 V mA µA % % mV EUP7966 Electrical Characteristics VBIAS= 5V, VIN=VOUT+0.5V, IO=10mA,CIN=COUT=10µF, CBIAS=1µF ,TA =TJ= 25°C unless otherwise specified. Symbol Parameter Conditions Min EUP7966 Typ Max. Unit VEN VENH VEN Pin Voltage High TA=-40 to 85℃ 1.6 -- -- V EENL VEN Pin Voltage Low TA=-40 to 85℃ -- -- 0.4 V VEN Pin Bias Current VEN=0V -- -- 1 µA POK VTHPOK VOUT Power OK Voltage -- 90 -- % VHYPOK Hysteresis -- 7.5 -- % Over Temperature -- 155 -- ℃ Over Temperature Hysteresis -- 30 -- ℃ Under Voltage Lock Out (UVLO) Vbias Thereshold -- 3.9 -- V Hysteresis -- 20 -- mV Over Temperature Protection (OTP) TOT TOTHY DS7966 Ver1.0 Aug. 2006 6 EUP7966 Typical Operating Characteristics Quiescent Current vs. Temperature 1.50 1.2 1.25 Quiescent Current (mA) Quiescent Current (mA) Quiescent Current vs. Input Voltage 1.5 0.9 0.6 0.3 0.0 1.5 1.8 2.1 2.4 2.7 3.0 3.3 1.00 0.75 0.50 0.25 0.00 -40 3.6 -20 0 VBIAS Current vs. Input Voltage 100 VBIAS Current vs. Temperature 1.00 0.8 VBIAS Current (mA) VBIAS Current (mA) 80 Figure 5. 1.0 0.6 0.4 0.2 1.8 2.1 2.4 2.7 3.0 3.3 0.75 0.50 0.25 0.00 -40 3.6 -20 0 20 40 60 80 100 o Input Voltage (V) Temperature ( C) Figure 6. Figure 7. Output Voltage vs. Input Voltage 1.224 Output Voltage (V) 1.224 1.216 Output Voltage (V) 60 Temperature ( C) Figure 4. 1.208 1.200 1.192 Output Voltage vs. Output Current 1.216 1.208 1.200 1.192 1.184 1.184 1.176 1.5 40 o Input Voltage (V) 0.0 1.5 20 1.8 2.1 2.4 2.7 3.0 3.3 1.176 0.00 0.25 0.50 0.75 1.00 1.25 1.50 1.75 2.00 3.6 Output Current (A) Input Voltage (V) Figure 8. DS7966 Ver1.0 Aug. 2006 Figure 9. 7 EUP7966 Output Voltage vs. Temperature Reference Voltage vs. Input Voltage 1.224 0.812 0.808 Reference Voltage (V) Output Voltage (V) 1.218 1.212 1.206 IO= 0A 1.200 1.194 IO= 1A 1.188 1.182 1.176 -40 -20 0 20 40 60 80 0.804 0.800 0.796 0.792 0.788 1.5 100 1.8 2.1 o Figure 10. Reference Voltage vs. Temperature 3.0 3.3 3.6 Dropout Voltage vs. Load Current 400 350 Dropout Voltage (mV) 0.808 Reference Voltage (V) 2.7 Figure 11. 0.812 0.804 0.800 0.796 0.792 0.788 -40 2.4 Input Voltage (V) Temperature ( C) 300 250 o T=85 C 200 o T=25 C 150 100 o T=-40 C 50 -20 0 20 40 60 80 0 0.0 100 o 1.0 Load Current (A) Temperature ( C) DS7966 Ver1.0 Aug. 2006 0.5 Figure 12. Figure 13. Figure 14. Figure 15. 8 1.5 2.0 EUP7966 Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. DS7966 Ver1.0 Aug. 2006 9 EUP7966 Application Note External Capacitors To assure regulator stability, input and output capacitors are required as shown in the Typical Application Circuit. Output Capacitor The EUP7966 is designed specifically to work with very small ceramic output capacitors. A ceramic capacitor (temperature characteristics X7R, X5R, Z5U, or Y5V) in 4.7 to 22µF range with 5mΩ to 200mΩ ESR range is suitable in the EUP7966 application circuit. The output capacitor must meet the requirement for minimum amount of capacitance and also have an ESR (Equivalent Series Resistance) value which is within a stable range (5mΩ to 200mΩ) Input Capacitor The input capacitor must be at least 10 µF ceramic, but can be increased without limit. It’s purpose is to provide a low source impedance for the regulator input. Bias Capacitor The 1µF capacitor on the bias line can be any good quality capacitor (ceramic is recommended). Bias Voltage The bias voltage is an external voltage rail required to get gate drive for the N-FET pass transistor. Bias voltage must be in the range of 4.5 – 5.5V to assure proper operation of the part. Shutdown Operation Pulling down the VEN pin will turn-off the regulator. VEN pin must be actively terminated through a pull-up resistor (10 kΩ to 100 kΩ) for a proper operation. If this pin is driven from a source that actively pulls high and low (such as a CMOS rail to rail comparator) , the pull-up resistor is not required. This pin must be tied to VIN if not used. Power Dissipation /Heatsinking A heatsink may be required depending on the maximum power dissipation and maximum ambient temperature of the application. Under all possible conditions, the junction temperature must be within the range specified under operating conditions. The total power dissipation of the device is given by: PD=(VIN-VOUT)IOUT+(VIN)IGND where IGND is the operating ground current of the device. The maximum allowable temperature rise (TRmax) depends on the maximum ambient temper -ature (TAmax) of the application, and the maximum allowable junction temperature (TJmax): TRmax=TJmax-TAmax DS7966 Ver1.0 Aug. 2006 10 The maximum allowable value for junction to ambient Thermal Resistance, θJA, can be calculated using the formula: θJA=TRmax/PD Heatsinking for the SOP-8 (FD) package is accomplished by allowing heat to flow through the ground slug on the bottom of the package into the copper on the PC board. The heat slug must be soldered down to a copper plane to get good heat transfer. It can also be connected through vias to internal copper planes .Since the heat slug is at ground potential, traces must not be routed under it which are not at ground potential. Under all possible conditions, the junction temperature must be within the range specified under operating conditions. EUP7966 Packaging Information SOP-8 (FD) X Y Z Standard Solder Map Bottom Ues as much copper area as possible Symbols A B C D E H F L1 L2 M N A1 B1 DS7966 Ver1.0 Aug. 2006 EXPOSED PAD Dimension in Millimeters Min. Max. 4.80 5.00 5.80 6.20 3.80 4.00 1.194 1.346 1.45 1.55 0.00 0.10 0.33 0.51 0.19 0.25 0.40 1.27 0° 8° 40° 50° 2.6 2.8 2.4 2.6 11 Dimension in Inches Min. Max. 0.189 0.197 0.228 0.244 0.150 0.157 0.047 0.053 0.057 0.061 0.000 0.004 0.013 0.020 0.007 0.010 0.016 0.050 0° 8° 40° 50° 0.102 0.110 0.095 0.102