XRDAN27 * ' " " * & , ' Figure 2. (<) $ () $ & 3 $ # * $ .=8 9&0 Introduction ! !! !! " # ! $ % & ' % () $ ! # " ! $ * " $ " Figure 3. Figure 2. % # % % 2 % ! * .=8 9&0 % $ 5 ; 8 ; (7) $ " ' $ % #! $ ' * & % ! % $ % $ Circuit Description and Results ! ! $ Figure 1. + , - ./'0" * $ 123.04 ! * ./'0 ' % * .45 0 $ Conclusion ' 4 % 4< $ % ! 123.04 % 6 $ Figure 2. Figure 3. ' * $ $ ! % 162 $ Figure 1. ' * .710 $ 8 9& ' $ :: $ ' Figure 1. # > OUT2(s ) = OUT1(s ) ' Figure 2. () (;) $ ! () $ % * ! 2 $ ! " $ ! (1 • s • RC) (1 + 1.4 • RC • s ) (1 + s • RC) (1 + 0.25 • RC • s ) $ ' " " % % % $ * * ' 162 * %$ XRDAN27 PSPICE CIRCUIT FILE ! "#$" "#$ ' ' '( '& '# % & & ( $# ( ' ' )*+),+*# +*&& # # .*) ,)/ ,012/*$ 3 # '3 ,2 2 < ?< 1 2 H (s ) = FS = 1 • 1 TS 1 2 e• STS /' STS 71 @ 1 7* '1 @ 1 6 - R 50 R 10 /' A RC = 0.25 FS Figure 3. Compensating for Zero Order Hold Amplitude Attenuation XRDAN27 8 OUT2 Group Delay 5 OUT1 < B OUT1 OUT2 ? 7* ; 7* Amplitude -5; -:; ,& B,& OUT1 OUT2 9& B9& 9& Frequency Figure 4. Comparison of Hold Response before and after Compensation B B9& XRDAN27 8 Group Delay ? $ * & < 7 Hold only ? OUT1 OUT2 Lead without Equilization 8; Amplitude ; -8 -; ./'0 Lead 9& 9& OUT1 OUT2 59& LEAD :9& C9& 7* Figure 5. Comparison of Hold Response before and after Compensation 5 9&