AGILENT HFBR

Fiber Optic Transmitter
and Receiver Data Links
for 155 MBd
Technical Data
HFBR-1116T Transmitter
HFBR-2116T Receiver
Features
Description
• Full Compliance with the
Optical Performance
Requirements of the ATM
Forum UNI SONET OC-3
Multimode Physical Layer
Specification
• Other Versions Available for:
- FDDI
- Fibre Channel
• Compact 16-pin DIP Package
with Plastic ST* Connector
• Wave Solder and Aqueous
Wash Process Compatible
Package
• Manufactured in an ISO
9001 Certified Facility
The HFBR-1116/-2116 series of
data links are high-performance,
cost-efficient, transmitter and
receiver modules for serial
optical data communication
applications specified at 155 MBd
for ATM UNI applications.
Applications
• ATM Switches, Hubs, and
Network Interface Cards
• Multimode Fiber ATM
Wiring Closet-to-Desktop
Links
• Point-to-Point Data
Communications
• Replaces DLT/R1040-ST1
Model Transmitters and
Receivers
These modules are designed for
50 or 62.5 µm core multimode
optical fiber and operate at a
nominal wavelength of 1300 nm.
They incorporate our highperformance, reliable, longwavelength, optical devices and
proven circuit technology to give
long life and consistent
performance.
Transmitter
The transmitter utilizes a 1300 nm
surface-emitting InGaAsP LED,
packaged in an optical subassembly. The LED is dc-coupled to a
custom IC which converts
differential-input, PECL logic
signals, ECL-referenced (shifted)
to a +5 V power supply, into an
analog LED drive current.
Receiver
The receiver utilizes an InGaAs
PIN photodiode coupled to a
custom silicon transimpedance
preamplifier IC. The PINpreamplifier combination is accoupled to a custom quantizer IC
which provides the final pulse
shaping for the logic output and
the Signal Detect function. Both
the Data and Signal Detect
Outputs are differential. Also,
both Data and Signal Detect
Outputs are PECL compatible,
ECL-referenced (shifted) to a
+5 V power supply.
Package
The overall package concept for
the Data Links consists of the
following basic elements: two
optical subassemblies, two
electrical subassemblies, and the
outer housings as illustrated in
Figure 1.
*ST is a registered trademark of AT&T Lightguide Cable Connectors.
5965-3482E (8/96)
189
RECEIVER
DIFFERENTIAL
DATA IN
DIFFERENTIAL
The package outline drawing and
pinout are shown in Figures 2
and 3. The details of this package
outline and pinout are compatible
with other data-link modules from
other vendors.
PIN PHOTODIODE
QUANTIZER
IC
SIGNAL
DETECT OUT
PREAMP IC
OPTICAL
SUBASSEMBLIES
ELECTRICAL
SUBASSEMBLIES
SIMPLEX ST®
RECEPTACLE
The optical subassemblies consist
of a transmitter subassembly in
which the LED resides and a
receiver subassembly housing the
PIN-preamplifier combination.
TRANSMITTER
DIFFERENTIAL
DATA IN
VBB
DRIVER IC
LED
The electrical subassemblies consist of a multi-layer printed circuit
board on which the IC chips and
various surface-mounted, passive
circuit elements are attached.
TOP VIEW
Figure 1. Transmitter and Receiver Block Diagram.
THREADS
3/8 – 32 UNEF-2A
HFBR-111X/211XT
DATE CODE (YYWW)
SINGAPORE
12.19
MAX.
8.31
41 MAX.
5.05
0.9
7.01
9.8 MAX.
5.0
2.45
19.72
NOTES:
1. MATERIAL ALLOY 194 1/2H – 0.38 THK
FINISH MATTE TIN PLATE 7.6 µm MIN.
2. MATERIAL PHOSPHOR BRONZE WITH
120 MICROINCHES TIN LEAD (90/10)
OVER 50 MICROINCHES NICKEL.
12
17.78
(7 x 2.54)
8 x 7.62
3. UNITS = mm
HOUSING PINS 0.38 x 0.5 mm
NOTE 1
PCB PINS
DIA. 0.46 mm
NOTE 2
Figure 2. Package Outline Drawing.
190
3
OPTICAL PORT
NC
OPTICAL PORT
9
8
NC
GND
10
7
NO PIN
VCC
11
6
GND
GND
11
6
VCC
VCC
12
5
GND
GND
12
5
VCC
GND
13
4
GND
GND
13
4
VCC
DATA
14
3
GND
SD
14
3
DATA
SD
15
2
DATA
NO PIN
16
1
NC
DATA
15
2
VBB
NC
16
1
NC
NC
NO PIN
TRANSMITTER
9
8
NC
10
7
GND
OPTICAL POWER BUDGET (dB)
12
10
62.5/125 µm
8
50/125 µm
6
4
2
0
0
0.3 0.5
1.0
1.5
2.0
2.5
FIBER OPTIC CABLE LENGTH (km)
Figure 4. Optical Power Budget at
BOL vs. Fiber Optic Cable Length.
RECEIVER
Figure 3. Pinout Drawing.
Each transmitter and receiver
package includes an internal shield
for the electrical subassembly to
ensure low EMI emissions and high
immunity to external EMI fields.
The outer housing, including the
ST* port, is molded of filled, nonconductive plastic to provide
mechanical strength and electrical
isolation. For other port styles,
please contact your HewlettPackard Sales Representative.
Each data-link module is attached
to a printed circuit board via the
16-pin DIP interface. Pins 8 and 9
provide mechanical strength for
these plastic-port devices and will
provide port-ground for forthcoming metal-port modules.
Application Information
The Applications Engineering
group of the Optical Communication Division is available to assist
you with the technical understanding and design tradeoffs associated
with these transmitter and receiver
modules. You can contact them
through your Hewlett-Packard
sales representative.
The following information is
provided to answer some of the
most common questions about the
use of these parts.
Transmitter and Receiver
Optical Power Budget
versus Link Length
The Optical Power Budget (OPB)
is the available optical power for a
fiber-optic link to accommodate
fiber cable losses plus losses due to
in-line connectors, splices, optical
switches, and to provide margin for
link aging and unplanned losses
due to cable plant reconfiguration
or repair.
Figure 4 illustrates the predicted
OPB associated with the transmitter and receiver specified in this
data sheet at the Beginning of Life
(BOL). This curve represents the
attenuation and chromatic plus
modal dispersion losses associated
with 62.5/125 µm and 50/125 µm
fiber cables only. The area under
the curve represents the remaining
OPB at any link length, which is
available for overcoming non-fiber
cable related losses.
*ST is a registered trademark of AT&T Lightguide Cable Connectors.
191
Transmitter and Receiver
Signaling Rate Range and
BER Performance
These data link modules can also
be used for applications which
require different bit-error-ratio
(BER) performance. Figure 6
illustrates the typical trade-off
between link BER and the receiver
input optical power level.
For purposes of definition, the
symbol rate (Baud), also called
signaling rate, is the reciprocal of
the symbol time. Data rate (bits/
sec) is the symbol rate divided by
the encoding factor used to encode
the data (symbols/bit).
BIT ERROR RATIO
When used in 115 Mbps SONET
OC-3 applications, the performance of Hewlett-Packard’s
1300 nm data link modules, HFBR1116/-2116, is guaranteed to the
full conditions listed in the individual product specification tables.
1 x 10-2
The data link modules may be used
for other applications at signaling
rates different than the 155 Mbps
with some variation in the link
optical power budget. Figure 5
gives an indication of the typical
performance of these 1300 nm
products at different rates.
1 x 10-3
CENTER OF SYMBOL
1 x 10-4
1 x 10-5
1 x 10-6
1 x 10-7
1 x 10-8
1 x 10-9
1 x 10-10
1 x 10-11
1 x 10-12
Recommended Handling
Precautions
-6
-4
-2
0
2
4
RELATIVE INPUT OPTICAL POWER – dB
CONDITIONS:
1. 155 MBd
2. PRBS 27-1
3. TA = 25° C
4. VCC = 5 Vdc
5. INPUT OPTICAL RISE/FALL TIMES = 1.0/2.1 ns.
TRANSMITTER/RECEIVER RELATIVE OPTICAL
POWER BUDGET AT CONSTANT BER (dB)
Figure 6. Bit Error Ratio vs. Relative
Receiver Input Optical Power.
2.5
Data Link Jitter
Performance
2.0
The Hewlett-Packard 1300 nm data
link modules are designed to
operate per the system jitter
allocations stated in Table B1 of
Annex B of the ANSI T1E1.2
Revision 3 standard.
1.5
1.0
0.5
0
0.5
0
25
50
75 100 125 150 175 200
SIGNAL RATE (MBd)
CONDITIONS:
1. PRBS 27-1
2. DATA SAMPLED AT CENTER OF DATA SYMBOL.
3. BER = 10-6
4. TA = 25° C
5. VCC = 5 Vdc
6. INPUT OPTICAL RISE/FALL TIMES = 1.0/2.1 ns.
Figure 5. Transmitter/Receiver
Relative Optical Power Budget at
Constant BER vs. Signaling Rate.
192
The jitter specifications stated in
the following transmitter and
receiver specification table are
derived from the values in Table
B1 of Annex B. They represent the
worst-case jitter contribution that
the transmitter and receiver are
allowed to make to the overall
system jitter without violating the
Annex B allocation example. In
practice, the typical jitter
contribution of the HewlettPackard data link modules is well
below the maximum allowed
amounts.
The 1300 nm transmitter will
tolerate the worst-case input
electrical jitter allowed in Annex B
without violating the worst-case
output jitter requirements.
The 1300 nm receiver will tolerate
the worst-case input optical jitter
allowed in Annex B without
violating the worst-case output
electrical jitter allowed.
It is advised that normal static precautions be taken in the handling
and assembly of these data link
modules to prevent damage which
may be induced by electrostatic
discharge (ESD). The HFBR-1116/2116 series meets MIL-STD-883C
Method 3015.4 Class 2.
Care should be taken to avoid
shorting the receiver Data or
Signal Detect Outputs directly to
ground without proper currentlimiting impedance.
Solder and Wash Process
Compatibility
The transmitter and receiver are
delivered with protective process
caps covering the individual ST*
ports. These process caps protect
the optical subassemblies during
wave solder and aqueous wash
processing and act as dust covers
during shipping.
These data link modules are
compatible with either industry
standard wave- or hand-solder
processes.
Shipping Container
The data link modules are
packaged in a shipping container
designed to protect it from
mechanical and ESD damage
during shipment or storage.
Board Layout–Interface
Circuit and Layout
Guidelines
It is important to take care in the
layout of your circuit board to
achieve optimum performance
from these data link modules.
Figure 7 provides a good example
of a power supply filter circuit that
works well with these parts. Also,
Tx
*
A
L2
1
+5 Vdc
C2
0.1
GND
Rx
9 NC
NC 8
10 GND
NO 7
PIN
11 VCC
*
*
9 NC
NC 8
GND 7
GND 6
10 NO
PIN
11 GND
12 VCC
GND 5
12 GND
VCC 5
VCC 4
13 GND
GND 4
13 GND
14 D
GND 3
14 SD
D 3
DATA
15 D
VBB 2
15 SD
D 2
NC 1
NO
16 PIN
NC 1
R2
82
R4
130
R1
130
16 NC
*
L1
1
VCC 6
DATA
R3
82
suggested signal terminations for
the Data, Data-bar, Signal Detect
and Signal Detect-bar lines are
shown. Use of a multilayer,
ground-plane printed circuit board
will provide good high-frequency
circuit performance with a low
inductance ground return path. See
additional recommendations noted
in the interface schematic shown in
Figure 7.
C1
0.1
C7
10
(OPTIONAL)
C3
0.1
A
C4
10
DATA
DATA
R7
82
C6
0.1
R5
82
R8
130
R6
130
R9
82
C5
0.1
R11
82
SD
SD
TERMINATE D, D
AT Tx INPUTS
TOP VIEWS
R10
130
R12
130
TERMINATE D, D, SD, SD AT
INPUTS OF FOLLOW-ON DEVICES
NOTES:
1. RESISTANCE IS IN OHMS. CAPACITANCE IS IN MICROFARADS. INDUCTANCE IS IN MICROHENRIES.
2. TERMINATE TRANSMITTER INPUT DATA AND DATA-BAR AT THE TRANSMITTER INPUT PINS. TERMINATE THE RECEIVER OUTPUT DATA, DATA-BAR, AND SIGNAL DETECTBAR AT THE FOLLOW-ON DEVICE INPUT PINS. FOR LOWER POWER DISSIPATION IN THE SIGNAL DETECT TERMINATION CIRCUITRY WITH SMALL COMPROMISE TO THE
SIGNAL QUALITY, EACH SIGNAL DETECT OUTPUT CAN BE LOADED WITH 510 OHMS TO GROUND INSTEAD OF THE TWO RESISTOR, SPLIT-LOAD PECL TERMINATION
SHOWN IN THIS SCHEMATIC.
3. MAKE DIFFERENTIAL SIGNAL PATHS SHORT AND OF SAME LENGTH WITH EQUAL TERMINATION IMPEDANCE.
4. SIGNAL TRACES SHOULD BE 50 OHMS MICROSTRIP OR STRIPLINE TRANSMISSION LINES. USE MULTILAYER, GROUND-PLANE PRINTED CIRCUIT BOARD FOR BEST HIGHFREQUENCY PERFORMANCE.
5. USE HIGH-FREQUENCY, MONOLITHIC CERAMIC BYPASS CAPACITORS AND LOW SERIES DC RESISTANCE INDUCTORS. RECOMMEND USE OF SURFACE-MOUNT COIL
INDUCTORS AND CAPACITORS. IN LOW NOISE POWER SUPPLY SYSTEMS, FERRITE BEAD INDUCTORS CAN BE SUBSTITUTED FOR COIL INDUCTORS. LOCATE POWER
SUPPLY FILTER COMPONENTS CLOSE TO THEIR RESPECTIVE POWER SUPPLY PINS. C7 IS AN OPTIONAL BYPASS CAPACITOR FOR IMPROVED, LOW-FREQUENCY NOISE
POWER SUPPLY FILTER PERFORMANCE.
6. DEVICE GROUND PINS SHOULD BE DIRECTLY AND INDIVIDUALLY CONNECTED TO GROUND.
7. CAUTION: DO NOT DIRECTLY CONNECT THE FIBER-OPTIC MODULE PECL OUTPUTS (DATA, DATA-BAR, SIGNAL DETECT, SIGNAL DETECT-BAR, VBB) TO GROUND WITHOUT
PROPER CURRENT LIMITING IMPEDANCE.
8. (*) OPTIONAL METAL ST OPTICAL PORT TRANSMITTER AND RECEIVER MODULES WILL HAVE PINS 8 AND 9 ELECTRICALLY CONNECTED TO THE METAL PORT ONLY AND
NOT CONNECTED TO THE INTERNAL SIGNAL GROUND.
Figure 7. Recommended Interface Circuitry and Power Supply Filter Circuits.
193
Board Layout–Hole
Pattern
The Hewlett-Packard transmitter
and receiver hole pattern is
compatible with other data link
modules from other vendors. The
drawing shown in Figure 8 can be
used as a guide in the mechanical
layout of your circuit board.
(16X) ø 0.8 ± 0.1
.032 ± .004
–A–
Ø 0.000 M A
17.78
.700
(7X) 2.54
.100
7.62
.300
TOP VIEW
UNITS = mm/INCH
Figure 8. Recommended Board Layout Hole Pattern.
194
All HFBR-1116T LED transmitters
are classified as IEC-825-1
Accessible Emission Limit (AEL)
Class 1 based upon the current
proposed draft scheduled to go
into effect on January 1, 1997. AEL
Class 1 LED devices are
considered eye safe. See
Application Note 1094, LED
Device Classifications with
Respect to AEL Values as
Defined in the IEC 825-1
Standard and the European
EN60825-1 Directive.
The material used for the housing
in the HFBR-1116/-2116 series is
Ultem 2100 (GE). Ultem 2100 is
recognized for a UL flammability
rating of 94V-0 (UL File Number
E121562) and the CSA (Canadian
Standards Association) equivalent
(File Number LS88480).
∆λ – TRANSMITTER OUTPUT OPTICAL
SPECTRAL WIDTH (FWHM) –nm
These data link modules are
intended to enable commercial
system designers to develop
equipment that complies with the
various international regulations
governing certification of Information Technology Equipment.
Additional information is available
from your Hewlett-Packard sales
representative.
200
3.0
180
1.0
160
1.5
140
2.0
2.5
120
3.0
100
1260
1280
tr/f – TRANSMITTER
OUTPUT OPTICAL
RISE/FALL TIMES – ns
1300 1320 1340 1360
λC – TRANSMITTER OUTPUT OPTICAL
CENTER WAVELENGTH –nm
HFBR-1116T TRANSMITTER TEST RESULTS
OF λC, ∆λ AND tr/f ARE CORRELATED AND
COMPLY WITH THE ALLOWED SPECTRAL WIDTH
AS A FUNCTION OF CENTER WAVELENGTH FOR
VARIOUS RISE AND FALL TIMES.
Figure 9. HFBR-1116T Transmitter
Output Optical Spectral Width
(FWHM) vs. Transmitter Output
Optical Center Wavelength and Rise/
Fall Times.
RELATIVE INPUT OPTICAL POWER (dB)
Regulatory Compliance
5
4
3
2
1
0
-3
-2
-1
0
1
2
3
EYE SAMPLING TIME POSITION (ns)
CONDITIONS:
1.TA = 25° C
2. VCC = 5 Vdc
3. INPUT OPTICAL RISE/FALL TIMES = 1.0/2.1 ns.
4. INPUT OPTICAL POWER IS NORMALIZED TO
CENTER OF DATA SYMBOL.
5. NOTE 15 AND 16 APPLY.
Figure 10. HFBR-2116T Receiver
Input Optical Power vs. Eye Sampling
Time Position.
195
HFBR-1116T Transmitter Pin-Out Table
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Symbol
NC
VBB
GND
GND
GND
GND
OMIT
NC
NC
GND
VCC
VCC
GND
DATA
DATA
NC
Functional Description
No internal connect, used for mechanical strength only
VBB Bias output
Ground
Ground
Ground
Ground
No pin
No internal connect, used for mechanical strength only
No internal connect, used for mechanical strength only
Ground
Common supply voltage
Common supply voltage
Ground
Data input
Inverted Data input
No internal connect, used for mechanical strength only
Reference
Note 3
Note 3
Note 3
Note 3
Note 5
Note 5
Note 3
Note 1
Note 1
Note 3
Note 4
Note 4
HFBR-2116T Receiver Pin-Out Table
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Symbol
NC
DATA
DATA
VCC
VCC
VCC
GND
NC
NC
OMIT
GND
GND
GND
SD
SD
OMIT
Functional Description
No internal connect, used for mechanical strength only
Inverted Data input
Data input
Common supply voltage
Common supply voltage
Common supply voltage
Ground
No internal connect, used for mechanical strength only
No internal connect, used for mechanical strength only
No pin
Ground
Ground
Ground
Signal Detect
Inverted Signal Detect
No pin
Reference
Note 4
Note 4
Note 1
Note 1
Note 1
Note 3
Note 5
Note 5
Note 3
Note 3
Note 3
Note 2, 4
Note 2, 4
Notes:
1. Voltages on VCC must be from the same power supply (they are connected together internally).
2. Signal Detect is a logic signal that indicates the presence or absence of an input optical signal. A logic-high, VOH, on Signal Detect
indicates presence of an input optical signal. A logic-low, VOL, on Signal Detect indicates an absence of input optical signal.
3. All GNDs are connected together internally and to the internal shield.
4. DATA, DATA, SD, SD are open-emitter output circuits.
5. On metal-port modules, these pins are redefined as “Port Connection.”
196
Specifications–Absolute Maximum Ratings
Parameter
Storage Temperature
Lead Soldering Temperature
Lead Soldering Time
Supply Voltage
Data Input Voltage
Differential Input Voltage
Output Current
Symbol
TS
TSOLD
tSOLD
VCC
VI
VD
IO
Min.
-40
Typ.
-0.5
-0.5
Max.
100
260
10
7.0
VCC
1.4
50
Unit
°C
°C
sec.
V
V
V
mA
Reference
Max.
70
5.5
-1.475
-0.880
Unit
°C
V
V
V
Ω
Reference
Reference
Note 3
Note 5
Note 24
Note 1
Recommended Operating Conditions
Parameter
Ambient Operating Temperature
Supply Voltage
Data Input Voltage–Low
Data Input Voltage–High
Data and Signal Detect Output Load
Symbol
TA
VCC
VIL - VCC
VIH - VCC
RL
Min.
0
4.5
-1.810
-1.165
Typ.
50
Note 2
HFBR-1116T Transmitter Electrical Characteristics
(TA = 0°C to 70°C, VCC = 4.5 V to 5.5 V)
Parameter
Supply Current
Power Dissipation
Threshold Voltage
Data Input Current–Low
Data Input Current–High
Symbol
ICC
PDISS
VBB - VCC
IIL
I IH
Min.
-1.42
-350
Typ.
145
0.76
-1.3
0
14
Max.
185
1.1
-1.24
350
Unit
mA
W
V
µs
µs
Typ.
82
0.3
Unit
mA
W
V
V
ns
ns
V
Reference
Note 4
Note 5
Note 6
Note 6
Note 7
Note 7
Note 6
HFBR-2116T Receiver Electrical Characteristics
(TA = 0°C to 70°C, VCC = 4.5 V to 5.5 V)
Parameter
Supply Current
Power Dissipation
Data Output Voltage–Low
Data Output Voltage–High
Data Output Rise Time
Data Output Fall Time
Signal Detect Output
Voltage–Low (De-asserted)
Signal Detect Output
Voltage–High (Asserted)
Signal Detect Output Rise Time
Signal Detect Output Fall Time
Symbol
ICC
PDISS
VOL - VCC
VOH - VCC
tr
tf
VOL - VCC
Min.
-1.840
-1.045
0.35
0.35
-1.840
Max.
145
0.5
-1.620
-0.880
2.2
2.2
-1.620
VOH - VCC
-1.045
-0.880
V
Note 6
tr
tf
0.35
0.35
2.2
2.2
ns
ns
Note 7
Note 7
197
HFBR-1116T Transmitter Optical Characteristics
(TA = 0°C to 70°C, VCC = 4.5 V to 5.5 V)
Parameter
Output Optical Power
62.5/125 µm, NA = 0.275 Fiber
Output Optical Power
50/125 µm, NA = 0.20 Fiber
Optical Extinction Ratio
Symbol
PO, BOL
PO, EOL
PO, BOL
PO, EOL
Output Optical Power at Logic “0” State
PO(“0”)
Min.
-19
-20
-22.5
-23.5
Typ.
1380
Unit
dBm
avg.
dBm
avg.
%
dB
dBm
avg.
nm
0.6
137
58
1.0
3.0
nm
nm RMS
ns
0.6
2.1
3.0
ns
SJ
0.04
1.2
ns p-p
Note 23
Figure 9
Note 11, 23
Figure 9
Note 12, 23
Figure 9
Note 12, 23
Figure 9
Note 13
RJ
0
0.52
ns p-p
Note 14
Max.
-31
Unit
dBm
avg.
Reference
Note 15,
Figure 10
-31
dBm
avg.
Note 16,
Figure 10
dBm
avg.
Note 15
0.001
-50
Center Wavelength
λC
Spectral Width–FWHM
–nm RMS
Optical Rise Time
∆λ
1270
1310
tr
Optical Fall Time
tf
Systematic Jitter Contributed by
the Transmitter
Random Jitter Contributed by the
Transmitter
Max.
-14
-14
-14
-14
0.03
-35
-45
Reference
Note 8
Note 8
Note 9
Note 10
HFBR-2116T Receiver Optical Characteristics
(TA = 0°C to 70°C, VCC = 4.5 V to 5.5 V)
Parameter
Symbol
Input Optical Power
PIN Min. (W)
Minimum at Window Edge
Input Optical Power
Minimum at Eye Center
Input Optical Power Maximum
Min.
Typ.
PIN Min. (C)
PIN Max.
-14
Operating Wavelength
λ
1260
Systematic Jitter Contributed by
the Receiver
SJ
Random Jitter Contributed by the
Receiver
RJ
Signal Detect–Asserted
PA
PD+1.5 dB
Signal Detect–Deasserted
PD
Signal Detect–Hysteresis
1360
nm
0.2
1.2
ns p-p
Note 17
1
1.91
ns p-p
Note 18
-31
dBm
avg.
Note 19
-45
dBm
avg.
Note 20
PA-PD
1.5
dB
Signal Detect Assert Time
(off to on)
tSDA
0
55
100
µs
Note 21
Signal Detect De-assert Time
(on to off)
tSDD
0
110
350
µs
Note 22
198
Notes:
1. This is the maximum voltage that can
be applied across the Differential
Transmitter Data Inputs to prevent
damage to the input ESD protection
circuit.
2. The outputs are terminated with 50 Ω
connected to VCC - 2 V.
3. The power supply current needed to
operate the transmitter is provided to
differential ECL circuitry. This
circuitry maintains a nearly constant
current flow from the power supply.
Constant current operation helps to
prevent unwanted electrical noise
from being generated and conducted
or emitted to neighboring circuitry.
4. This value is measured with the outputs terminated into 50 Ω connected
to VCC - 2 V and an Input Optical
Power level of -14 dBm average.
5. The power dissipation value is the
power dissipated in the transmitter
and receiver itself. Power dissipation
is calculated as the sum of the products of supply voltage and currents,
minus the sum of the products of the
output voltages and currents.
6. This value is measured with respect to
VCC with the output terminated into
50 Ω connected to VCC - 2 V.
7. The output rise and fall times are
measured between 20% and 80%
levels with the output connected to
VCC - 2 V through 50 Ω.
8. These optical power values are
measured with the following
conditions:
• The Beginning of Life (BOL) to the
End of Life (EOL) optical power
degradation is typically 1.5 dB per
the industry convention for long
wavelength LEDs. The actual
degradation observed in HewlettPackard’s 1300 nm LED products
is < 1 dB, as specified in this data
sheet.
• Over the specified operating
voltage and temperature ranges.
• With 25 MBd (12.5 MHz squarewave) input signal.
• At the end of one meter of noted
optical fiber with cladding modes
removed.
The average power value can be
converted to a peak power value by
adding 3 dB. Higher output optical
power transmitters are available on
special request.
9. The Extinction Ratio is a measure of
the modulation depth of the optical
signal. The data “0” output optical
power is compared to the data “1”
peak output optical power and
expressed as a percentage. With the
transmitter driven by a 25 MBd
10.
11.
12.
13.
14.
15.
(12.5 MHz square-wave) signal, the
average optical power is measured.
The data “1” peak power is then
calculated by adding 3 dB to the
measured average optical power. The
data “0” output optical power is found
by measuring the optical power when
the transmitter is driven by a logic “0”
input. The extinction ratio is the ratio
of the optical power at the “0” level
compared to the optical power at the
“1” level expressed as a percentage or
in decibels.
The transmitter will provide this low
level of Output Optical Power when
driven by a logic “0” input. This can
be useful in link troubleshooting.
The relationship between Full Width
Half Maximum and RMS values for
Spectral Width is derived from the
assumption of a Gaussian shaped
spectrum which results in a 2.35 X
RMS = FWHM relationship.
The optical rise and fall times are
measured from 10% to 90% when the
transmitter is driven by a 25 MBd
(12.5 MHz square-wave) input signal.
The ANSI T1E1.2 committee has
designated the possibility of defining
an eye pattern mask for the transmitter output optical power as an
item for further study. HP will
incorporate this requirement into the
specifications for these products if it
is defined. The HFBR-1116T
transmitter typically complies with
the template requirements of CCITT
(now ITU-T) G.957 Section 3.25,
Figure 2 for the STM-1 rate,
excluding the optical receiver filter
normally associatd with single-mode
fiber measurements which is the
likely source for the ANSI T1E1.2
committee to follow in this matter.
Systematic Jitter contributed by the
transmitter is defined as the
combination of Duty Cycle Distortion
and Data Dependent Jitter.
Systematic Jitter is measured at 50%
threshold using a 155.52, 27 - 1
pseudo-random bit stream data
pattern input signal.
Random Jitter contributed the the
transmitter is specified with a 155.52
MBd (77.5 MHz square-wave) input
signal.
This specification is intended to
indicate the performance of the
receiver when Input Optical Power
signal characteristics are present per
the following definitions. The Input
Optical Power dynamic range from
the minimum level (with a window
time-width) to the maximum level is
the range over which the receiver is
guaranteed to provide output data
16.
17.
18.
19.
20.
21.
22.
23.
24.
with a Bit-Error-Ratio (BER) better
than or equal to 2.5 x 10-10.
• At the Beginning of Life (BOL).
• Over the specified operating
voltage and temperature ranges.
• Input is a 155.52 MBd, 223 - 1
PRBS data pattern with a 72 “1”s
and 72 “0”s inserted per the CCITT
(now ITU-T) recommendation
G.958 Appendix 1.
• Receiver data window time-width is
1.23 ns or greater for the clock
recovery circuit to operate in. The
actual test window time-width is set
to simulate the effect of worst-case
input optical jitter based on the
transmitter jitter values from the
specification tables. The test
window time-width is 3.32 ns.
All conditions of Note 15 apply
except that the measurement is made
at the center of the symbol with now
window time-width.
Systematic Jitter contributed by the
receiver is defined as the combination
of Duty Cycle Distortion and Data
Dependent Jitter. The input optical
power level is at the maximum of
“PIN Min. (W).” Systematic Jitter is
measured at 50% threshold using a
155.52 MBd (77.5 MHz square-wave),
27 - 1 pseudo-random bit stream data
pattern input signal.
Random Jitter contributed by the
receiver is specified with a 155.52
MBd (77.5 MHz square-wave) input
signal.
This value is measured during the
transition from low to high levels of
input optical power.
This value is measured during the
transition from high to low levels of
input optical power.
The Signal Detect output shall be
asserted, logic-high (VOH), within
100 µs after a step increase of the
Input Optical Power.
Signal Detect output shall be
deasserted, logic-low (VOL), within
350 µs after a step decrease in the
Input Optical Power.
The HFBR-1116T transmitter complies with the requirements for the
tradeoffs between center wavelength,
spectral width, and rise/fall times
shown in Figure 9. This figure is
derived from the FDDI PMD standard
(ISO/IEC 9314-3: 1990 and ANSI
X3.166 - 1990) per the description in
ANSI T1E1.2 Revision 3. The
interpretation of this figure is that
values of Center Wavelength and
Spectral Width must lie along the
appropriate Optical Rise/Fall Time
curve.
This value is measured with an
output load RL = 10 kΩ.
199
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