FILTRONIC FPD1500SOT89CE

FPD1500SOT89
Datasheet v3.0
LOW NOISE HIGH LINEARITY PACKAGED PHEMT
PACKAGE:
FEATURES (1850MHZ):
•
•
•
•
•
•
RoHS
27.5 dBm Output Power (P1dB)
17 dB Small-Signal Gain (SSG)
1.2 dB Noise Figure
42 dBm Output IP3
50% Power-Added Efficiency
FPD1500SOT89E - RoHS compliant
9
GENERAL DESCRIPTION:
The FPD1500SOT89 is a packaged depletion
mode AlGaAs/InGaAs pseudomorphic High
Electron Mobility Transistor (pHEMT). It
utilizes a 0.25 µm x 1500 µm Schottky barrier
gate, defined by high-resolution stepper-based
photolithography. The double recessed gate
structure minimizes parasitics to optimize
performance, with an epitaxial structure
designed for improved linearity over a range of
bias conditions and i/p power levels.
TYPICAL APPLICATIONS:
•
•
•
Drivers or output stages in PCS/Cellular
base station transmitter amplifiers
High intercept-point LNAs
WLL and WLAN systems, and other types
of wireless infrastructure systems.
ELECTRICAL SPECIFICATIONS:
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Power at 1dB Gain Compression
P1dB
VDS = 5 V; IDS = 50% IDSS
26.0
27.5
dBm
Small-Signal Gain
SSG
VDS = 5 V; IDS = 50% IDSS
15.5
17
dB
Power-Added Efficiency
PAE
VDS = 5 V; IDS = 50% IDSS;
50
%
POUT = P1dB
Noise Figure
NF
VDS = 5 V; IDS = 50% IDSS
1.0
1.2
dB
VDS = 5 V; IDS = 25% IDSS
Output Third-Order Intercept Point
IP3
(from 15 to 5 dB below P1dB)
VDS = 5V; IDS = 50% IDSS
Matched for optimal power
38
Matched for best IP3
40
dBm
42
Saturated Drain-Source Current
IDSS
VDS = 1.3 V; VGS = 0 V
375
465
550
mA
Maximum Drain-Source Current
IMAX
VDS = 1.3 V; VGS ≅ +1 V
750
mA
Transconductance
GM
VDS = 1.3 V; VGS = 0 V
400
mS
Gate-Source Leakage Current
IGSO
VGS = -5 V
1
15
µA
Pinch-Off Voltage
|VP|
VDS = 1.3 V; IDS = 1.5 mA
0.7
1.0
1.3
V
Gate-Source Breakdown Voltage
|VBDGS|
IGS = 1.5 mA
12
16
V
Gate-Drain Breakdown Voltage
|VBDGD|
IGD = 1.5 mA
12
16
V
Thermal Resistance
RθJC
60
°C/W
Note: TAMBIENT = 22°; RF specification measured at f = 1850 MHz using CW signal (except as noted)
1
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Filtronic Compound Semiconductors Ltd
Fax: +44 (0) 1325 306177
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FPD1500SOT89
Datasheet v3.0
1
ABSOLUTE MAXIMUM RATING :
PARAMETER
SYMBOL
TEST CONDITIONS
ABSOLUTE MAXIMUM
Drain-Source Voltage
VDS
-3V < VGS < +0V
8V
Gate-Source Voltage
VGS
0V < VDS < +8V
-3V
Drain-Source Current
IDS
For VDS < 2V
IDSS
Gate Current
IG
Forward or reverse current
15mA
PIN
Under any acceptable bias state
350mW
Channel Operating Temperature
TCH
Under any acceptable bias state
175°C
Storage Temperature
TSTG
Non-Operating Storage
-55°C to 150°C
Total Power Dissipation
PTOT
See De-Rating Note below
2.3W
Comp.
Under any bias conditions
5dB
RF Input Power
2
Gain Compression
Simultaneous Combination of Limits
3
2 or more Max. Limits
Notes:
1
TAmbient = 22°C unless otherwise noted; exceeding any one of these absolute maximum ratings may cause
permanent damage to the device
2
Max. RF Input Limit must be further limited if input VSWR > 2.5:1
3
Users should avoid exceeding 80% of 2 or more Limits simultaneously
4
Total Power Dissipation defined as: PTOT ≡ (PDC + PIN) – POUT,
where PDC: DC Bias Power, PIN: RF Input Power, POUT: RF Output Power
Total Power Dissipation to be de-rated as follows above 22°C:
PTOT= 2.3 - (0.016W/°C) x TPACK
where TPACK= source tab lead temperature above 22°C
(coefficient of de-rating formula is the Thermal Conductivity)
Example: For a 65°C carrier temperature: PTOT = 2.3W – (0.016 x (65 – 22)) = 1.61W
BIASING GUIDELINES:
•
•
•
Active bias circuits provide good performance stabilization over variations of operating
temperature, but require a larger number of components compared to self-bias or dual-biased.
Such circuits should include provisions to ensure that Gate bias is applied before Drain bias.
Dual-bias circuits are relatively simple to implement, but will require a regulated negative voltage
supply for depletion-mode devices.
For standard class A operation, a 50% of IDSS bias point is recommended. A small amount of
RF gain expansion prior to the onset of compression is normal for this operating point. A class
A/B Bias of 25-33% of IDSS to achieve better OIP3, and Noise Figure performance is suggested.
2
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Filtronic Compound Semiconductors Ltd
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FPD1500SOT89
Datasheet v3.0
FREQUENCY RESPONSE:
Biased @ 5V, 200mA
Biased @ 5V 50%IDSS
35
1.4
MSG
1.2
S21
Noise FIgure (dB)
15
10
1
0.8
0.6
0.4
N.F. (dB)
0.2
5
5.7
5.3
4.9
4.5
4.1
3.7
8
3.3
7.5
2.9
6.5
2.5
3.5
4.5
5.5
Frequency (GHz)
2.1
2.5
1.7
1.5
0.5
0.5
1.3
0
0
0.9
MSG
20
Mag S21
25
&
30
Frequency (GHz)
Note: Device tuned for minimum noise figure
TEMPERATURE RESPONSE:
Biased @ 5V, 33%IDSS
Data taken on Eval board @ 1.85GHz
Temperature (C)
Temperature (C)
Note: Evaluation board tuned for maximum power
3
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90
80
70
60
(dB)
50
90
80
70
60
50
40
30
20
10
0
-10
-20
12.0
N.F.
40
13.0
30
SSG (dB)
P1dB (dBm)
20
14.0
10
15.0
0
16.0
.70
.60
.50
.40
.30
.20
.10
.00
-10
SSG (dB)
17.0
-20
30.0
29.0
28.0
27.0
26.0
25.0
24.0
23.0
22.0
21.0
20.0
P1dB (dBm)
18.0
Noise Figure (dB)
Biased @ 5V, 50% IDSS
Data taken on Eval Board at 1.85GHz
FPD1500SOT89
Datasheet v3.0
TYPICAL TUNED RF PERFORMANCE:
Drain Efficiency and PAE
Power Transfer Characteristic
3.50
29.00
70.00%
Pout
Comp Point
70.00%
3.00
27.00
60.00%
60.00%
2.50
PAE
Eff.
1.00
19.00
17.00
.50
15.00
.00
13.00
-2.00
0.00
2.00
4.00
6.00
8.00
10.00
12.00
50.00%
50.00%
40.00%
40.00%
30.00%
30.00%
20.00%
20.00%
10.00%
10.00%
.00%
-2.00
-.50
16.00
14.00
0.00
2.00
4.00
6.00
8.00
10.00
12.00
14.00
Drain Efficiency (%)
1.50
21.00
PAE (%)
2.00
23.00
Gain Compression (dB)
Output Power (dBm)
25.00
.00%
16.00
Input Power (dBm)
Input Power (dBm)
NOTE: Typical power and efficiency is shown above. The devices were biased nominally at VDS = 5V, IDS
= 50% of IDSS, at a test frequency of 1.85 GHz. The test devices were tuned (input and output tuning) for
maximum output power at 1dB gain compression.
Typical Intermodulation Performance
VDS = 5V IDS = 50% IDSS at f = 1.85GHz
-10.00
25.00
-15.00
Output Power (dBm)
-25.00
-30.00
21.00
-35.00
19.00
-40.00
3rd Oder IM Poroducts (dBc)
-20.00
23.00
-45.00
17.00
-50.00
15.00
-55.00
-1.00
1.00
3.00
5.00
7.00
9.00
11.00
Input Power (dBm)
Pout
Im3, dBc
Note:
pHEMT
devices have
enhanced
intermodulation performance. This yields OIP3
values of about P1dB + 14dBm. This IMD
enhancement is affected by the quiescent bias and
the matching applied to the device.
TYPICAL I-V CHARACTERISTICS
DC IV Curves FPD1500SOT89
0.60
Note: The recommended method for measuring IDSS, or
any particular IDS, is to set the Drain-Source voltage (VDS)
at 1.3V. This measurement point avoids the onset of
spurious self-oscillation which would normally distort the
current measurement (this effect has been filtered from
the I-V curves presented above). Setting the VDS > 1.3V
will generally cause errors in the current measurements,
even in stabilized circuits.
Drain-Source Current (A)
0.50
0.40
VG=-1.5V
VG-1.25V
VG=-1.00V
VG=-0.75V
VG=-0.5V
VG=-0.25V
VG=0V
0.30
0.20
0.10
0.00
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
Drain-Source Voltage (V)
4
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Filtronic Compound Semiconductors Ltd
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Email: [email protected]
Website: www.filtronic.com
FPD1500SOT89
Datasheet v3.0
TYPICAL OUTPUT PLANE POWER CONTOURS (VDS = 5v, IDS = 50%IDSS) :
Swp Max
159
1.
0
0.
8
0.
6
2.
0
Swp Max
123
1.
0
0.
8
0.
6
2.
0
0.4
0.4
3.0
3.0
22dBm
4.0
5.0
0.2
0.2
23dBm
24dBm
0
25dBm
10.0
0.
2
0.
26dBm
4
0.
6
0. 1.
0
8
2.
0
10
.0
3. 4. 5.
0 0 0
0.
2
0
4.0
5.0
23dBm
24dBm
25dBm
26dBm
0.
27dBm
4
0.
6
10.0
2.
0
0. 1.
0
8
10
.0
3. 4. 5.
0 0 0
28dBm
27dBm
-10.0
-10.0
28dBm
-0.2
-0.2
-5.0
-4.0
-5.0
-4.0
-3.0
-0.4
-0.4
0.
6
22dBm
2.
0
0.
8
1.
0
0.
6
Swp Min
1
-3.0
2.
0
0.
8
1.
0
Swp Min
1
900 MHz
Contours swept with a constant input power,
set so that optimum P1dB is achieved at the
point of output match.
Input (Source plane) Γs:
0.67 ∠ 103.6º
0.30 + j0.74 (normalized)
15 + j37.0 Ω
Nominal IP3 performance is obtained with
this input plane match, and the output plane
match as shown.
1850 MHz
Contours swept with a constant input power,
set so that optimum P1dB is achieved at the
point of output match.
Input (Source plane) Γs:
0.74 ∠ 168.2º
0.15 + j0.1 (normalized)
7.5 + j5.0 Ω
Nominal IP3 performance is obtained with this
input plane match, and the output plane
match as shown.
TYPICAL SCATTERING PARAMETERS (50Ω SYSTEM):
FPD1500SOT89 5V / 50%IDSS
1.0
0.8
6 GHz
5 GHz
0.4
0
3.
0.
4
3.5 GHz
3.0
0
4.
5 .0
0.2
2.5 GHz
5 GHz
4 GHz
0.2
10.0
5.0
4.0
3.0
2.0
1.0
0.8
0.6
0.4
6 GHz
4.0
7 GHz
5.0
3 GHz
10.0
0.2
0
2.
0
7 GHz
4 GHz
3 GHz
2 GHz
Swp Max
8GHz
1.
0
0.
8
0.
6
2.
0
6
0.
FPD1500SOT89 5V / 50%IDSS
Swp Max
8GHz
0.
2
0
10.0
0.
0.
24 GHz 6
0.
8
1.
0
2.
0
10
.0
3. 4. 5.
0 0 0
1 GHz
-10.0
-10.0
1.5 2GHz
-0.2
-5.0
- 5.
-0.
-4.0
0
-4
.0
-3
.0
.4
-0
-1.0
-0.8
-0
.6
S11
-3.0
-0.4
.0
-2
1 GHz
S22
Swp Min
0.5GHz
0.
6
0.
8
2.
0
1.
0
Swp Min
0.5GHz
5
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Filtronic Compound Semiconductors Ltd
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Email: [email protected]
Website: www.filtronic.com
FPD1500SOT89
Datasheet v3.0
STATISTICAL SAMPLE OF RF PERFORMANCE:
Noise Figure
Small Signal Gain
5000
4000
Count
Count
6000
14000
12000
10000
8000
6000
4000
2000
0
3000
2000
1000
13
14
15
16
17
0
18
0.6
Gain (dB)
0.8
0.9
1
1.1
1.2
1.3
NF (dB)
rd
Output Power at 1dB Gain Compression
Output 3 -Order Intercept Point
14000
6000
12000
5000
10000
4000
Count
Count
0.7
8000
6000
3000
2000
4000
1000
2000
0
0
23
24
25
26
27
30
28
32
34
36
38
40
42
44
IP3 (dBm)
P1dB (dBm)
Note: The devices were tested by a high-speed automatic test system, in a matched circuit based on 2GHz
Evaluation Board. This circuit is a dual-bias single-pole lowpass topology, and the devices were biased at VDS =
4.5V, IDS = 120mA, Test Frequency = 2.0GHz. The performance data is summarized below:
Parameter
Median
Standard Deviation
Test Limit
CPK
Small-Signal Gain
15.5
0.20
14.5
1.7
Noise Figure
0.91
0.03
1.20
3.2
Output Power (P1dB)
rd
3 -Order Intercept
25.2
0.25
24.5
0.93
38.7
1.1
36.5
0.67
6
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Filtronic Compound Semiconductors Ltd
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FPD1500SOT89
Datasheet v3.0
REFERENCE DESIGN 0.9GHZ
FREQUENCY
GHZ
0.9
Gain
P1dB
OIP31
N.F.
S11
S22
Vd
Vg
Id
dB
dBm
dBm
dB
dB
dB
V
V
mA
20
27
39
0.7
-5
-15
5
-0.4 to -0.6
200
1. Measured at 15dBm per tone
Board Layout
Vg
Vd
33pF
0.01uF
20O
Lg
33pF
33pF
L1
Q1
0.01uF
+ 1.0uF
+
Ld
C1
33pF
0.63"
L2
1.45"
Component Values
Component
Value
Description
Lg
47nH
LL1608 Toko chip inductor
Ld
47nH
LL1608 Toko chip inductor
L1
12nH
LL1005 Toko chip inductor
L2
4.7nH
LL1005 Toko chip inductor
Schematic
-Vg
Vd
0.01uF
1.0uF
33pF
0.01uF
33pF
20 Ohm
33pF
C1
5.6pF
ATC 600S chip capacitor
Eval board material - 31mil thick FR4 with 1/2 Ounce Cu on
both sides
47 nH
L1
RF IN
47 nH
33pF
C1
RF OUT
L2
D.C. Blocking capacitors are ATC series 600S. A tantalum 1.0µF is used at the drain terminal. All
other capacitors are 0603 and 0805 standard chip capacitors. A 0603 size 20 Ohm Chip resistor from
Vishay is used on the gate D.C. bias line for stability.
7
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Filtronic Compound Semiconductors Ltd
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FPD1500SOT89
Datasheet v3.0
REFERENCE DESIGN 1.85GHZ
FREQUENCY
GHZ
1.85
Gain
P1dB
OIP31
N.F.
S11
S22
Vd
Vg
Id
dB
dBm
dBm
dB
dB
dB
V
V
mA
16
27
41
0.9
-9
-14
5
-0.4 to -0.6
200
1. Measured 15dBm per tone
Board Layout
Vg
Vd
33pF
0.01uF
20O
Lg
33pF
0.01uF
33pF
Ld
Q1
L1
+ 1.0uF
+
C1
33pF
0.63"
L2
1.45"
Component Values
Component
Value
Description
Lg
Ld
L1
L2
C1
27nH
27nH
1.5nH
4.7nH
2.2pF
LL1608 Toko chip inductor
LL1608 Toko chip inductor
LL1005 Toko chip inductor
LL1005 Toko chip inductor
ATC 600S chip capacitor
-Vg
Schematic
Vd
0.01uF
1.0uF
33pF
0.01uF
33pF
20 Ohm
33pF
27 nH
L1
RF IN
Eval board material - 31mil thick FR4 with 1/2 Ounce Cu on
both sides
27 nH
33pF
C1
RF OUT
L2
D.C. Blocking capacitors are ATC series 600S. A tantalum 1.0µF is used at the drain terminal. All
other capacitors are 0603 and 0805 standard chip capacitors. A 0603 size 20 Ohm Chip resistor from
Vishay is used on the gate D.C. bias line for stability.
8
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Specifications subject to change without notice
Filtronic Compound Semiconductors Ltd
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Email: [email protected]
Website: www.filtronic.com
FPD1500SOT89
Datasheet v3.0
REFERENCE DESIGN 2.4 TO 2.6GHZ
FREQUENCY
Gain
P1dB
OIP31
N.F.
S11
S22
Vd
Vg
Id
GHZ
2.4
2.6
dB
12.5
12.4
dBm
28
28
dBm
39
40
dB
1.0
0.9
dB
-14
-16
dB
-5
-6
V
5
5
V -0.4 to -0.6 -0.4 to -0.6
mA
200
200
1. Measured at 15dBm per tone
Board Layout
Vg
Vd
33pF
0.01uF
33pF
20O
Lg
33pF
L1
Q1
0.01uF
+ 1.0uF
+
Ld
C2
33pF
0.63"
L2
C1
1.45"
Component Values
Component
Value
Description
Lg
Ld
L1
L2
C1 & C2
18nH
18nH
0.0nH
3.9nH
1.0pF
LL1608 Toko chip inductor
LL1608 Toko chip inductor
No Component (Cu Tab)
Schematic
-Vg
Vd
0.01uF
1.0uF
0.01uF
33pF
20 Ohm
LL1005 Toko chip inductor
ATC 600S chip capacitor
33pF
RF IN
Eval board material - 31mil thick FR4 with 1/2 Ounce Cu on
both sides
18 nH
33pF
18 nH
C2
C1
33pF
RF OUT
L2
D.C. Blocking capacitors are ATC series 600S. A tantalum 1.0µF is used at the drain terminal. All
other capacitors are 0603 and 0805 standard chip capacitors. A 0603 size 20 Ohm Chip resistor from
Vishay is used on the gate D.C. bias line for stability.
9
Tel: +44 (0) 1325 301111
Specifications subject to change without notice
Filtronic Compound Semiconductors Ltd
Fax: +44 (0) 1325 306177
Email: [email protected]
Website: www.filtronic.com
FPD1500SOT89
Datasheet v3.0
S-PARAMETERS: BIASED @ 5V, 50%IDSS:
FREQ[GHz]
0.500
0.750
1.000
1.250
1.500
1.750
2.000
2.250
2.500
2.750
3.000
3.250
3.500
3.750
4.000
4.250
4.500
4.750
5.000
5.250
5.500
5.750
6.000
6.250
6.500
6.750
7.000
7.250
7.500
7.750
8.000
8.250
8.500
8.750
9.000
9.250
9.500
9.750
10.000
10.250
10.500
10.750
11.000
11.250
11.500
11.750
12.000
S11m
0.865
0.763
0.728
0.714
0.701
0.694
0.692
0.684
0.685
0.683
0.681
0.692
0.690
0.698
0.706
0.711
0.730
0.742
0.757
0.765
0.769
0.790
0.847
0.830
0.850
0.826
0.829
0.828
0.823
0.836
0.855
0.858
0.855
0.863
0.874
0.875
0.885
0.890
0.895
0.897
0.899
0.902
0.902
0.907
0.913
0.912
0.908
S11a
-91.9
-118.7
-136.4
-149.6
-162.1
-171.3
179.8
171.3
163.7
155.8
148.1
141.4
134.1
127.7
120.8
114.3
108.9
103.2
98.2
92.4
87.7
83.4
77.1
73.0
67.3
63.8
60.2
56.4
52.8
48.9
44.5
38.3
32.9
27.9
22.0
16.9
11.9
7.4
3.8
0.5
-2.9
-5.6
-8.1
-10.5
-13.5
-16.4
-19.4
S21m
18.828
14.373
11.562
9.707
8.254
7.225
6.460
5.820
5.320
4.884
4.506
4.199
3.913
3.651
3.418
3.207
3.018
2.834
2.672
2.531
2.408
2.300
2.263
2.139
2.046
1.926
1.839
1.763
1.698
1.641
1.580
1.512
1.442
1.374
1.311
1.247
1.182
1.124
1.069
1.012
0.975
0.928
0.894
0.865
0.845
0.822
0.806
S21a
121.6
107.4
95.9
87.0
79.1
71.2
64.2
57.4
50.7
44.6
37.8
31.4
25.1
18.8
12.7
6.5
0.8
-5.0
-10.6
-16.1
-21.7
-26.9
-33.3
-38.4
-45.2
-49.9
-54.7
-59.5
-64.6
-69.8
-75.7
-81.5
-86.8
-92.3
-97.5
-102.5
-107.8
-112.5
-117.4
-121.7
-126.0
-130.2
-134.3
-138.4
-142.1
-146.4
-150.7
S12m
0.027
0.033
0.038
0.043
0.047
0.052
0.057
0.061
0.067
0.071
0.076
0.080
0.085
0.089
0.093
0.096
0.100
0.102
0.105
0.108
0.111
0.114
0.121
0.122
0.124
0.125
0.127
0.128
0.130
0.133
0.135
0.135
0.136
0.136
0.136
0.135
0.134
0.133
0.131
0.128
0.125
0.120
0.117
0.115
0.114
0.114
0.117
S12a
52.3
46.3
42.6
39.6
37.4
34.6
32.1
29.4
26.1
23.5
19.7
16.0
12.4
8.5
4.6
0.5
-3.5
-7.4
-11.1
-14.6
-18.6
-22.2
-27.1
-30.6
-36.0
-39.1
-42.7
-46.1
-49.9
-54.2
-58.9
-63.5
-68.0
-72.8
-77.2
-81.6
-86.4
-91.4
-96.4
-101.8
-106.8
-111.1
-114.6
-118.0
-120.9
-124.3
-128.3
S22m
0.293
0.287
0.293
0.285
0.284
0.288
0.279
0.279
0.271
0.273
0.273
0.276
0.290
0.302
0.318
0.335
0.349
0.367
0.381
0.396
0.406
0.417
0.457
0.457
0.476
0.471
0.471
0.470
0.477
0.491
0.507
0.531
0.552
0.575
0.596
0.618
0.637
0.652
0.663
0.673
0.680
0.693
0.698
0.701
0.695
0.691
0.684
S22a
-130.2
-141.8
-154.9
-162.6
-172.6
-178.7
175.2
168.4
161.9
153.9
147.1
138.5
131.2
124.2
118.0
112.5
107.0
101.4
96.3
91.7
87.3
83.2
79.0
75.1
68.2
62.2
55.5
50.2
44.5
39.2
33.8
29.3
24.7
21.2
17.7
15.4
13.0
11.0
8.0
5.1
2.5
0.0
-2.9
-6.0
-9.7
-13.3
-18.1
10
Tel: +44 (0) 1325 301111
Specifications subject to change without notice
Filtronic Compound Semiconductors Ltd
Fax: +44 (0) 1325 306177
Email: [email protected]
Website: www.filtronic.com
FPD1500SOT89
Datasheet v3.0
PACKAGE OUTLINE:
(dimensions in millimeters – mm)
TAPE DIMENSIONS AND PART ORIENTATION:
FWYN
● Also available with horizontal
part orientation
● Hub diameter = 80mm
● Devices per reel = 1000
11
Tel: +44 (0) 1325 301111
Specifications subject to change without notice
Filtronic Compound Semiconductors Ltd
Fax: +44 (0) 1325 306177
Email: [email protected]
Website: www.filtronic.com
FPD1500SOT89
Datasheet v3.0
DEVICE FOOT PRINT:
APPLICATION NOTES & DESIGN DATA:
Application Notes and design data including Sparameters, noise parameters and device
model are available on request.
RELIABILITY:
A MTTF of 7.4 million hours at a channel
temperature of 150°C is achieved for the
process used to manufacture this device.
DISCLAIMERS:
This product is not designed for use in any
space based or life sustaining/supporting
equipment.
Units in inches
NOTE: Drawing available on Website
ORDERING INFORMATION:
PREFERRED ASSEMBLY INSTRUCTIONS:
This package is compatible with both lead free
and leaded solder reflow processes as defined
within IPC/JEDEC J-STD-020C. The maximum
package temperature should not exceed
260°C.
HANDLING PRECAUTIONS:
PART
NUMBER
DESCRIPTION
FPD1500SOT89
Packaged pHEMT
FPD1500SOT89E
RoHS Compliant Packaged pHEMT
FPD1500SOT89CE
RoHS Compliant Packaged pHEMT with
enhanced passivation (Recommended for New
To avoid damage to
the
devices
care
should be exercised
during
handling.
Proper
Electrostatic
Discharge
(ESD)
precautions should be observed at all stages of
storage, handling, assembly, and testing.
Designs)
ESD/MSL RATING:
These devices should be treated as Class 0 (0250 V) using the human body model as
defined in JEDEC Standard No. 22-A114.
EB1500SOT89(E)-BB
0.9 GHz evaluation board
EB1500SOT89(E)-BA
1.85 GHz evaluation board
EB1500SOT89(E)-BC
2.0 GHz evaluation board
EB1500SOT89(E)-BD
2.2 GHz evaluation board
EB1500SOT89(E)-BE
2.4 GHz evaluation board
EB1500SOT89(E)-BG
2.6 GHz evaluation board
EB1500SOT89(E)-AJ
5.3-5.75 GHz evaluation board
The device has a MSL rating of Level 2. To
determine this rating, preconditioning was
performed to the device per, the Pb-free solder
profile defined within IPC/JEDEC J-STD-020C,
Moisture / Reflow sensitivity classification for
non-hermatic solid state surface mount
devices.
12
Tel: +44 (0) 1325 301111
Specifications subject to change without notice
Filtronic Compound Semiconductors Ltd
Fax: +44 (0) 1325 306177
Email: [email protected]
Website: www.filtronic.com