FUJI 7MBP25TEA120

Lot No.
Package type : P622
MS6M 00765
25A
1200V JAPAN
7M BP25 TEA1 20
O
Dimensions in mm
Odered No. in monthly
Manufactured month
(Jan.~Sep.:1~9,Oct.:O,Nov.:N,Dec.:D)
Last digit of manufactured year
Indication of Lot No.
1.□は理論寸法を示す。
"□" means theoretical dimensions.
2.端子ピッチは根元寸法とする。
The dimensions of the terminals are defined at the bottom.
3.( )内寸法は、参考値とする。
The dimensions in ( ) means referential values.
注)
Notes
1. Package Outline Drawings
a
3
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2.Pin Descriptions 端子定義
Main circuit 主回路
Symbol
Description
P
Positive input supply voltage.
U
Output (U).
V
Output (V).
W
Output (W).
N
Negative input supply voltage.
B
Collector terminal of Brake IGBT.
Control circuit 制御回路
№
Symbol
①
GNDU High side ground (U).
②
ALMU
Alarm signal output (U).
③
VinU
Logic input for IGBT gate drive (U).
④
VccU
High side supply voltage (U).
⑤
GNDV High side ground (V).
⑥
ALMV
Alarm signal output (V).
⑦
VinV
Logic input for IGBT gate drive (V).
⑧
VccV
High side supply voltage (V).
⑨
GNDW High side ground (W).
⑩
ALMW Alarm signal output (W).
⑪
VinW
Logic input for IGBT gate drive (W).
⑫
VccW
High side supply voltage (W).
⑬
GND
Low side ground.
⑭
Vcc
Low side supply voltage.
⑮
Description
VinDB Logic input for Brake IGBT gate drive.
⑯
VinX
Logic input for IGBT gate drive (X).
⑰
VinY
Logic input for IGBT gate drive (Y).
⑱
VinZ
Logic input for IGBT gate drive (Z).
⑲
ALM
Low side alarm signal output.
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3. Block Diagram
P
VccU
4
VinU
3
Pre- Driver
ALMU 2
RALM 1.5k
Vz
GNDU 1
VccV
8
VinV
7
U
Pre- Driver
ALMV 6
RALM 1.5k
Vz
GNDV 5
VccW
12
VinW
11
ALMW
10
V
Pre- Driver
RALM 1.5k
Vz
GNDW 9
Vcc
14
VinX
16
W
Pre- Driver
Vz
GND
VinY
13
17
Pre- Driver
Vz
VinZ
18
Pre- Driver
Vz
B
VinDB
15
ALM
19
Pre- Driver
RALM 1.5k
Vz
N
Pre-drivers include following functions
1.Amplifier for driver
2.Short circuit protection
3.Under voltage lockout circuit
4.Over current protection
5.IGBT chip over heating protection
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4. Absolute Maximum Ratings 絶対最大定格
Tc=25℃ unless otherwise specified.
Items
Bus Voltage
(between terminal P and N)
DC
Surge
Inverter
Min.
0
Max.
900
Units
V
1000
800
V
V
Short operating
Vsc
0
400
DC
Vces
Ic
0
-
1200
25
V
A
Icp
-Ic
Pc
Ic
-
50
25
139
15
A
A
W
A
Icp
IF
-
30
A
Pc
Vcc
-0.5
15
139
20
A
W
V
Vin
Iin
VALM
IALM
Tj
-0.5
-0.5
-
Vcc+0.5
3
Vcc
20
150
V
mA
V
mA
Topr
Tstg
Tsol
-20
-40
-
100
125
260
℃
℃
Viso
-
AC2500
Vrms
-
-
3.5
Nm
Collector-Emitter Voltage *1
Brake
Symbol
VDC
VDC(surge)
Collector Current
1ms
Duty= 100% *2
Collector Power Dissipation One transistor *3
DC
Collector Current
1ms
Forward Current Diode
Collector Power Dissipation One transistor *3
Supply Voltage of Pre-Driver *4
Input Signal Voltage *5
Input Signal Current
Alarm Signal Voltage *6
Alarm Signal Current *7
Junction Temperature
Operating Case Temperature
Storage Temperature
Solder Temperature *8
Isolating Voltage
(Terminal to base, 50/60Hz sine wave 1min.)
Screw Torque
Mounting (M5)
℃
℃
Note
*1 : Vces shall be applied to the input voltage between terminal P and U or V or W or DB,
N and U or V or W or DB.
*2 : 125℃/FWD Rth(j-c)/(Ic×VF MAX)=125/2.05/(25×2.0)×100>100%
*3 : Pc=125℃/IGBT Rth(j-c)=125/0.59=139W [Inverter]
Pc=125℃/IGBT Rth(j-c)=125/0.59=139W [Brake]
*4 : Vcc shall be applied to the input voltage between terminal No.4 and 1, 8 and 5,
12 and 9, 14 and 13
*5 : Vin shall be applied to the input voltage between terminal No.3 and 1, 7 and 5, 11 and 9,
16,17,18 and 13.
*6 : VALM shall be applied to the voltage between terminal No.2 and 1, No6 and 5,
No10 and 9, No.19 and 13.
*7 : IALM shall be applied to the input current to terminal No.2,6,10 and 19.
*8 : Immersion time 10±1sec.
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5. Electrical Characteristics
Tj=25℃,Vcc=15V unless otherwise specified.
5.1 Main circuit
Item
Collector Current
Inverter
at off signal input
Collector-Emitter
saturation voltage
Forward voltage of FWD
Collector Current
Brake
at off signal input
Collector-Emitter
saturation voltage
Conditions
Symbol
ICES
VCE(sat)
VF
ICES
Min.
Typ.
Max.
Units
-
-
1.0
mA
Terminal
-
-
3.1
V
Chip
-
2.4
-
V
Terminal
-
-
2.0
V
Chip
-
1.6
-
V
-
-
1.0
mA
Terminal
-
-
2.6
V
Chip
-
1.9
-
V
Terminal
-
-
3.3
V
Chip
-
1.9
-
V
VCE =1200V
Vin terminal open.
Ic=25A
-Ic=25A
VCE=1200V
Vin terminal open.
VCE(sat) Ic=15A
VF
-Ic=15A
Turn-on time
ton
VDC=600V、Tj=125℃
1.2
-
-
Turn-off time
toff
Ic=25A Fig.1,Fig.6
-
-
3.6
Reverse recovery time
trr
-
-
0.3
Min.
Typ.
Max.
Units
-
-
15
mA
-
-
45
mA
ON
1.00
1.35
1.70
OFF
1.25
1.60
1.95
-
8.0
-
Tc=-20℃
1.1
-
-
Tc=25℃
-
2.0
-
Tc=125℃
-
-
4.0
1425
1500
1575
Forward voltage of Diode
VDC=600V
IF=25A Fig.1,Fig.6
µs
5.2 Control circuit
Item
Supply current
of P-side pre-driver (one unit)
Supply current
of N-side pre-driver
Input signal threshold voltage
Input Zener Voltage
Conditions
Symbol
Iccp
Iccn
Vin(th)
Vz
Switching Frequency
: 0~15kHz
Tc=-20~100℃ Fig.7
Rin=20kΩ
Fig.2
Alarm Signal Hold Time
Resistor for current limit
tALM
RALM
MS6M 00765
V
V
ms
Ω
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5.3 Protection Section (Vcc=15V)
Item
Symbol
Over Current Protection Level
of Inverter circuit
Conditions
Min.
Typ.
Max.
Units
Tj=125℃
38
-
-
A
Tj=125℃
23
-
-
A
Ioc
Over Current Protection Level
of Brake circuit
Over Current Protection Delay time
tdoc
Tj=125℃
-
5
-
µs
SC Protection Delay time
tsc
Tj=125℃ Fig.4
-
-
8
µs
IGBT Chips Over Heating
TjOH
150
-
-
℃
TjH
-
20
-
℃
VUV
11.0
-
12.5
VH
0.2
0.5
-
Symbol
Min.
Typ.
Max.
IGBT
Rth(j-c)
-
-
0.90
FWD
Rth(j-c)
-
-
2.05
IGBT
Rth(j-c)
-
-
0.90
Rth(c-f)
-
0.05
-
Min.
Typ.
Max.
Units
±2.0
-
-
kV
±5.0
-
-
kV
Symbol
Min.
Typ.
Max.
Units
DC Bus Voltage
VDC
-
-
800
V
Power Supply Voltage of Pre-Driver
Vcc
13.5
15.0
16.5
V
-
2.5
-
3.0
Nm
Symbol
Min.
Typ.
Max.
Units
Wt
-
270
-
g
Surface
Protection Temperature Level
of IGBT Chips
Over Heating Protection Hysteresis
Under Voltage Protection Level
Under Voltage Protection Hysteresis
V
6. Thermal Characteristics (Tc=25℃)
Item
Junction to Case
Inverter
Thermal Resistance *9
Brake
Case to Fin Thermal Resistance with Compound
Units
℃/W
*9:( For 1device ,Case is under the device )
7. Noise Immunity
(Vdc=300V, Vcc=15V, Test Circuit Fig 5. )
Conditions
Item
Common mode
rectangular noise
Common mode
lightning surge
Pulse width 1µs,polarity ±,10 minuets
Judge:no over-current, no miss operating
Rise time 1.2us,Fall time 50µs Interval 20s,10 times
Judge:no over-current, no miss operating
8. Recommended Operating Conditions
Item
Screw Torque (M5)
9. Weight
Item
Weight
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Vin
Vin(th)
On
Vin(th)
trr
90%
50%
Ic
90%
10%
toff
ton
Figure 1. Switching Time Waveform Definitions
Vge (Inside IPM)
Fault (Inside IPM)
off
off
/Vin
on
on
Gate On
Gate Off
normal
alarm
/ALM
tALM>Max.
tALM 2ms(typ.)
③
tALM>Max.
①
②
Fault:Over-current,Over-heat or Under-voltage
Figure 2. Input/Output Timing Diagram
Necessary conditions for alarm reset (refer to 1 to 3 in figure2.)
1
This represents the case when a failure-causing Fault lasts for a period more than tALM.
The alarm resets when the input Vin is OFF and the Fault has disappeared.
2
This represents the case when the ON condition of the input Vin lasts for a period more
than tALM. The alarm resets when the Vin turns OFF under no Fault conditions.
3
This represents the case when the Fault disappears and the Vin turns OFF within tALM.
The alarm resets after lasting for a period of the specified time tALM.
off
/Vin
on
on
Ioc
Ic
/ALM
①
②
<tdoc
alarm
tdoc
Figure 3. Over-current Protection Timing Diagram
Period 1 :
When a collector current over the OC level flows and the OFF command is input within
a period less than the trip delay time tdoc, the current is hard-interrupted and no alarm
is output.
Period 2 :
When a collector current over the OC level flows for a period more than the trip delay
time tdoc, the current is soft-interrupted. If this is detected at the lower arm IGBTs,
an alarm is output.
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t SC
Ic
Ic
IALM
Ic
IALM
IALM
Figure.4 Definition of tsc
VccU
20k
IPM
VinU
DC15V
SW1
CT
P
U
GNDU
V
AC400V
Vcc
20k
W
VinX
DC15V
SW2
Earth
Noise
4700p
N
GND
Cooling
Fin
Figure 5. Noise Test Circuit
Vcc
20k
P
IPM
L
Vin
DC15V
DC600V
Ic
HCPL4504
GND
N
Figure 6. Switching Characteristics Test Circuit
Icc
Vcc
P
U
IPM
V
Vin
DC15V
P.G
+8V
fsw
W
GND
N
Figure 7. Icc Test Circuit
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10. Truth table
10.1 IGBT Control
The following table shows the IGBT ON/OFF status with respect to the input signal Vin.
The IGBT turn-on when Vin is at “Low” level under no alarm condition.
Input
(Vin)
Output
(IGBT)
Low
ON
High
OFF
10.2 Fault Detection
(1) When a fault is detected at the high side, only the detected arm stops its output.
At that time the IPM dosen’t any alarm.
(2) When a fault is detected at the low side, all the lower arms stop their outputs and the IPM
outputs an alarm of the low side.
Fault
High side
U-phase
High side
V-phase
High side
W-phase
Low side
IGBT
Alarm Output
U-phase V-phase W-phase Low side
ALM-U
ALM-V
ALM-W
ALM
OC
OFF
*
*
*
L
H
H
H
UV
OFF
*
*
*
L
H
H
H
TjOH
OFF
*
*
*
L
H
H
H
OC
*
OFF
*
*
H
L
H
H
UV
*
OFF
*
*
H
L
H
H
TjOH
*
OFF
*
*
H
L
H
H
OC
*
*
OFF
*
H
H
L
H
UV
*
*
OFF
*
H
H
L
H
TjOH
*
*
OFF
*
H
H
L
H
OC
*
*
*
OFF
H
H
H
L
UV
*
*
*
OFF
H
H
H
L
TjOH
*
*
*
OFF
H
H
H
L
*:Depend on input logic.
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11. Cautions for design and application 設計・適用上の注意点
1. Trace routing layout should be designed with particular attention to least stray capacity
between the primary and secondary sides of optical isolators by minimizing the wiring
length between the optical isolators and the IPM input terminals as possible.
フォトカプラとIPMの入力端子間の配線は極力短くし、フォトカプラの一次側と二次側の浮遊容量を小さくした
パターンレイアウトにして下さい。
2. Mount a capacitor between Vcc and GND of each high-speed optical isolator as close to
as possible.
高速フォトカプラのVcc-GND間に、コンデンサを出来るだけ近接して取り付けて下さい。
3. For the high-speed optical isolator, use high-CMR type one with tpHL, tpLH ≦ 0.8µs.
高速フォトカプラは、tpHL,tpLH≦0.8us、高CMRタイプをご使用ください。
4. For the alarm output circuit, use low-speed type optical isolators with CTR ≧ 100%.
アラーム出力回路は、低速フォトカプラCTR≧100%のタイプをご使用ください。
5. For the control power Vcc, use four power supplies isolated each. And they should be
designed to reduce the voltage variations.
制御電源Vccは、絶縁された4電源を使用してください。また、電圧変動を抑えた設計として下さい。
6. Suppress surge voltages as possible by reducing the inductance between the DC bus P
and N, and connecting some capacitors between the P and N terminals.
P-N間の直流母線は出来るだけ低インダクタンス化し、P-N端子間にコンデンサを接続するなどしてサージ
電圧を低減して下さい。
7. To prevent noise intrusion from the AC lines, connect a capacitor of some 4700pF between
the three-phase lines each and the ground.
ACラインからのノイズ侵入を防ぐために、3相各線-アース間に4700pF程のコンデンサを接続して下さい。
8. At the external circuit, never connect the control terminal GNDU to the main terminal
U-phase, GNDV to V-phase, GNDW to W-phase, and GND to N-phase. Otherwise,
malfunctions may be caused.
制御端子GNDUと主端子U相、制御端子GNDVと主端子V相、制御端子GNDWと主端子W相、
制御端子GNDと主端子Nを外部回路で接続しないで下さい。誤動作の原因になります。
9. Take note that an optical isolator’s response to the primary input signal becomes slow
if a capacitor is connected between the input terminal and GND.
入力端子-GND間にコンデンサを接続すると、フォトカプラ一次側入力信号に対する応答時間が長くなります
のでご注意ください。
10. Taking the used isolator’s CTR into account, design with a sufficient allowance to decide the
primary forward current of the optical isolator.
フォトカプラの一次側電流は、お使いのフォトカプラのCTRを考慮し十分に余裕をもった設計にして下さい。
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11. In case of mounting this product on cooling fin, use thermal compound to secure thermal conductivity. If the
thermal compound amount was not enough or its applying method was not suitable, its spreading will not be
enough, then, thermal conductivity will be worse and thermal run away destruction may occur.
Confirm spreading state of the thermal compound when its applying to this product.
(Spreading state of the thermal compound can be confirmed by removing this product after mounting.)
素子を冷却フィンに取り付ける際には、熱伝導を確保するためのコンパウンド等をご使用ください。
又、塗布量が不足したり、塗布方法が不適だったりすると、コンパウンドが十分に素子全体に広がらず、
放熱悪化による熱暴走破壊に繋がる事があります。コンバウンドを塗布する際には、
製品全面にコンパウンドが広がっている事を確認してください。
(実装した後に素子を取りはずすとコンパウンドの広がり具合を確認する事が出来ます。)
12. Use this product with keeping the cooling fin's flatness between screw holes within 100um at 100mm and the
roughness within 10um. Also keep the tightening torque within the limits of this specification. Too large convex
of cooling fin may cause isolation breakdown and this may lead to a critical accident. On the other hand, too
large concave of cooling fin makes gap between this product and the fin bigger, then, thermal conductivity will
be worse and over heat destruction may occur.
+100μm
0
冷却フィンはネジ取り付け位置間で平坦度を100mmで
100um以下、表面の粗さは10um以下にして下さい。
Heat sink
過大な凸反りがあったりすると本製品が絶縁破壊を
起こし、重大事故に発展する場合があります。
また、過大な凹反りやゆがみ等があると、本製品と
冷却フインの間に空隙が生じて放熱が悪くなり、
Mounting holes
熱破壊に繋がることがあります。
13. This product is designed on the assumption that it applies to an inverter use. Sufficient examination is required
when applying to a converter use. Please contact Fuji Electric Co.,Ltd if you would like to applying to converter use.
本製品は、インバータ用途への適用を前提に設計されております。コンバータ用途へ適用される場合は、
十分な検討が必要です。もし、コンバータへ適用される場合は御連絡ください。
14. Please see the 『Fuji IGBT-IPM R SERIES APPLICATION MANUAL』 and 『Fuji IGBT MODULES N-SERIES
APPLICATION MANUAL』.
『富士IGBT-IPM Rシリーズ アプリケーションマニュアル』及び『IGBTモジュール Nシリーズ アプリケーションマニュアル』
を御参照ください。
15. There is thermal interference between nearby power devices, because the Econo IPM is a compact package.
Therefore you measure the case temperature just under the IGBT chips that showed in report MT6M04545,
and estimate the chip temperature.
Econo IPM はパッケージ小型化のため、パワー素子の熱干渉が考えられます。
その為、チップ温度推定は必ず MT6M04545 に示すチップ直下のケース温度を測定して行って下さい。
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12. Example of applied circuit 応用回路例
VccU
+5V
VccU
HCPL4504
20kΩ
0.1uF
“H“で
U相IGBTオン
+5V
P
④
+10uF
20kΩ
0.1uF
③
GNDU
HCPL4504
R
③
GNDU
①
V
W
⑧
+10uF
B
⑦
N
C +
V
M
②
W
⑧
+10uF
B
⑦
N
C +
M
VccV
20kΩ
0.1uF
“H“で
V相IGBTオン
GNDV
20kΩ
0.1uF
“H“で
V相IGBTオン
GNDV
⑤
⑤
⑥
⑥
VccW
VccW
20kΩ
20kΩ
⑫
+10uF
0.1uF
“H“で
W相IGBTオン
⑫
+10uF
0.1uF
“H“で
W相IGBTオン
⑪
GNDW
⑪
GNDW
⑨
⑨
⑩
20kΩ
0.1uF
“H“で
X相IGBTオン
⑭
⑩
IPM
GND
Vcc
+10uF
⑯
“H“で
Y相IGBTオン
0.1uF
⑭
IPM
+10uF
⑯
GND
⑬
⑬
0.1uF 20kΩ
⑰
“H“で
Y相IGBTオン
⑱
“H“で
Z相IGBTオン
⑮
“H“で
DB_IGBTオン
⑰
0.1uF 20kΩ
“H“で
Z相IGBTオン
20kΩ
“H“で
X相IGBTオン
0.1uF 20kΩ
0.1uF 20kΩ
⑱
0.1uF 20kΩ
“H“で
DB_IGBTオン
AC20V
U
VccV
Vcc
R
①
V
0
2
C
A
U
②
P
④
+10uF
“H“で
U相IGBTオン
0.1uF 20kΩ
⑮
⑲
⑲
TLP521
(a)In case of use of High side alarm
上アームアラーム使用の場合
TLP521
(b)In case of no use of High side alarm
上アームアラーム不使用の場合
13. Package and Marking 梱包仕様
Please see the MT6M4140 which is packing specification of IPM.
IPM梱包仕様書 MT6M4140を御参照ください。
14. Cautions for storage and transportation 保管、運搬上の注意
・ Store the modules at the normal temperature and humidity (5 to 35°C, 45 to 75%).
常温常湿(5~35℃、45~75%)で保存して下さい。
・ Avoid a sudden change in ambient temperature to prevent condensation on the module
surfaces.
モジュールの表面が結露しないよう、急激な温度変化を避けて下さい。
・ Avoid places where corrosive gas generates or much dust exists.
腐食性ガスの発生場所、粉塵の多い場所は避けて下さい。
・ Store the module terminals under unprocessed conditions
モジュールの端子は未加工の状態で保管すること。.
・ Avoid physical shock or falls during the transportation.
運搬時に衝撃を与えたり落下させないで下さい。
15. Scope of application 適用範囲
This specification is applied to the IGBT-IPM (type: 7MBP25TEA120).
本仕様書は、IGBT-IPM (型式:7MBP25TEA120)に適用する。
16. Based safety standards 準拠安全規格
UL1557
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17.Characteristics
17-1.Control Circuit Characteristics(Respresentative)
Power supply current v s. Switching frequency
Tj=125°C (typ.)
Input signal threshold voltage
v s. Power supply v oltage (typ.)
2.5
P-side
N-side
25
Vcc=1 7V
20
Vcc=1 5V
Vcc=1 3V
15
10
Vcc=1 7V
Vcc=1 5V
Vcc=1 3V
5
Input signal threshold voltage
: Vin(on),Vin(off) (V)
Power s upply current : Icc (mA)
30
0
2
} Vin(off)
1
0.5
5
10
15
20
25
12
14
15
16
17
18
1
Under voltage hys terisis : VH (V)
12
10
8
6
4
2
0
0.8
0.6
0.4
0.2
0
40
60
80
100
120
140
20
40
60
80
100
120
140
Junction temperature : Tj (°C)
Junction tem perature : Tj (°C)
Ov er heating characteristics
TjO H,TjH v s. Vcc (typ.)
Alarm hold tim e v s. Power supply v oltage (typ.)
200
Over heating protection : TjOH (°C)
O H hysterisis : TjH (°C)
3
2.5
Tc=100°C
2
Tc=25°C
1.5
1
0.5
0
12
14
Under voltage hys terisis vs. Jnc tion temperature (typ.)
Under v oltage v s. Junction tem perature (typ.)
20
13
Power supply voltage : Vcc (V)
Switching frequency : fsw (kHz)
Under voltage : VUVT (V)
} Vin(o n)
1.5
0
0
Alarm hold time : tALM (m Sec )
Tj=25°C
Tj =125°C
13
14
15
16
17
Power supply voltage : Vcc (V)
18
TjOH
150
100
50
TjH
0
12
13
14
15
16
17
18
Power supply voltage : Vcc (V)
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17-2.Main Circuit Characteristics (Representative)
Collector current v s. Collector-Emitter v oltage (typ.)
Tj=25°C / Chip
Collector current v s. Collector-Em itter v oltage (typ.)
Tj=25°C / Term inal
50
Vcc=1 5V
40
Vcc=1 7V
30
C ollector Current : Ic (A)
Collector Current : Ic (A)
50
Vcc=1 3V
20
10
Vcc=15V
40
Vcc=1 7V
30
Vcc=1 3V
20
10
0
0
0
0.5
1
1.5
2
2.5
3
3.5
4
0
0.5
1
1.5
2
2.5
3
3.5
4
Collector-Em itter voltage : Vce (V)
Collector-Emitter voltage : Vce (V)
Collector current v s. Collector-Em itter v oltage (typ.)
Tj=125°C / Chip
Collector current v s. Collector-Emitter v oltage (typ.)
Tj=125°C / Term inal
50
Vcc=1 5V
40
Vcc=1 7V
30
Vcc=1 3V
20
Collector Current : Ic (A)
Collector Current : Ic (A)
50
10
Vcc=17V
30
Vcc=13V
20
10
0
0
0
0.5
1
1.5
2
2.5
3
3.5
4
0
0.5
1
1.5
2
2.5
3
3.5
4
Collector-Em itter voltage : Vce (V)
Collector-Emitter voltage : Vce (V)
Forward current v s. Forward v oltage (typ.)
Chip
Forward current v s. Forward v oltage (typ.)
Term inal
50
50
40
40
25°C
Forward Current : If (A)
Forward Current : If (A)
Vcc=1 5V
40
125°C
30
20
10
25°C
125°C
30
20
10
0
0
0
0.5
1
1.5
Forward voltage : Vf (V)
2
2.5
0
0.5
1
1.5
2
2.5
Forward voltage : Vf (V)
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Switching Loss vs. Collector Current (typ.)
Edc=600V,Vcc=15V,Tj=125°C
Switching Loss : Eon,Eoff,Err (m J/cyc le)
Switching Loss : Eon,Eoff,Err (mJ/cycle)
Switching Loss v s. Collector Current (typ.)
Edc=600V,Vcc=15V,Tj=25°C
10
Eon
5
Eoff
Err
0
15
Eon
10
5
Eoff
Err
0
0
10
20
30
40
50
0
10
Collector Current : Ic (A)
20
30
40
50
Collector Current : Ic (A)
Reversed biased safe operating area
Vcc=15V,Tj≦125℃ (min.)
Transient thermal resistance (max.)
Thermal resistance : Rth(j-c) (℃/W)
350
Collector current : Ic (A)
300
250
SCSOA
(non-repetitive pulse)
200
150
100
50
RBSOA
(Repetitive pulse)
0
FWD
IGBT
1
0.1
0.01
0
200
400
600
800
1000
1200
1400
0.001
0.01
Collector-Emitter voltage : Vce (V)
1
10
Pulse width :Pw (sec)
Power derating for IG BT (m ax.)
(per dev ice)
Power derating for FW D (max.)
(per dev ice)
200
100
Collecter Power Dissipation : Pc (W )
Collecter Power Dissipation : Pc (W )
0.1
150
100
50
0
80
60
40
20
0
0
20
40
60
80
100
120
Case Tem perature : Tc (°C)
140
160
0
20
40
60
80
100
120
140
160
Case Tem perature : Tc (°C)
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Switching tim e vs. Collector current (typ.)
Edc=600V,Vcc=15V,Tj=125°C
Switching tim e v s. Collector current (typ.)
Edc=600V,Vcc=15V,Tj=25°C
10000
Switching time : ton,toff,tf (nSec )
Switching time : ton,toff,tf (nSec)
10000
ton
toff
1000
100
tf
10
toff
ton
1000
tf
100
10
0
10
20
30
40
Collector current : Ic (A)
50
0
10
20
30
40
50
Collector current : Ic (A)
Rev erse recovery characteristics
trr,Irr v s.IF (typ.)
Reverse recovery current:Irr(A)
Reverse recovery time:trr(nsec)
trr125°C
trr25°C
100
Irr25°C
Irr125°C
10
1
0
10
20
30
40
50
Forward c urrent:IF(A)
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17-3.Dynamic Brake Characteristics
(Respresentative)
Collector current v s. Collector-Emitter v oltage (typ.)
Tj=25°C
40
Vcc=15V
Collector C urrent : Ic (A)
Collector Current : Ic (A)
40
Collector current v s. Collector-Emitter v oltage (typ.)
Tj=125°C
30
Vcc=1 7V
Vcc=1 3V
20
10
0
30
Vcc=1 7V
Vcc=13V
20
10
0
0
0.5
1
1.5
2
2.5
3
3.5
4
0
0.5
1
1.5
2
2.5
3
3.5
4
Collector-Em itter voltage : Vce (V)
Collector-Emitter voltage : Vce (V)
Transient thermal resistance (max.)
Reversed biased safe operating area
Vcc=15V,Tj≦125℃ (min.)
210
1
IGBT
180
Collector current : Ic (A)
Thermal resistance : Rth(j-c) (℃/W)
Vcc=1 5V
0.1
150
120
SCSOA
(non-repetitive pulse)
90
60
30
RBSOA
(Repetitive pulse)
0
0.01
0.001
0.01
0.1
1
0
200
400
600
800
1000
1200
1400
Collector-Emitter voltage : Vce (V)
Pulse width :Pw (sec)
Power derating for IGBT (max.)
(per dev ice)
Collecter Power Dissipation : Pc (W )
200
150
100
50
0
0
20
40
60
80
100
120
140
160
Case Tem perature : Tc (°C)
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18. Reliability Test Items
Test
categories
Test items
Environment Tests
Mechanical Tests
1 Terminal strength
端子強度
(Pull test)
2 Mounting Strength
締付け強度
3 Vibration
振動
Reference norms
EIAJ
ED-4701
Test methods and conditions
Pull force
: 20 N (main terminal)
10 N (control terminal)
Test time
: 10 ±1 sec.
Screw torque
: 2.5 ~ 3.5 N・m (M5)
Test time
: 10 ±1 sec.
Range of frequency
: 10~500 Hz
Sweeping time
: 15 min.
Acceleration
: 100 m/s2
Sweeping direction
: Each X,Y,Z axis
Test time
: 6 hr. (2hr./direction)
4 Shock
Maximum acceleration : 5000 m/s2
Pulse width
1.0 ms
衝撃
Direction
: Each X,Y,Z axis
Test time
: 3 times/direction
5 Solderabitlity
Solder temp.
: 235 ±5 ℃
はんだ付け性
Immersion duration
: 5.0 ±0.5 sec.
Test time
: 1 time
Each terminal should be Immersed in solder
within 1~1.5mm from the body.
6 Resistance to
Solder temp.
: 260 ±5 ℃
soldering heat
Immersion time
: 10 ±1sec.
はんだ耐熱性
Test time
: 1 time
Each terminal should be Immersed in solder
within 1~1.5mm from the body.
1 High temperature Storage temp.
: 125 ±5 ℃
storage 高温保存 Test duration
: 1000 hr.
2 Low temperature Storage temp.
: -40 ±5 ℃
storage 低温保存 Test duration
: 1000 hr.
3 Temperature
Storage temp.
: 85 ±2 ℃
humidity storage Relative humidity
: 85 ±5%
Test duration
: 1000hr.
高温高湿保存
4 Unsaturated
Test temp.
: 120 ±2 ℃
pressure cooker
Atmospheric pressure : 1.7x105 Pa
: 85 ±5%
プレッシャークッカー Test humidity
Test duration
: 96 hr.
5 Temperature
Test temp.
: Minimum storage temp. -40 ±5℃
cycle
Maximum storage temp. 125 ±5℃
Normal temp.
5 ~ 35℃
温度サイクル
Dwell time
: Tmin ~ TN ~ Tmax ~ TN
1hr. 0.5hr. 1hr. 0.5hr.
Number of cycles
: 100 cycles
6 Thermal shock
+0
Test temp.
: High temp. side 100 -5 ℃
熱衝撃
+5
Fluid used
Dipping time
Transfer time
Number of cycles
:
:
:
:
Number Acceptof
ance
sample number
5
(1:0)
Test Method 402
methodⅡ
Test Method 403
Condition code B
5
(1:0)
5
(1:0)
Test Method 404
Condition code B
5
(1:0)
Test Method 303
Condition code A
5
(1:0)
Test Method 302
Condition code A
5
(1:0)
Test Method 201
5
(1:0)
Test Method 202
5
(1:0)
Test Method 103
Test code C
5
(1:0)
Test Method 103
Test code E
5
(1:0)
Test Method 105
5
(1:0)
Test Method 307
method Ⅰ
Condition code A
5
(1:0)
Test Method 401
MethodⅠ
Low temp. side 0 -0 ℃
Pure water (running water)
5 min. par each temp.
10 sec.
10 cycles
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Test
categories
Endurance
Endurance Tests
Tests
Test items
AcceptReference norms
Number
EIAJ
ance
of sample
ED-4701
number
Test methods and conditions
1 High temperature
reverse bias
高温逆バイアス
Test temp.
Bias Voltage
Bias Method
Test duration
ON time
OFF time
Test temp.
2 Intermitted
operating life
(Power cycle)
断続動作
Number of cycles
: Ta = 125 ±5℃
(Tj ≦ 150 ℃)
: VC = 0.8×VCES
: Applied DC voltage to C-E
Vcc = 15V
: 1000 hr.
: 2 sec.
: 18 sec.
: ∆ Tj=100 ±5deg
Tj ≦ 150 ℃, Ta=25 ±5℃
: 15000 cycles
Test Method 101
5
(1:0)
Test Method 106
5
(1:0)
19. Failure Criteria
Item
Electrical
characteristic
Characteristic
Leakage current
Saturation voltage
Forward voltage
inspection
Failure criteria
Lower limit Upper limit
Unit
ICES
-
USL×2
mA
VCE(sat)
-
USL×1.2
V
VF
-
USL×1.2
V
Thermal
IGBT
Rth(j-c)
-
USL×1.2
℃/W
resistance
FWD
Rth(j-c)
-
USL×1.2
℃/W
Ioc
LSL×0.8
USL×1.2
A
Alarm signal hold time
tALM
LSL×0.8
USL×1.2
ms
Isolation voltage
Viso
Broken insulation
-
-
The visual sample
-
Over Current Protection
Visual
Symbol
Note
Visual inspection
Peeling
Plating
and the others
LSL : Lower specified limit.
USL : Upper specified limit.
Note : Each parameter measurement read-outs shall be made after stabilizing the components at room
ambient for 2 hours minimum, 24 hours maximum after removal from the tests. And in case of the
wetting tests, for example, moisture resistance tests, each component shall be made wipe or dry
completely before the measurement.
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Warnings
1. This product shall be used within its absolute maximum rating (voltage, current, and temperature).
This product may be broken in case of using beyond the ratings.
製品の絶対最大定格(電圧,電流,温度等)の範囲内で御使用下さい。絶対最大定格を超えて使用すると、素子が
破壊する場合があります。 2. Connect adequate fuse or protector of circuit between three-phase line and this product to prevent
the equipment from causing secondary destruction.
万一の不慮の事故で素子が破壊した場合を考慮し、商用電源と本製品の間に適切な容量のヒューズ又はブレーカーを
必ず付けて2次破壊を防いでください。
3. When studying the device at a normal turn-off action, make sure that working paths of the turn-off
voltage and current are within the RBSOA specification. And ,when studying the device duty at
a short-circuit current non-repetitive interruption, make sure that the paths are also within the
avalanche proof(PAV) specification which is calculated from the snubber inductance, the IPM
inner inductance and the turn-off current. In case of use of IGBT-IPM over these specifications,
it might be possible to be broken.
通常のターンオフ動作における素子責務の検討の際には、ターンオフ電圧・電流の動作軌跡がRBSOA仕様内にある
ことを確認して下さい。また、非繰返しの短絡電流遮断における素子責務の検討に際しては、スナバーインダクタンスと
IPM内部インダクタンス及びターンオフ電流から算出されるアバランシェ耐量(PAV)仕様内である事を確認して下さい。
これらの仕様を越えて使用すると、素子が破壊する場合があります。
4. Use this product after realizing enough working on environment and considering of product's reliability
life. This product may be broken before target life of the system in case of using beyond the product's
reliability life.
製品の使用環境を十分に把握し、製品の信頼性寿命が満足できるか検討の上、本製品を適用して下さい。
製品の信頼性寿命を超えて使用した場合、装置の目標寿命より前に素子が破壊する場合があります。
5. If the product had been used in the environment with acid, organic matter, and corrosive gas
(For example : hydrogen sulfide, sulfurous acid gas), the product's performance and appearance
can not be ensured easily.
酸・有機物・腐食性ガス(硫化水素,亜硫酸ガス等)を含む環境下で使用された場合、製品機能・外観などの保証は
致しかねます。
6. Use this product within the power cycle curve (Technical Rep.No. : MT6M04057).
Power cycle capability is classified to delta-Tj mode which is stated as above and delta-Tc mode.
Delta-Tc mode is due to rise and down of case temperature (Tc), and depends on cooling design of
equipment which use this product. In application which has such frequent rise and down of Tc,
well consideration of product life time is necessary.
本製品は、パワーサイクル寿命カーブ以下で使用下さい(技術資料No.: MT6M04057)。
パワーサイクル耐量にはこのΔTjによる場合の他に、ΔTcによる場合があります。
これはケース温度(Tc)の上昇下降による熱ストレスであり、本製品をご使用する際の放熱設計に依存します。
ケース温度の上昇下降が頻繁に起こる場合は、製品寿命に十分留意してご使用下さい。
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7. Never add mechanical stress to deform the main or control terminal.
The deformed terminal may cause poor contact problem.
主端子及び制御端子に応力を与えて変形させないで下さい。 端子の変形により、接触不良などを引き起こす場合が
あります。
8. If excessive static electricity is applied to the control terminals, the devices can be broken.
Implement some countermeasures against static electricity.
制御端子に過大な静電気が印加された場合、素子が破壊する場合があります。取り扱い時は静電気対策を
実施して下さい。
Caution
1. Fuji Electric Device Technology is constantly making every endeavor to improve the product quality and reliability.
However, semiconductor products may rarely happen to fail or malfunction. To prevent accidents causing
injury or death, damage to property like by fire, and other social damage resulted from a failure or malfunction
of the semiconductor products made by Fuji Electric Device Technology, take some measures to keep safety
such as redundant design, spread-fire-preventive design, and malfunction-protective design.
富士電機デバイステクノロジーは絶えず製品の品質と信頼性の向上に努めています。しかし、半導体製品は故障が発生したり、
誤動作する場合があります。富士電機デバイステクノロジー製半導体製品の故障または誤動作が、結果として人身事故・火災等による
財産に対する損害や社会的な損害を起こさないように冗長設計・延焼防止設計・誤動作防止設計など安全確保のための手段を
講じて下さい。
2. The application examples described in this specification only explain typical ones that used the Fuji Electric
Device Technology products. This specification never ensure to enforce the industrial property and other rights,
nor license the enforcement rights.
本仕様書に記載してある応用例は、富士電機デバイステクノロジー製品を使用した代表的な応用例を説明するものであり、本仕様書に
よって工業所有権、その他権利の実施に対する保障または実施権の許諾を行うものではありません。
3. The product described in this specification is not designed nor made for being applied to the equipment
or systems used under life-threatening situations. When you consider applying the product of this
specification to particular used, such as vehicle-mounted units, shipboard equipment, aerospace
equipment, medical devices, atomic control systems and submarine relaying equipment or systems,
please apply after confirmation of this product to be satisfied about system construction and required reliability.
本仕様書に記載された製品は、人命にかかわるような状況下で使用される機器あるいはシステムに用いられることを
目的として設計・製造されたものではありません。本仕様書の製品を車両機器、船舶、航空宇宙、医療機器、原子力
制御、海底中継機器あるいはシステムなど、特殊用途へのご利用をご検討の際は、システム構成及び要求品質に
満足することをご確認の上、ご利用下さい。
If there is any unclear matter in this specification, please contact Fuji Electric Device Technology Co., Ltd.
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