Product Brief PE42612 Flip Chip SP4T UltraCMOS™ 2.6 V Switch 100 – 3000 MHz Figure 1. Functional Diagram Features • Two pin CMOS logic control inputs • Supports 1.8 V Control Logic • Low TX insertion loss: 0.55 dB at TX1 RX1 TX2 RX2 CMOS Control/Driver and ESD • • • • • V1 • V2 900 MHz, 0.70 dB at 1900 MHz Isolation of 39 dB at 900 MHz, 31 dB at 1900 MHz Low harmonics 2fo = -82 dBc and 3fo = -74 dBc at 35 dBm input power 1500 V HBM ESD tolerance Built in CMOS decoder/driver RX SAW over voltage protection circuit No blocking capacitors required Product Description Figure 2. Die Top View 10 11 12 1 TX1 N/C ANT RX1 9 2 GND GND 8 3 TX2 RX2 GND VDD V2 V1 7 6 5 4 Document No. 70-0217-01 │ www.psemi.com Contact [email protected] for full version of datasheet The PE42612 SP4T RF UltraCMOS™ Flip Chip Switch is designed specifically to address the needs of the antenna switch module market for GSM Handsets. On-chip CMOS decode logic is used to facilitate two-pin, low voltage CMOS control inputs. High ESD tolerance of 1500 V at all ports, no blocking capacitor requirements and on-chip SAW filter over-voltage protection devices make this the ultimate in integration and ease of use. The PE42612 is manufactured on Peregrine’s UltraCMOS™ process, a patented variation of silicon-on-insulator (SOI) technology on a sapphire substrate, offering the performance of GaAs with the economy and integration of conventional CMOS. ©2006 Peregrine Semiconductor Corp. All rights reserved. Page 1 of 4 PE42612 Product Brief Table 1. PE42612 Electrical Specifications: Temp = 25°C, VDD = 2.6 V Parameter Condition Min Operational Frequency Typ 100 0.55 0.7 0.85 1.05 Max Unit 3000 MHz 0.65 0.8 1.0 1.2 dB dB dB dB Insertion Loss ANT - TX - 850 / 900 MHz ANT - TX - 1800 / 1900 MHz ANT - RX - 850 / 900 MHz ANT - RX - 1800 / 1900 MHz Isolation TX - RX - 850 / 900 MHz (TX ON) TX - RX - 1800 / 1900 MHz (TX ON) TX1 - TX2 - 850 / 900 MHz (TX1 ON) TX1 - TX2 - 1800 / 1900 MHz (TX1 ON) 37 29 33 26 39 31 35 28 dB dB dB dB Return Loss 850 / 900 MHz 1800 / 1900 MHz 18 14 20 16 dB dB 2nd Harmonic1,2 35 dBm TX Input Power - 850 / 900 MHz 33 dBm TX Input Power - 1800 / 1900 MHz -82 -89 -78 -82 dBc dBc 3rd Harmonic1,2 35 dBm TX Input Power - 850 / 900 MHz 33 dBm TX Input Power - 1800 / 1900 MHz -74 -68 -69 -65 dBc dBc Switching time (10-90%) (90-10%) RF 2 3 µs Notes: 1. Measured in Pulsed Wave Mode. 2. Assumes RF input duty cycle of 50% and 4620 µs, measured per 3GPP TS 45.005 Table 2. Operating Ranges Parameter Table 3. Absolute Maximum Ratings Symbol Min Typ Max Units Temperature range TOP -40 VDD Supply Voltage VDD 2.4 IDD Power Supply Current (VDD = 2.6 V) IDD TX input power (VSWR ≤ 3:1) 824-915 MHz TX input power (VSWR ≤ 3:1) °C 2.6 2.95 V 11 25 µA +35 dBm PIN Symbol VDD RX input power (VSWR ≤1:1) PIN Control Voltage High VIH VIL +20 1.40 dBm V 1 µA Control Line Current Min Max Units -0.3 4.0 V -0.3 VDD+ 0.3 V VI Voltage on any DC input TST Storage temperature range -65 +150 °C TOP Operating temperature range -40 +85 °C TX input power (50 Ω)3,4 824-915 MHz TX input power (50 Ω)3,4 1710-1910 MHz PIN RX input power (50 Ω) V 0.40 Parameter/Conditions Power supply voltage +33 1710-1910 MHz Control Voltage Low +85 PIN (∞:1) VESD Note: TX input power (VSWR = (∞:1)3,4 824-915 MHz TX input power (VSWR = (∞:1)3,4 1710-1910 MHz +38 +36 dBm +23 +35 dBm +33 ESD Voltage (HBM, MIL_STD 883 Method 3015.7) 1500 V ESD Voltage (MM, JEDEC, JESD22-A114-B) 100 V 3. Assumes RF input duty cycle of 50% and 4620 µs. 4. VDD within operating range specified in Table 4. Absolute Maximum Ratings are those values listed in the above table. Exceeding these values may cause permanent device damage. Functional operation should be restricted to the limits in the DC Electrical Specifications table. Exposure to absolute maximum ratings for extended periods may affect device reliability. ©2006 Peregrine Semiconductor Corp. All rights reserved. Page 2 of 4 Document No. 70-0217-01 │ UltraCMOS™ RFIC Solutions Contact [email protected] for full version of datasheet PE42612 Product Brief Table 5. Truth Table Figure 3. Pin Configuration (Ball-Side Up) N/C 10 TX1 11 12 9 GND 1 RX1 2 GND 3 RX2 4 V1 PE42612 Die TX2 8 GND 7 V2 V1 0 0 ANT - RX2 0 1 ANT - TX1 1 0 ANT - TX2 1 1 6 5 VDD V2 Electrostatic Discharge (ESD) Precautions When handling this UltraCMOS™ device, observe the same precautions that you would use with other ESD-sensitive devices. Although this device contains circuitry to protect it from damage due to ESD, precautions should be taken to avoid exceeding the specified rating. Table 4. Pin Descriptions Latch-Up Avoidance Unlike conventional CMOS devices, UltraCMOS™ devices are immune to latch-up. Pin No. Pin Name 15 RX1 RF I/O – RX1 2 GND Ground 5 3 RX2 4 V1 Switch control input, CMOS logic level 5 V2 Switch control input, CMOS logic level 6 VDD Description RF I/O – RX2 Supply 7 GND Ground 85 TX2 RF I/O - TX2 9 GND Ground 105 TX1 RF I/O - TX1 11 N/C No Connect – Pin to be connected to an electrically isolated low capacitance pad 125 ANT RF Common – Antenna Input Note: Path ANT - RX1 ANT 5. Blocking capacitors needed only when non-zero DC voltage present. Table 6. Ordering Information Order Code Die ID Description Package Shipping Method PE42612-90 (Unitive) C9817_1 PE42612-DIE-D Film Frame Wafer (Gross Die / Wafer Quantity) PE42612-91 (FCI) C9817_1 PE42612-DIE-D Film Frame Wafer (Gross Die / Wafer Quantity) PE42612-00 C9817_1 PE42612-DIE-1H Evaluation Kit 1 / Box Document No. 70-0217-01 │ www.psemi.com Contact [email protected] for full version of datasheet ©2006 Peregrine Semiconductor Corp. All rights reserved. Page 3 of 4 PE42612 Product Brief Sales Offices The Americas Peregrine Semiconductor Corporation Peregrine Semiconductor, Asia Pacific (APAC) 9450 Carroll Park Drive San Diego, CA 92121 Tel: 858-731-9400 Fax: 858-731-9499 Shanghai, 200040, P.R. China Tel: +86-21-5836-8276 Fax: +86-21-5836-7652 Europe Peregrine Semiconductor Europe Bâtiment Maine 13-15 rue des Quatre Vents F-92380 Garches, France Tel: +33-1-4741-9173 Fax : +33-1-4741-9173 Space and Defense Products Peregrine Semiconductor, Korea #B-2607, Kolon Tripolis, 210 Geumgok-dong, Bundang-gu, Seongnam-si Gyeonggi-do, 463-943 South Korea Tel: +82-31-728-3939 Fax: +82-31-728-3940 Peregrine Semiconductor K.K., Japan Teikoku Hotel Tower 10B-6 1-1-1 Uchisaiwai-cho, Chiyoda-ku Tokyo 100-0011 Japan Tel: +81-3-3502-5211 Fax: +81-3-3502-5213 Americas: Tel: 858-731-9453 Europe, Asia Pacific: 180 Rue Jean de Guiramand 13852 Aix-En-Provence Cedex 3, France Tel: +33-4-4239-3361 Fax: +33-4-4239-7227 For a list of representatives in your area, please refer to our Web site at: www.psemi.com Data Sheet Identification Advance Information The product is in a formative or design stage. The data sheet contains design target specifications for product development. Specifications and features may change in any manner without notice. Preliminary Specification The data sheet contains preliminary data. Additional data may be added at a later date. Peregrine reserves the right to change specifications at any time without notice in order to supply the best possible product. Product Specification The data sheet contains final data. In the event Peregrine decides to change the specifications, Peregrine will notify customers of the intended changes by issuing a DCN (Document Change Notice). ©2006 Peregrine Semiconductor Corp. All rights reserved. Page 4 of 4 The information in this data sheet is believed to be reliable. However, Peregrine assumes no liability for the use of this information. Use shall be entirely at the user’s own risk. No patent rights or licenses to any circuits described in this data sheet are implied or granted to any third party. Peregrine’s products are not designed or intended for use in devices or systems intended for surgical implant, or in other applications intended to support or sustain life, or in any application in which the failure of the Peregrine product could create a situation in which personal injury or death might occur. Peregrine assumes no liability for damages, including consequential or incidental damages, arising out of the use of its products in such applications. The Peregrine name, logo, and UTSi are registered trademarks and UltraCMOS and HaRP are trademarks of Peregrine Semiconductor Corp. Document No. 70-0217-01 │ UltraCMOS™ RFIC Solutions Contact [email protected] for full version of datasheet