SSM4532M
COMPLEMENTARY N AND P-CHANNEL ENHANCEMENT-MODE POWER MOSFETS
N-ch
Simple drive requirement
BV
D2
Low on-resistance
G2
S2
SO-8
50mΩ
R DS(ON)
D2
D1
D1
Fast switching
+30V
DSS
S1
P-ch
G1
Description
ID
+5A
BV DSS
-30V
RDS(ON)
70mΩ
ID
MOSFETs from Silicon Standard Corp. provide the
designer with the best combination of fast switching,
ruggedized device design, low on-resistance and costeffectiveness.
-4A
D2
D1
The SO-8 package is widely preferred for commercial and
industrial surface mount applications and is well suited for
low-voltage applications such as DC/DC converters.
G2
G1
S2
S1
Absolute Maximum Ratings
Symbol
Parameter
Rating
VDS
Drain-Source Voltage
VGS
Gate-Source Voltag
I D @ TA=25°C
I D @ TA=70°C
Units
N-channel
P-channel
+30
-30
V
±20
±20
V
3
+5
-4
A
3
+4
-3.2
A
+20
-20
A
Continuous Drain Current
Continuous Drain Current
1,4
I DM
Pulsed Drain Current
PD @ TA=25°C
Total Power Dissipation
2.0
W
Linear Derating Factor
0.016
W/°C
TSTG
Storage Temperature Range
-55 to 150
°C
TJ
Operating Junction Temperature Range
-55 to 150
°C
Thermal Data
Symbol
Rthj-amb
Rev.2.01 7/01/2004
Parameter
Thermal Resistance Junction-ambient
Max.
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Value
Unit
62.5
°C/W
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SSM4532M
N-channel Electrical Characteristics @ Tj=25oC (unless otherwise specified)
Symbol
Parameter
Test Conditions
Min.
Typ.
Max. Units
30
-
-
V
BVDSS
Drain-Source Breakdown Voltage
∆ BV DSS/∆ Tj
Breakdown Voltage Temperature Coefficient Reference to 25°C, ID=1mA
-
0.037
-
V/°C
RDS(ON)
Static Drain-Source On-Resistance
VGS=10V, ID=5A
-
-
50
mΩ
VGS=4.5V, ID=4.2A
-
-
70
mΩ
VDS=VGS, ID=250uA
1
-
3
V
VDS=10V, ID=5A
-
8
-
S
Drain-Source Leakage Current (Tj=25 C)
VDS=30V, VGS=0V
-
-
1
uA
Drain-Source Leakage Current (Tj=55oC)
VDS=24V, VGS=0V
-
-
25
uA
Gate-Source Leakage
VGS=±20V
-
-
±100
nA
ID=5A
-
10.2
20
nC
VGS(th)
Gate Threshold Voltage
gfs
Forward Transconductance
VGS=0V, ID=250uA
o
IDSS
IGSS
2
Qg
Total Gate Charge
Qgs
Gate-Source Charge
VDS=10V
-
1.2
-
nC
Qgd
Gate-Drain ("Miller") Charge
VGS=10V
-
3.4
-
nC
VDS=10V
-
6
12
ns
2
td(on)
Turn-on Delay Time
tr
Rise Time
ID=1A
-
9
18
ns
td(off)
Turn-off Delay Time
RG=6Ω,VGS=10V
-
15
30
ns
tf
Fall Time
RD=10Ω
-
5.5
12
ns
Ciss
Input Capacitance
VGS=0V
-
240
360
pF
Coss
Output Capacitance
VDS=25V
-
145
210
pF
Crss
Reverse Transfer Capacitance
f=1.0MHz
-
55
80
pF
Min.
Typ.
-
-
1.7
A
-
-
20
A
-
0.8
1.2
V
Source-Drain Diode
Symbol
IS
ISM
VSD
Parameter
Test Conditions
VD=VG=0V , VS=1.2V
Continuous Source Current ( Body Diode )
Pulsed Source Current ( Body Diode )
1
2
Forward On Voltage
Tj=25°C, IS=1.7A, VGS=0V
Max. Units
Notes:
1.Pulse width limited by max. junction temperature.
2.Pulse width <300us , duty cycle <2%.
3.Surface mounted on FR4 board, t<10sec.
4.Pulse width <10us , duty cycle <1%.
Rev.2.01 7/01/2004
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SSM4532M
P-channel Electrical Characteristics @ Tj=25oC (unless otherwise specified)
Symbol
Parameter
Test Conditions
Min.
Typ.
Max. Units
-30
-
-
V
BVDSS
Drain-Source Breakdown Voltage
∆ BVDSS/∆ Tj
Breakdown Voltage Temperature Coefficient Reference to 25°C, ID=-1mA
-
-0.028
-
V/°C
RDS(ON)
Static Drain-Source On-Resistance
VGS=-10V, ID=-4A
-
-
70
mΩ
VGS=-4.5V, ID=-3A
-
-
90
mΩ
VDS=VGS, ID=-250uA
-1
-
-3
V
VGS(th)
Gate Threshold Voltage
gfs
Forward Transconductance
IDSS
IGSS
VGS=0V, ID=250uA
VDS=-10V, ID=-4A
-
5
-
S
o
VDS=-30V, VGS=0V
-
-
-1
uA
o
Drain-Source Leakage Current (Tj=55 C)
VDS=-24V, VGS=0V
-
-
-25
uA
Gate-Source Leakage
VGS= ± 20V
-
-
±100
nA
Drain-Source Leakage Current (Tj=25 C)
2
Qg
Total Gate Charge
ID=-4A
-
18.3
36
nC
Qgs
Gate-Source Charge
VDS=-10V
-
3.6
-
nC
Qgd
Gate-Drain ("Miller") Charge
VGS=-10V
-
1.5
-
nC
VDS=-10V
-
8
16
ns
2
td(on)
Turn-on Delay Time
tr
Rise Time
ID=-1A
-
9
18
ns
td(off)
Turn-off Delay Time
RG=6Ω,VGS=-10V
-
21
40
ns
tf
Fall Time
RD=10Ω
-
10
20
ns
Ciss
Input Capacitance
VGS=0V
-
760
1140
pF
Coss
Output Capacitance
VDS=-25V
-
345
518
pF
Crss
Reverse Transfer Capacitance
f=1.0MHz
-
90
135
pF
Min.
Typ.
-
-
-1.7
A
-
-
-20
A
-
-
-1.2
V
Source-Drain Diode
Symbol
IS
ISM
VSD
Parameter
Test Conditions
VD=VG=0V , VS=-1.2V
Continuous Source Current ( Body Diode )
1
Pulsed Source Current ( Body Diode )
2
Forward On Voltage
Tj=25°C, IS=-1.7A, VGS=0V
Max. Units
Notes:
1.Pulse width limited by max. junction temperature.
2.Pulse width <300us , duty cycle <2%.
3.Surface mounted on FR4 board, t<10sec.
4.Pulse width <10us , duty cycle <1%.
Rev.2.01 7/01/2004
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SSM4532M
N-channel
50
70
T C =150 o C
o
T C =25 C
V G =10V
60
V G =10V
40
V G =8.0V
40
ID , Drain Current (A)
ID , Drain Current (A)
50
V G =6.0V
30
20
V G =8.0V
30
V G =6.0V
20
V G =4.0V
V G =4.0V
10
V G =3.0V
10
V G =3.0V
0
0
0
1
2
3
4
5
6
7
8
9
0
V DS , Drain-to-Source Voltage (V)
2
3
4
5
6
7
V DS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
85
1.8
Id=5A
T c =25°C
I D =5A
V G =10V
1.6
Normalized RDS(ON)
75
RDSON (mΩ )
1
65
55
1.4
1.2
1.0
45
0.8
35
0.6
3
4
5
6
7
8
9
10
V GS (V)
-50
0
50
100
150
T j , Junction Temperature ( o C)
Fig 3. On-Resistance vs. Gate Voltage
Rev.2.01 7/01/2004
11
Fig 4. Normalized On-Resistance
vs. Junction Temperature
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SSM4532M
N-channel
3
6
5
2
PD (W)
ID , Drain Current (A)
4
3
1
2
1
0
0
25
50
75
100
125
0
150
50
100
150
T c ,Case Temperature ( o C)
T c , Case Temperature ( o C)
Fig 5. Maximum Drain Current vs.
Fig 6. Typical Power Dissipation
Case Temperature
1
100
Normalized Thermal Response (Rthja)
DUTY=0.5
ID (A)
10
10us
1
0.1
0.1
0.05
0.02
0.01
P DM
0.01
100us
1ms
T c =25 o C
Single Pulse
0.2
t
T
SINGLE PULSE
Duty factor = t/T
Peak Tj = PDM x Rthja + Ta
10ms
100ms
0.001
0.1
0.1
1
10
100
Fig 7. Maximum Safe Operating Area
Rev.2.01 7/01/2004
0.0001
0.001
0.01
0.1
1
10
100
1000
t , Pulse Width (s)
V DS (V)
Fig 8. Effective Transient Thermal Impedance
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SSM4532M
N-channel
12
I D =5A
V DS =10V
10
Ciss
8
C (pF)
VGS , Gate to Source Voltage (V)
f=1.0MHz
1000
6
Coss
100
Crss
4
2
0
10
0
2
4
6
8
10
12
1
5
9
13
17
21
25
29
V DS (V)
Q G , Total Gate Charge (nC)
Fig 9. Gate Charge Characteristics
Fig 10. Typical Capacitance Characteristics
3
100.00
2.5
10.00
2
VGS(th) (V)
IS(A)
T j =150 o C
T j =25 o C
1.00
1.5
1
0.10
0.5
0.01
0
0.1
0.3
0.5
0.7
0.9
1.1
1.3
Fig 11. Forward Characteristic of
Rev.2.01 7/01/2004
-50
0
50
100
150
T j ,Junction Temperature ( o C)
V SD (V)
Reverse Diode
1.5
Fig 12. Gate Threshold Voltage vs.
Junction Temperature
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6 of 11
SSM4532M
N-channel
VDS
90%
RD
VDS
D
0.33x RATED VDS
G
RG
TO THE
OSCILLOSCOPE
10%
VGS
S
+
VGS
10V
-
td(on)
Fig 13. Switching Time Circuit
td(off)
tr
tf
Fig 14. Switching Time Waveform
VG
VDS
10V
0.33 x RATED VDS
G
S
QG
TO THE
OSCILLOSCOPE
D
QGS
QGD
VGS
+
1~ 3 mA
I
G
I
D
Charge
Fig 15. Gate Charge Circuit
Rev.2.01 7/01/2004
Q
Fig 16. Gate Charge Waveform
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SSM4532M
P-channel
20
20
V G =-10V
o
T C =25 C
V G =-10V
T C =150 o C
V G =-8.0V
V G =-8.0V
V G =-6.0V
-ID , Drain Current (A)
-ID , Drain Current (A)
15
V G =-4.0V
10
15
V G =-6.0V
10
V G =-4.0V
5
5
0
0
0
1
2
3
0
4
-V DS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
2
3
4
5
Fig 2. Typical Output Characteristics
90
1.8
I D =-4.0A
Id=-4.0A
T c =25°C
80
V G = -10V
1.6
Normalized RDS(ON)
70
RDSON (mΩ )
1
-V DS , Drain-to-Source Voltage (V)
60
50
1.4
1.2
1
0.8
40
0.6
30
3
4
5
6
7
8
9
10
11
0
50
100
150
o
T j , Junction Temperature ( C)
-V GS (V)
Fig 3. On-Resistance vs. Gate Voltage
Rev.2.01 7/01/2004
-50
Fig 4. Normalized On-Resistance
vs. Junction Temperature
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SSM4532M
P-channel
3
5
2.5
2
3
PD (W)
-ID , Drain Current (A)
4
1.5
2
1
1
0.5
0
0
25
50
75
100
125
0
150
50
100
150
T c ,Case Temperature ( o C)
T c , Case Temperature ( o C)
Fig 5. Maximum Drain Current vs.
Fig 6. Typical Power Dissipation
Case Temperature
1
100
Normalized Thermal Response (R thja)
DUTY=0.5
-ID (A)
10
10us
100us
1
1ms
T c =25 o C
Single Pulse
10ms
0.1
0.1
0.05
0.02
0.01
PDM
t
0.01
T
SINGLE PULSE
Duty factor = t/T
Peak Tj = P DM x Rthja+ Ta
100ms
0.1
0.1
0.2
1
10
100
0.001
0.0001
0.001
Fig 7. Maximum Safe Operating Area
Rev.2.01 7/01/2004
0.01
0.1
1
10
100
1000
t , Pulse Width (s)
-V DS (V)
Fig 8. Effective Transient Thermal Impedance
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9 of 11
SSM4532M
P-channel
12
I D =-4A
V DS =-10V
10
8
1000
Ciss
C (pF)
-VGS , Gate to Source Voltage (V)
f=1.0MHz
10000
6
4
Coss
Crss
100
2
0
10
0
2
4
6
8
10
12
14
16
18
20
1
5
9
13
17
21
25
29
-V DS (V)
Q G , Total Gate Charge (nC)
Fig 9. Gate Charge Characteristics
Fig 10. Typical Capacitance Characteristics
3
100.00
2.5
10.00
2
-VGS(th) (V)
-IS(A)
T j =150 o C
T j =25 o C
1.5
1.00
1
0.10
0.5
0.01
0
0.1
0.3
0.5
0.7
0.9
1.1
1.3
1.5
-50
0
-V SD (V)
Fig 11. Forward Characteristic of
Reverse Diode
Rev.2.01 7/01/2004
50
100
150
T j ,Junction Temperature ( o C)
Fig 12. Gate Threshold Voltage vs.
Junction Temperature
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10 of 11
SSM4532M
P-channel
VDS
90%
RD
VDS
D
RG
TO THE
OSCILLOSCOPE
0.33 x RATED VDS
G
10%
S
-10 V
VGS
VGS
td(on)
Fig 13. Switching Time Circuit
td(off) tf
tr
Fig 14. Switching Time Waveform
VG
VDS
-10V
0.33 x RATED VDS
G
S
QG
TO THE
OSCILLOSCOPE
D
QGS
QGD
VGS
-1~-3mA
I
G
ID
Charge
Fig 15. Gate Charge Circuit
Q
Fig 16. Gate Charge Waveform
Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no
guarantee or warranty, express or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no
responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its
use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including
without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to
the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of
Silicon Standard Corporation or any third parties.
Rev.2.01 7/01/2004
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