tai'mec TMPA218DS Preliminary www.taimec.com.tw / Rev.1.0 www.class-d.com.tw December 24, 2007 3.5W/CH STEREO CLASS-D AUDIO POWER AMPLIFIER GENERAL DESCRIPTION FEATURES The TMPA218DS is a stereo class-D audio power amplifier IC ♦ 2.5V to 6V Single Supply with digital volume control. With BTL (Bridge-Tied-Load) ♦ Up to 3.5W / Ch at 5.5V, 2 ohms configuration, it delivers up to 3.5W/ch (7W in all) ♦ Up to 88% Power Efficiency into a 2 ohm load. Up and down volume control signals provide ♦ Automatic output power control (APC) -60dB attenuation form maximum voltage gain. No external ♦ Memory of voltage gain at shutdown heat-sink is required. ♦ 0dB to -60dB attenuation from max. voltage gain For multiple-input applications, independent gain control and ♦ 2.2mA / Ch Quiescent Current at 5V corner frequency can be implemented by summing the input ♦ Less Than 0.2uA / Ch Shutdown Current sources through resistor ratio and input capacitor values. ♦ Pop-less Power-Up, Shutdown and Recovery Automatic output power control makes the best use of ♦ Differential 250 KHz PWM Allows Bridge-Tied Load to battery. increase Output Power and Eliminates LC Output Filter Analog input signal is converted into digital output which ♦ Thermal Shutoff and Automatic Recovery drives directly to the speaker. High power efficiency is ♦ Compatible with earphone application achieved due to digital output at the load. The audio ♦ Output Pin Short-Circuit Protection (Short to Other information is embedded in PWM（Pulse Width Modulation）. Outputs, Short to VCC, Short to Ground) ♦ Differential Signal Processing Improves CMRR APPLICATIONS Multimedia application includes Cellular Phones, PDAs, DVD/CD players, TFT LCD TVs/Monitors, 2.1 channel audio systems, USB audio. It is also ideal for other portable Package TSSOP20 Available, pb free【RoHS】 For best performance, please refer to devices like Wireless Radios. http://www.taimec.com.tw/English/EVM.htm http://www.class-d.com.tw/English/EVM.htm for PCB layout. REFERENCE CIRCUIT（Please refer to TMPA002.APP for application） RIN COM Ri RIN ROUTP PWM Power Drive PWM Power Drive ROUTN COM LOUTP LIN LOUTN Ri LIN 200K VDD SDNB UPB VCC DOWNB VCC TO PS 200K 200K Control Circuitry GND MEMO TMPA218DS Copyright©2005, Tai-1 Microelectronics Corp. 1 tai'mec TMPA218DS Preliminary www.taimec.com.tw RIN MEMO DOWNB PVDD ROUTP PGND ROUTN PVDD CAP AGND / Rev.1.0 www.class-d.com.tw TMPA218DS 20 1 19 2 18 3 17 4 16 5 15 6 14 7 13 8 12 9 11 10 December 24, 2007 COM LIN UPB PVDD LOUTP PGND LOUTN PVDD SDNB AVDD （Please email [email protected] for complete datasheet.） Tai-1 Microelectronics reserves the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers are responsible for their products and applications using Tai-1 Microelectronics components. Note that the external components or PCB layout should be designed not to generate abnormal voltages to the chip to prevent from latch up which may cause damage to the device. Typical Application IN1 COM IN2 R9 20k C4 1uF 470p C14 R7 10k C2 1uF 470p R6 20k C1 1uF C15 R11 10K IC1 C16 2nF S3 C3 33uH L2 L1 1uF VCC VO2- LS2 VO2+ switch L3 33uH R5 L4 33uH 33uH T218DS 1uF UP R14 OP EN(Option) U PB 10K VCC 20 19 18 PV DD 17 LO UTP 16 PG ND 15 LO UTN 14 PV DD 13 SD NB 12 A V DD 11 LI N C11 1uF S2 C17 C5 2nF R1 R2 330 330 DOW N R3 0 R15 OP EN(Option) PHONEJACK STEREO CO M 1uF 1 2 MEMO 3 D O WN B 4 P V DD 5 RO UTP 6 P G ND 7 RO UTN 8 P V DD 9 CA P 10A G ND RIN C7 1uF 100 C19 R10 J1 S1 VCC Copyright©2005, Tai-1 Microelectronics Corp. 1uF VO1+ LS1 VO1- C9 + C10 1uF 470uF 1uF C6 C13 1uF C8 C12 1uF VCC 2 tai'mec TMPA218DS Preliminary www.taimec.com.tw / Rev.1.0 www.class-d.com.tw December 24, 2007 ABSOLUTE MAXIMUM RATINGS Over operating free-air temperature range unless otherwise noted(1) Supply voltage, VDD, AVDD In normal mode -0.3V to 6V V In shutdown mode -0.3V to 7V V -0.3V to VDD+0.3V V Input voltage, VI Continuous total power dissipation See package dissipation ratings 。C -20 to 85 Operating free-air temperature, TA Operating junction temperature, TJ -20 to 150 Storage temperature, Tstg -40 to 150 。C 。C (1) Stresses beyond those listed under”absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions “is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. RECOMMENDED OPERATING CONDITONS PARAMETER TEST CONDITIONS Supply voltage VDD, AVDD High-level input voltage, VIH1 VIH for SDNB MIN NOM MAX 2.5 6 2 VDD Low-level input voltage, VIL1 VIL for SDNB 0 0.8 High-level input voltage, VIH2 VIH for MEMO 70%xVDD VDD Low-level input voltage, VIL2 VIL for MEMO 0 30%xVDD High-level input voltage, VIH3 VIH for UPB, DOWNB 70%xVDD VDD Low-level input voltage, VIL3 VIL for UPB, DOWNB 0 30%xVDD -20 85 VDD= AVDD = 5V Operating free-air temperature, TA UNIT V 。C PACKAGE DISSIPATION RATINGS PACKAGE TSSOP20 DERATING TA ≤ 25。C TA = 70。C TA = 85。C FACTOR POWER RATING POWER RATING POWER RATING 8.73 mW/。C 1.09W 698mW 567mW ELECTRICAL CHARACTERISTICS TA=25。C (unless otherwise noted) PARAMETER │VOS│ Output offset voltage TEST CONDITIONS (measured differentially) PSRR Power supply rejection ratio CMRR Common mode rejection ratio │IIH1│ High-level input current │IIL1│ Low-level input current │IIH2│ High-level input current │IIL2│ Low-level input current Copyright©2005, Tai-1 Microelectronics Corp. MIN TYP MAX UNIT VI=0V,AV=2, VDD=AVDD=2.5V to 5.5V 25 VDD=AVDD=2.5V to 5.5V -75 -55 dB -55 -50 dB VDD=AVDD=2.5V to 5.5V, VIC=1Vpp, RL=8Ω VDD=AVDD=5.5V, VI=5.8V (SDNB) VDD=AVDD=5.5V, VI=-0.3V (SDNB) VDD=AVDD=5.5V, VI=5.8V (MEMO) VDD=AVDD=5.5V, VI=-0.3V (MEMO) mV 30 µA 1 µA 1 µA 1 µA 3 tai'mec TMPA218DS Preliminary www.taimec.com.tw │IIH3│ High-level input current │IIL3│ Low-level input current IQ (SD) / Rev.1.0 www.class-d.com.tw VDD=AVDD=5.5V, December 24, 2007 1 VI=5.8V (UPB, DOWNB) VDD=AVDD=5.5V, 30 VI=-0.3V (UPB, DOWNB) µA µA Shutdown current / Ch V( SDN )=0.8V, VDD=AVDD=2.5V to 5.5V rDS(on) f(sw) Static output resistance VDD=AVDD=5.5V Switching frequency VDD=AVDD=2.5V to 5.5V 200 Avmax Max. BTL Gain VDD=AVDD=2.5V to 5.5V, RL=8Ω 21 RSDN Resistance from SDNB to GND V(SDNB)= 5V 200 kΩ V(UPB)= V(DOWNB)=5V 200 kΩ RIN,LIN 30 kΩ Resistance from UpB / DownB to Rud VDD ZI Input impedance 0.2 0.5 µA 300 kHz 25 db 790 mΩ 250 OPERATING CHARACTERISTICS TA=25。C, RL=8Ω speaker (unless otherwise noted) PARAMETER TEST CONDITIONS MIN RL=8Ω Output power / Ch PO RL=4Ω THD+N=10%,f=1kHz. (Limited by thermal condition) THD+N Total harmonic distortion plus noise UNIT 1.5 VDD=AVDD=5V. RL=3Ω RL=2Ω TYP MAX 2.3 W 2.7 VDD=AVDD=5.5V. 3.5 VDD=AVDD=5V, PO=1W, RL=8Ω, f=1kHz 0.2 VDD=AVDD=5V, PO=1.5W, RL=4Ω, f=1kHz 0.2 VDD=AVDD=5V, PO=1.8W, RL=3Ω, f=1kHz 0.25 % SNR Signal-to-noise ratio VDD=AVDD=5V, PO=1W, RL=8Ω 95 dB Crosstalk Crosstalk between outputs VDD=AVDD=5V, PO=1W RL=8Ω -68 dB TERMINAL FUNCTIONS TERMINAL I/O NAME DESCRIPTION PIN NO AGND 10 - AVDD 11 - Analog power supply CAP 9 I Capacitance for power up delay and UPB/DOWNB reaction time Volume down DOWNB Analog ground 3 I PGND 6,15 - Digital ground COM 20 I Common ground LIN 19 I Left channel input LOUTN 14 O Negative output of left channel LOUTP 16 O Positive output of left channel RIN 1 I Right channel input MEMO 2 I Memory ROUTN 7 O Negative output of right channel ROUTP 5 O Positive output of right channel SDNB 12 I Shutdown terminal (active low logic) Copyright©2005, Tai-1 Microelectronics Corp. 4 tai'mec TMPA218DS Preliminary www.taimec.com.tw UPB 18 I Volume up PVDD 4,8,13,17 - Digital Power supply / Rev.1.0 www.class-d.com.tw December 24, 2007 TYPICAL CHARACTERISTICS Note 1. Input coupling 1µF capacitors are used for all measurements. 2. Differential inputs are applied and BTL outputs are measured. 3. Balanced LC filter is used for THD+N measurement and power efficiency measurement. 4. Characteristic frequency of the LC filter is set 41 KHz unless otherwise specified. Volume Step and Attenuation at Vdd=5v ※ Step Attenuation(dB) 0 0 1 1 Overall Step Attenuation(dB) 23 11 12 22 ※ 12 14 AV(dB) Overall Overall Step Attenuation(dB) 11 22 36 -13 9 23 39 -16 AV(dB) AV(dB) 2 2 21 13 16 7 24 42 -19 3 3 20 14 18 5 25 45 -22 4 4 19 15 20 3 26 48 -25 5 5 18 16 22 1 27 51 -28 6 6 17 17 24 -1 28 54 -31 7 7 16 18 26 -3 29 57 -34 8 8 15 19 28 -5 30 60 -37 9 9 14 20 30 -7 31 ∞ -∞ 10 10 13 21 33 -10 Overall gain is preset at 5db at power up. Volume UP/DOWN Control ‧ Volume up and down control is executed by UPB and DOWNB digital input signals. ‧ UPB and DOWNB are “low” active. ‧ Continuous “low” at UPB or DOWNB will make volume to change continuously. ‧ A “low” at DOWNB overwrites a “low” at UPB. ‧ Timing diagram(capacitance at CAP pin has to be 1uF for following timing relationship) UPB/DOWNB Volume Level t0 Copyright©2005, Tai-1 Microelectronics Corp. tx 5 tai'mec Preliminary www.taimec.com.tw / www.class-d.com.tw TMPA218DS Rev.1.0 1. First volume change is set at falling edge of UPB/DOWNB input. 2. Second volume change is set at ~0.5s(t0) after falling edge of UPB/DOWNB input. 3. Following volume changes are set at ~0.1s(tx) from previous change. December 24, 2007 Note that the capacitance at pin CAP=1uF for t0=0.5s & t1=0.1s. The delay time t0 & t1 change linearly with capacitance at CAP pin, i.e. t0=1s & t1=0.2s if CAP=2uF. APPLICATION INFORMATION Copyright©2005, Tai-1 Microelectronics Corp. 6 tai'mec Preliminary www.taimec.com.tw / www.class-d.com.tw TMPA218DS Rev.1.0 December 24, 2007 DETAILED DESCRIPTION Efficiency The output transistors of a class D amplifier act as switches. The power loss is mainly due to the turn on resistance of the output transistors when driving current to the load. As the turn on resistance is so small that the power loss is small and the power efficiency is high. With 8 ohm load the power efficiency can be up to 88%. Shutdown The shutdown mode reduces power consumption. A LOW at shutdown pin forces the device in shutdown mode and a HIGH forces the device in normal operating mode. Shutdown mode is useful for power saving when not in use. This function is useful when other devices like earphone amplifier on the same PCB are used but class D amplifier is not necessary. Internal circuit for shutdown is shown below. Note that shutdown pin or SDNB is also used for volume control. Please refer to Voltage Gain section for details. Pop-less A soft start capacitor can be added to the CAP pin. This capacitor introduces delay for the internal circuit to be stable before driving the load. The pop or click noise when power up/down or switching in between shutdown mode can be thus eliminated. The delay time is proportional to the value of the capacitance. It is about 500ms for a capacitor of 1uF at 5v. CAP Cap provides a way of soft startup delay. A 5uA current source and a half_Vcc detector are integrated in the chip. The charged capacitor is externally hooked up. For C=1uF the half_Vcc delay is T = CV / I = （1uF × 2.5V）/ 5uA = 0.5 seconds Copyright©2005, Tai-1 Microelectronics Corp. 7 tai'mec Preliminary www.taimec.com.tw / www.class-d.com.tw TMPA218DS Rev.1.0 December 24, 2007 Voltage gain The voltage gain is preset, at power up, to 5db typical with 8 ohms load. The voltage gain can be increased by applying a LOW at UPB or decreased by applying a LOW at DOWNB. The maximum gain it can reach is 23db and the minimum gain is -55db. Beyond -55db is a MUTE. Memory of voltage gain The voltage gain is preset to 5db at power up. The voltage gain can be changed to higher or lower value by applying a LOW at UPB or DOWNB. The changed voltage gain can be memorized during shutdown if MEMO=Vcc. In other words the voltage gain is the same before and after shutdown operation with MEMO=Vcc. Note that a RC delay is necessary between Vcc & MEMO at power up to ensure proper operation of the memory. Copyright©2005, Tai-1 Microelectronics Corp. 8 tai'mec Preliminary www.taimec.com.tw / www.class-d.com.tw TMPA218DS Rev.1.0 December 24, 2007 During shutdown mode, memory of voltage gain is still in effect even battery is removed for some time. The time period in which the voltage gain is still memorized during battery removed depends on the Vcc-GND capacitance and Vcc voltage. Example 1. Four-battery power supply with Vcc-GND capacitance equals 1000uF. If the voltage of each exhausted battery to be replaced is 1.0v on average then the voltage on the 1000uF capacitor is 4.0v. Since the chip can keep memory for down to 0.5v, the voltage allowed to drop is 4.0v-0.5v=3.5v. The voltage drop is caused by the small leakage of the chip, typical 0.2uA, during shutdown. So the time to survive is CV/I =1000uF x 3.5v/ 0.2uA = 17500 sec = 4.8 hrs Example 2. Two-battery power supply with Vcc-GND capacitance equals 1000uF. If the voltage of each exhausted battery to be replaced is 1.0v on average then the voltage on the 1000uF capacitor is 2.0v. The voltage allowed to drop is 2.0v-0.5v=1.5v. With typical leakage current of 0.2uA the time to survive is CV/I =1000uF x 1.5v / 0.2uA = 7500 sec = 2.08 hrs Automatic output Power Control (APC) The voltage gain is self adjusted in the chip over voltage range. This means that, regardless supply voltage change, the output power keeps about the same for a given input level from VDD=5.5v to 2.5v. It allows the best use of the battery. Input filter Input filter is not required for most of the applications. However in some designs if it is necessary to reduce overall voltage gain, one can add an external input resistor as a voltage divider. It is advantageous to add a capacitor in between positive input and negative input to form an input filter. An example to reduce voltage gain to 60%, as shown in the schematic on page 2, is also shown below. Note that the layout of input traces has to be symmetric. Copyright©2005, Tai-1 Microelectronics Corp. 9 tai'mec TMPA218DS Preliminary www.taimec.com.tw / www.class-d.com.tw Rev.1.0 December 24, 2007 Output filter Ferrite bead filter can be used for EMI purpose. The ferrite filter reduces EMI around 1 MHz and higher（FCC and CE only test radiated emissions greater than 30 MHz）. When selecting a ferrite bead, choose one with high impedance at high frequencies, but low impedance at low frequencies. Use an LC output filter if there are low frequency（＜1 MHz）EMI sensitive circuits and/or there are long wires from the amplifier to the speaker. EMI is also affected by PCB layout and the placement of the surrounding components. The suggested LC values for different speaker impendence are showed in following figures for reference. Typical LC Output Filter (1) 33μH Vo+ 0.47µ F 0.1µ F 33μH Vo0.1µ F Copyright©2005, Tai-1 Microelectronics Corp. 10 tai'mec Preliminary www.taimec.com.tw / www.class-d.com.tw TMPA218DS Rev.1.0 December 24, 2007 Typical LC Output Filter (2) Over temperature protection A temperature sensor is built in the device to detect the temperature inside the device. When a high temperature around 145oC and above is detected the switching output signals are disabled to protect the device from over temperature. Automatic recovery circuit enables the device to come back to normal operation when the internal temperature of the device is below around 120 oC. Over current protection A current detection circuit is built in the device to detect the switching current of the output stages of the device. It disables the device when the current is beyond about 3.5amps. It protects the device when there is an accident short between outputs or between output and power/gnd pins. It also protects the device when an abnormal low impedance is tied to the output. High current beyond the specification may potentially causes electron migration and permanently damage the device. Shutdown or power down is necessary to resolve the protection situation. There is no automatic recovery from over current protection. Copyright©2005, Tai-1 Microelectronics Corp. 11 tai'mec TMPA218DS Preliminary www.taimec.com.tw / Rev.1.0 www.class-d.com.tw Physical Dimensions December 24, 2007 (IN MILLIMETERS) ± 7.72 TYP 4.16 TYP (1.78 TYP) 0.42 TYP 0.65 TYP LAND PATTERN TSSOP20 Copyright©2005, Tai-1 Microelectronics Corp. 12 tai'mec Preliminary www.taimec.com.tw / www.class-d.com.tw TMPA218DS Rev.1.0 December 24, 2007 IMPORTANT NOTICE Tai-1 Microelectronics Corp. reserves the right to make changes to its products and services and to discontinue any product or service without notice. Customers should obtain the latest relevant information for reference. Testing and quality control techniques are used to screen the parameters. Testing of all parameters of each product is not necessarily performed. Tai-1 Microelectronics Corp. assumes no liability for applications assistance or customer product design. To minimize the risks associated with customer products and applications, customers should provide adequate design and operating safeguards. Reproduction of information in data sheets or related documentation is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. Tai-1 Microelectronics Corp. is not responsible or liable for such altered documentation. Resale of Tai-1 Microelectronics Corp. products or services with statements different from the parameters stated by Tai-1 Microelectronics Corp. for that product or service voids all express and any implied warranties. Tai-1 Microelectronics Corp. is not responsible or liable for any such statements. Copyright ©2005,Tai-1 Microelectronics Corp. Copyright©2005, Tai-1 Microelectronics Corp. 13