Low Noise, Cascadable Silicon Bipolar MMIC Amplifier Technical Data INA-03100 Features • Cascadable 50 Ω Gain Block • Low Noise Figure: 2.5 dB Typical at 1.5 GHz require high gain and low noise IF or RF amplification with minimum power consumption. The INA series of MMICs is fabricated using HP’s 10 GHz fT, 25 GHz fMAX, ISOSAT™-I silicon bipolar process which uses nitride self-alignment, submicrometer lithography, trench isolation, ion implantation, gold metallization and polyimide intermetal dielectric and scratch protection to achieve excellent performance, uniformity and reliability. • High Gain: 26.0 dB Typical at 2.8 GHz • 3 dB Bandwidth: DC to 2.8 GHz • Unconditionally Stable (k>1) • Low Power Consumption Description The INA-03100 is a low-noise silicon bipolar Monolithic Microwave Integrated Circuit (MMIC) feedback amplifier chip. It is designed for narrow or wide bandwidth commercial, industrial and military applications that The recommended assembly procedure is gold-eutectic die attach at 400°C and either wedge or ball bonding using 0.7 mil gold wire.[1] Typical Biasing Configuration VCC RFC (Optional) Rbias 4 Cblock RF IN Cblock 3 1 2 5965-9676E RF OUT Vd = 5.5 V (Nominal) 6-102 Chip Outline[1] C M 7891 KA GND 2 RF OUT (3) (2) (4) 30AN (1) GND 1 RF IN Note: 1. See Application Note, “A005: Transistor Chip Use” for additional information. INA-03100 Absolute Maximum Ratings Thermal Resistance[2]: θjc = 70°C/W Absolute Maximum[1] Parameter Device Current Power Dissipation[2,3] RF Input Power Junction Temperature Storage Temperature 50 mA 200 mW +13 dBm 200°C –65 to 200°C Notes: 1. Permanent damage may occur if any of these limits are exceeded. 2. TMounting Surface (TMS) = 25°C. 3. Derate at 14.3 mW/°C for TMS > 186°C. INA-03100 Electrical Specifications[1,3], TA = 25°C Symbol Parameters and Test Conditions[2]: Id = 12 mA, ZO = 50 Ω Units Min. Typ. GP Power Gain (|S21| 2) f = 1.5 GHz ∆GP Gain Flatness f = 0.01 to 2.0 GHz f3 dB 3 dB Bandwidth ISO Reverse Isolation (|S12| 2) f = 0.01 to 2.0 GHz Input VSWR f = 0.01 to 2.0 GHz 2.05 Output VSWR f = 0.01 to 2.0 GHz 3.05 NF 50 Ω Noise Figure f = 1.5 GHz VSWR dB 26.0 dB ± 0.5 GHz 2.8 dB Max. 37 dB 2.5 P1 dB Output Power at 1 dB Gain Compression f = 1.5 GHz dBm 1.0 IP3 Third Order Intercept Point f = 1.5 GHz dBm 10 tD Group Delay f = 1.5 GHz psec Vd Device Voltage f = 1.5 GHz V dV/dT Device Voltage Temperature Coefficient 200 3.5 4.5 mV/°C 5.5 +5 Notes: 1. The recommended operating current range for this device is 8 to 20 mA. Typical performance as a function of current is on the following page. 2. RF performance of the chip is determined by packaging and testing 10 devices per wafer. 3. The values are the achievable performance for the INA-03100 mounted in a 70 mil stripline package. INA-03100 Typical Scattering Parameters[1] (ZO = 50 Ω, TA = 25°C, Id = 12 mA) S21 S11 S12 Freq. GHz Mag Ang dB Mag Ang 0.05 0.10 0.20 0.40 0.60 0.80 1.00 1.20 1.40 1.60 1.80 2.00 2.50 3.00 0.35 0.35 0.33 0.31 0.27 0.23 0.19 0.16 0.13 0.12 0.13 0.18 0.40 0.81 176 172 165 150 137 125 113 99 76 51 21 –5 –52 –86 26.6 26.6 26.4 26.1 25.6 25.0 24.5 24.0 23.8 23.6 23.6 23.8 24.7 25.6 21.4 21.3 21.0 20.1 19.0 17.8 16.7 15.9 15.4 15.2 15.5 15.5 17.2 19.1 –4 –8 –15 –29 –42 –53 –63 –72 –81 –88 –97 –106 –132 –167 S22 dB Mag Ang Mag Ang k –36.0 –36.5 –36.4 –36.0 –37.6 –36.1 –35.1 –36.9 –36.4 –35.6 –34.1 –34.3 –30.2 –27.0 .016 .015 .015 .016 .013 .016 .018 .014 .015 .017 .020 .019 .031 .045 8 –4 –5 –13 –14 –13 –16 –21 –12 –11 –5 –13 –9 –12 .56 .56 .56 .54 .54 .53 .53 .54 .55 .56 .58 .60 .67 .70 –1 –3 –4 –7 –8 –9 –10 –12 –15 –17 –20 –25 –38 –64 1.25 1.30 1.30 1.33 1.58 1.49 1.43 1.72 1.65 1.54 1.24 1.18 0.53 0.03 Note: 1. S-parameters are de-embedded from 70 mil package measured data using the package model found in the DEVICE MODELS section of the Avantek Microwave Semiconductors databook. 6-103 INA-03100 Typical Performance, TA = 25°C (unless otherwise noted: The values are the achievable performance for the INA-03100 mounted in a 70 mil stripline package.) 30 30 25 5.0 TMS = +125°C TMS = +25°C TMS = –55°C Gain Flat to DC 20 25 4.0 f = 0.1 – 2 GHz 25 10 0.1 0.2 0.5 1.0 f = 4 GHz 15 5 1.0 5.0 2.0 10 0 0 2 4 6 8 Figure 1. Typical Gain and Noise Figure vs. Frequency, TA = 25°C, Id = 12 mA. Figure 2. Device Current vs. Voltage. 15 20 25 Figure 3. Power Gain vs. Current. 8 27 10 Id (mA) Vd (V) 5.0 26 4 P1 dB 2 0 3.5 P1 dB (dBm) 4 24 NF 2.5 4.0 Id = 12 mA 0 –2 2.0 Id = 20 mA NF (dB) Gp 25 P1 dB (dBm) Gp (dB) 5 10 FREQUENCY (GHz) NF (dB) 20 10 2.0 15 Id (mA) 3.0 Id (mA) 20 NF (dB) Gp (dB) f = 3 GHz 15 3.0 Id = 8 mA Id = 8 mA –4 2.0 Id = 12 to 20 mA 1.0 1.5 –55 –25 +25 +85 +125 TEMPERATURE (°C) –8 0.1 0.2 0.5 RF OUT (3) 500 ± 13 µm 19.7 ± 0.5 mil (2) (4) 30AN (1) 5.0 Figure 5. Output Power at 1 dB Gain Compression vs. Frequency. INA-03100 Chip Dimensions GND 2 2.0 FREQUENCY (GHz) Figure 4. Output Power and 1 dB Gain Compression, NF and Power Gain vs. CaseTemperature, f = 1.5 GHz, Id = 12 mA. C M 7891 KA 1.0 GND 1 RF IN 375 ± 13 µm 14.8 ± 0.5 mil Chip thickness is 140 µm/5.5 mil. Bond Pads are 41 µm/1.6 mil typical on each side. Note: Ground Bonding is Critical. Refer to Application Bulletin, “AB-0007: INA Bonding Configuration”. 6-104 1.0 0.1 0.2 0.5 1.0 2.0 5.0 FREQUENCY (GHz) Figure 6. Noise Figure vs. Frequency.