TEC-4A Analog Technologies, Inc. HIGH EFFICIENCY TEC CONTROLLER Main features: high efficiency and high power density, high precision, and zero EMI. Specifications Target* temp. stability v.s. ambient temp.: 0.002°C/°C Target temp. offset: ±0.01°C Target temp. response time: to ≤0.1°C in less than 5 seconds at 1°C step Efficiency: ≥90% Max. output current: 4A Max. output voltage: externally adjustable from 0V to Vps − 0.2V Power supply voltage: 3.1V to 3.5V or 4.75V to 5.25V (specify 3.3V or 5V when ordering) Set-point temp.** control voltage: 0 to Vps Packaging: through hole Shielding: complete metal shielding on all 6 sides Default set-point temp. range***: 15°C to 37°C @Vps = 3.3V 15°C to 50°C @Vps = 5V Operating ambient temp. range: * -25°C to 85°C Target temperature refers to the actual cold side temperature of the TEC, on where the target is mounted. ** Set-point temperature is the temperature desired to have on the target. *** Can be customized to any range by requirement. Thermistor t Temperature Measurement Circuit Set-point Temp. Thermal Load 12 Compensation Network High Efficiency 12 H Bridge Drive Temperature 12 Monitor Circuit + TEC − Temp. Good Indication Temp. Output Figure 1 TEC Controller Block Diagram 5 5 0 E . W e d d e l l D riv e , S u ite 4 , S u n n y v a le, C A 9 4 0 8 9 , U . S . A . T e l . : (4 0 8 ) 7 4 7 -9 7 6 0 , F a x : (4 0 8 ) 7 4 7 -9 7 7 0 , W e b : w w w . a n a l o g t e c h n o l o g i e s . c o m Copyright 2000 – 2003, Analog Technologies, Inc. All Rights Reserved. 1 TEC-4A Analog Technologies, Inc. TEC Controller 4.75V to 5.25V or 3.1V to 3.3V 16 15 GND Rm 14 3 D/A Rm 5 4 Voltage Ref. To Microprocessor From Microprocessor 2 1 9 8 A/D Ri TECPOS VPS 12 + PGND TEC PGND − 13 TEMPSP TECNEG TECCRT GND RTH 3V 11 t TEMPGD SDNG TEMP GND CMIN VTEC 7 6 3M Cd Rd 1M 0.33uF Rp Ci 3M 0.22uF Thermistor Rth = 10K @ 25 oC 10 Compensation network (Provided by internal components) Figure 2 TEC Controller Connections Pin Descriptions Pin 1, TEMPGD, Temperature good indication. It is pulled high when the set-point temperature and the actual target temperature are less than 0.1°C in difference. The internal pull up resistor to Vps is 10K Ohm. The pull down resistance is 250 Ohm @ Vps = 5V and 330 Ohm @ Vps = 3.3V. Pin 2, 3V, reference voltage output, 3V. It can be used for external A/D’s and/or D/A’s. Maximum output sourcing current 1.5mA and sinking current is 4mA. ∆Vo = 50ppm/°C max. Pin 3, TEMPSP, target temperature set-point value. The open circuit voltage is 1.5V, corresponding to a set-point temperature of 25°C. When Vps = 5V, it can be set from 0V to 5V and the set-point temperature changes from 15°C to 50°C (See the curve in the back). The input impedance is 10KΩ. When Vps = 3.3V, the max. TEMPSP can be set to 3.3V, corresponding to 37°C. This pin can be set by using a D/A, a POT, or a single resister. When the set-point temp. is fixed at 25°C, leave this pin unconnected. Pin 4, GND, signal ground for the A/D, D/A and the thermistor. Pin 5, TECCRT, TEC control voltage input. It can be left unconnected or used to control the TEC voltage directly. Set TECCRT between 0V to Vps, the voltage across TEC will be: TEC voltage = Vps − 2*TECCRT. It can also be used to configure the maximum voltage cross the TEC: Max. TEC voltage = Vps*Rm/(Rm+10K), where Rm is the resistance of the two resistors one between TECCRT to GND and the other between TECCRT to Vps, see Figure 2. 5 5 0 E . W e d d e l l D riv e , S u ite 4 , S u n n y v a le, C A 9 4 0 8 9 , U . S . A . T e l . : (4 0 8 ) 7 4 7 -9 7 6 0 , F a x : (4 0 8 ) 7 4 7 -9 7 7 0 , W e b : w w w . a n a l o g t e c h n o l o g i e s . c o m Copyright 2000 – 2003, Analog Technologies, Inc. All Rights Reserved. 2 Analog Technologies, Inc. TEC-4A Pin 6, VTEC, TEC voltage indication. TEC voltage = [max. TEC voltage]*[Vps − 2*VTEC]/Vps. When TECCRT is used to control the TEC voltage directly, measure TECCRT to derive the TEC voltage instead, and use this formula: TEC voltage = Vps − 2*TECCRT. The maximum driving current of pin VTEC is 30mA and the output voltage swing is 0V to Vps. Pin 7, CMIN, compensation input pin for the thermal loop control. Leave it open in production. When prototyping, use this pin with a tuner on the evaluation board (produced by ATI) to tune the compensation network to match the characteristics of the thermal load. Pin 8, TEMP, actual target temperature. It swings from 0V to Vps, corresponds to 15°C to 37°C when Vps is 3.3V and 15°C to 50°C when Vps equals 5V, see the curve in the below. Pin 9, SDNG, shut down control. When pulled low, it shuts down the controller. Leave it open or pull it high to activate the controller. This pin is internal pull up by a resister of 100K to Vps. Pin 10, GND, signal ground, internally connected to Pin 4 GND. Can be used for connecting the thermistor. Pin 11, RTH, connect to the thermistor for sensing the target temp. Thermistor’s other end connects to the signal ground, pin 4 or pin 10. Rth = 10KΩ @ 25°C. Other thermistors or temperature sensors can also be used, Consult with us. Pin 12, TECPOS, connects to TEC positive terminal. Pin 13, TECNEG, connects to TEC negative terminal. Pin 14, PGND, power ground for connecting to the power supply. Pin 15, PGND, power ground for connecting to the power supply, internally connected with pin 14. Pin 16, VPS, positive power supply rail. Two possible values: 3.3V and 5V, depending on the module. Customizations It is often found that some of the default specifications do not meet our users particular need. We offer customizations on these specifications: 1. Maximum TEC voltage. When ordering, the part number will become: TEC-4A-5V-(max. TEC voltage). E.g., TEC-4A-5V-4V. 2. Set-point temperature range. When ordering, specify the lower limit, the upper limit, and the open circuit temperature. The part number will become: TEC-4 A-5V-4V-(lower temp. limit)/(upper temp. limit)/(open circuit temp.), where lower temp. limit is the temperature corresponding to TEMPSP = 0V; upper temp. limit is the corresponding to TEMPSP = 3V; open circuit temp. corresponding to TEMPSP = 1.5V or being left unconnected. E.g., TEC-4A-5V-4V-20/80/60. 5 5 0 E . W e d d e l l D riv e , S u ite 4 , S u n n y v a le, C A 9 4 0 8 9 , U . S . A . T e l . : (4 0 8 ) 7 4 7 -9 7 6 0 , F a x : (4 0 8 ) 7 4 7 -9 7 7 0 , W e b : w w w . a n a l o g t e c h n o l o g i e s . c o m Copyright 2000 – 2003, Analog Technologies, Inc. All Rights Reserved. 3 TEC-4A Analog Technologies, Inc. VPS 16 3V PGND 15 3 TEMPSP PGND 14 4 GND TECNEG 13 5 TECCRT TECPOS 12 6 VTEC RTH 11 7 CMIN GND 10 8 TEMP SDNG 9 1 TEMPGD 2 27mm 21.5mm Figure 3 Top View of TEC-4A 11mm 0.42mm 3mm 18mm Figure 4 End View of TEC-4A 11mm 3mm 0.6mm 2.54mm Figure 5 Side View of TEC-4A 5 5 0 E . W e d d e l l D riv e , S u ite 4 , S u n n y v a le, C A 9 4 0 8 9 , U . S . A . T e l . : (4 0 8 ) 7 4 7 -9 7 6 0 , F a x : (4 0 8 ) 7 4 7 -9 7 7 0 , W e b : w w w . a n a l o g t e c h n o l o g i e s . c o m Copyright 2000 – 2003, Analog Technologies, Inc. All Rights Reserved. 4 TEC-4A Analog Technologies, Inc. Ordering Guide Part Number Description TEC-4A-5V-XX 5V power supply in DIP package. TEC-4A-3V-XX 3.3V power supply in DIP package. Note Max. TEC voltage can be selected from 4.8V, 4V, 3.5V, 3V, 2.5V and 2V or required one Max. TEC voltage can be selected from 2.5V and 2V or required one 5 5 0 E . W e d d e l l D riv e , S u ite 4 , S u n n y v a le, C A 9 4 0 8 9 , U . S . A . T e l . : (4 0 8 ) 7 4 7 -9 7 6 0 , F a x : (4 0 8 ) 7 4 7 -9 7 7 0 , W e b : w w w . a n a l o g t e c h n o l o g i e s . c o m Copyright 2000 – 2003, Analog Technologies, Inc. All Rights Reserved. 5 TEC-4A Analog Technologies, Inc. Rth v.s. Temperature Rth (K Ohm) 30 25 20 15 10 5 0 5 10 15 20 25 30 35 40 Temperature (C) 45 50 55 60 TEMPSP v.s. Temperature TEMPSP (V) 5 4.5 4 3.5 3 2.5 2 1.5 1 0.5 0 15 20 25 30 35 40 45 50 Temperature (C) 5 5 0 E . W e d d e l l D riv e , S u ite 4 , S u n n y v a le, C A 9 4 0 8 9 , U . S . A . T e l . : (4 0 8 ) 7 4 7 -9 7 6 0 , F a x : (4 0 8 ) 7 4 7 -9 7 7 0 , W e b : w w w . a n a l o g t e c h n o l o g i e s . c o m Copyright 2000 – 2003, Analog Technologies, Inc. All Rights Reserved. 6 TEC-4A Analog Technologies, Inc. I Rth v.s. Temperature I Rth (uA) 114 109 104 99 94 89 84 79 74 69 64 59 54 15 20 25 30 35 40 45 50 40 45 50 Temperature (C) V Rth v.s. Temperature V Rth (V) 0.9 0.85 0.8 0.75 0.7 0.65 0.6 0.55 0.5 0.45 0.4 15 20 25 30 35 Temperature (C) 5 5 0 E . W e d d e l l D riv e , S u ite 4 , S u n n y v a le, C A 9 4 0 8 9 , U . S . A . T e l . : (4 0 8 ) 7 4 7 -9 7 6 0 , F a x : (4 0 8 ) 7 4 7 -9 7 7 0 , W e b : w w w . a n a l o g t e c h n o l o g i e s . c o m Copyright 2000 – 2003, Analog Technologies, Inc. All Rights Reserved. 7 TEC-4A Analog Technologies, Inc. P Rth (uW) 54 53.5 53 52.5 52 51.5 51 50.5 50 49.5 49 48.5 48 47.5 47 46.5 46 15 P Rth v.s. Temperature 20 25 30 35 40 45 50 45 50 Temperature (C) Linearity Error in TEMPSP (V) 0.255 0.24 0.225 0.21 0.195 0.18 0.165 0.15 0.135 0.12 0.105 0.09 0.075 0.06 0.045 0.03 0.015 0 -0.015 15 Linearity Error in TEMPSP v.s. Temperature 20 25 30 35 40 Temperature (C) 5 5 0 E . W e d d e l l D riv e , S u ite 4 , S u n n y v a le, C A 9 4 0 8 9 , U . S . A . T e l . : (4 0 8 ) 7 4 7 -9 7 6 0 , F a x : (4 0 8 ) 7 4 7 -9 7 7 0 , W e b : w w w . a n a l o g t e c h n o l o g i e s . c o m Copyright 2000 – 2003, Analog Technologies, Inc. All Rights Reserved. 8