ICS ICS553MIT

ICS553
LOW SKEW 1 TO 4 CLOCK BUFFER
Description
Features
The ICS553 is a low skew, single input to four output,
clock buffer. Part of ICS’ ClockBlocksTM family, this is
our lowest skew, small clock buffer.
•
•
•
•
•
•
•
•
See the ICS552-02 for a 1 to 8 low skew buffer. For
more than 8 outputs see the MK74CBxxx BuffaloTM
series of clock drivers.
ICS makes many non-PLL and PLL based low skew
output devices as well as Zero Delay Buffers to
synchronize clocks. Contact us for all of your clocking
needs.
Extremely low skew outputs (50 ps maximum)
Packaged in 8-pin SOIC
Available in Pb (lead) free package
Low power CMOS technology
Operating Voltages of 2.5 to 5V
Output Enable pin tri-states outputs
5V tolerant input clock
Industrial temperature
Block Diagram
Q0
Q1
ICLK
Q2
Q3
Output Enable
1
MDS 553 H
I n t e gra te d C i r c u i t S y s t e m s
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Revision 080404
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ICS553
LOW SKEW 1 TO 4 CLOCK BUFFER
Pin Assignment
VDD
1
8
OE
Q0
2
7
Q3
Q1
3
6
Q2
GND
4
5
I CLK
8 Pi n ( 150 mi l ) SOI C
Pin Descriptions
Pin
Pin
Number Name
Pin
Type
Pin Description
1
VDD
Power
Connect to +2.5V, +3.3V or +5.0V.
2
Q0
Output
Clock Output 0.
3
Q1
Output
Clock Output 1.
4
GND
Power
Connect to ground.
5
ICLK
Input
Clock Input. 5V tolerant input.
6
Q2
Output
Clock Output 2.
7
Q3
Output
Clock Output 3.
8
OE
Input
Output Enable. Tri-states outputs when low. Connect to VDD for normal operation.
External Components
A minimum number of external components are required for proper operation. A decoupling capacitor of
0.01 µF should be connected between VDD on pin 1 and GND on pin 4, as close to the device as possible.
A 33 Ω series terminating resistor may be used on each clock output if the trace is longer than 1 inch.
To achieve the low output skew that the ICS553 is capable of, careful attention must be paid to board
layout. Essentially, all 4 outputs must have identical terminations, identical loads and identical trace
geometries. If they do not, the output skew will be degraded. For example, using a 30Ω series termination
on one output (with 33Ω on the others) will cause at least 15ps of skew.
2
MDS 553 H
In te grated Circuit Systems
●
525 Ra ce Street, San Jose, CA 9512 6
Revision 080404
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ICS553
LOW SKEW 1 TO 4 CLOCK BUFFER
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the ICS553. These ratings, which
are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of the
device at these or any other conditions above those indicated in the operational sections of the
specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can
affect product reliability. Electrical parameters are guaranteed only over the recommended operating
temperature range.
Item
Rating
Supply Voltage, VDD
7V
Output Enable and All Outputs
-0.5V to VDD+0.5V
ICLK
-0.5V to 5.5V
Ambient Operating Temperature
-40 to +85 °C
Storage Temperature
-65 to +150°C
Junction Temperature
175°C
Soldering Temperature
260°C
Recommended Operation Conditions
Parameter
Min.
Max.
Units
-40
+85
°C
+2.375
+5.25
V
Ambient Operating Temperature
Power Supply Voltage (measured in respect to GND)
Typ.
DC Electrical Characteristics
VDD=2.5V ±5%, Ambient temperature -40 to +85 °C, unless stated otherwise
Parameter
Symbol
Operating Voltage
Conditions
Max.
Units
2.375
2.625
V
VDD/2+0.5
5.5
V
VDD/2-0.5
V
VDD
V
0.7
V
VDD
Input High Voltage, ICLK
VIH
Note 1
Input Low Voltage, ICLK
VIL
Note 1
Input High Voltage, OE
VIH
Input Low Voltage, OE
VIL
Output High Voltage
VOH
IOH = -16 mA
Output Low Voltage
VOL
IOL = 16 mA
Operating Supply Current
IDD
No load, 135 MHz
Nominal Output Impedance
ZO
Input Capacitance
CIN
Short Circuit Current
IOS
Typ.
1.8
2
V
0.4
ICLK, OE pin
●
525 Ra ce Street, San Jose, CA 9512 6
V
25
mA
20
Ω
5
pF
±28
mA
3
MDS 553 H
In te grated Circuit Systems
Min.
Revision 080404
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ICS553
LOW SKEW 1 TO 4 CLOCK BUFFER
DC Electrical Characteristics (continued)
VDD=3.3V ±5% , Ambient temperature -40 to +85 °C, unless stated otherwise
Parameter
Symbol
Operating Voltage
Conditions
Min.
Max.
Units
3.15
3.45
V
VDD/2+0.7
5.5
V
VDD/2-0.7
V
VDD
V
0.8
V
VDD
Input High Voltage, ICLK
VIH
Note 1
Input Low Voltage, ICLK
VIL
Note 1
Input High Voltage, OE
VIH
Input Low Voltage, OE
VIL
Output High Voltage
VOH
IOH = -25 mA
Output Low Voltage
VOL
IOL = 25 mA
Output High Voltage (CMOS
Level)
VOH
IOH = -12 mA
Operating Supply Current
IDD
No load, 135 MHz
Nominal Output Impedance
ZO
Input Capacitance
CIN
Short Circuit Current
IOS
Typ.
2
2.4
V
0.4
VDD-0.4
V
V
35
mA
20
Ω
5
pF
±50
mA
ICLK, OE pin
VDD=5V ±5% , Ambient temperature -40 to +85 °C, unless stated otherwise
Parameter
Symbol
Operating Voltage
Conditions
Min.
Max.
Units
4.75
5.25
V
VDD/2+1
5.5
V
VDD/2-1
V
VDD
V
0.8
V
VDD
Input High Voltage, ICLK
VIH
Note 1
Input Low Voltage, ICLK
VIL
Note 1
Input High Voltage, OE
VIH
Input Low Voltage, OE
VIL
Output High Voltage
VOH
IOH = -35 mA
Output Low Voltage
VOL
IOL = 35 mA
Output High Voltage (CMOS
Level)
VOH
IOH = -12 mA
Operating Supply Current
IDD
No load, 135 MHz
Nominal Output Impedance
ZO
Input Capacitance
CIN
Short Circuit Current
IOS
Typ.
2
2.4
V
0.4
VDD-0.4
ICLK, OE pin
V
V
45
mA
20
Ω
5
pF
±80
mA
Notes: 1. Nominal switching threshold is VDD/2
4
MDS 553 H
In te grated Circuit Systems
●
525 Ra ce Street, San Jose, CA 9512 6
Revision 080404
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tel (4 08) 295-9 800
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ICS553
LOW SKEW 1 TO 4 CLOCK BUFFER
AC Electrical Characteristics
VDD = 2.5V ±5%, Ambient Temperature -40 to +85 °C, unless stated otherwise
Parameter
Symbol
Conditions
Min.
Input Frequency
Typ.
0
Max. Units
200
MHz
Output Rise Time
tOR
0.8 to 2.0V, CL=15pF
1.0
1.5
ns
Output Fall Time
tOF
2.0 to 0.8V, CL=15pF
1.0
1.5
ns
3
5
ns
0
50
ps
500
ps
Propagation Delay
Note 1
Output to output skew
Note 2
2.2
Rising edges at VDD/2
Device to device skew
Rising edges at VDD/2
VDD = 3.3V ±5%, Ambient Temperature -40 to +85 °C, unless stated otherwise
Parameter
Symbol
Conditions
Min.
Input Frequency
Typ.
0
Max. Units
200
MHz
Output Rise Time
tOR
0.8 to 2.0V, CL=15pF
0.6
1.0
ns
Output Fall Time
tOF
2.0 to 0.8V, CL=15pF
0.6
1.0
ns
2.4
4
ns
0
50
ps
500
ps
Propagation Delay
Note 1
Output to output skew
Note 2
2.0
Rising edges at VDD/2
Device to device skew
Rising edges at VDD/2
VDD = 5V ±5%, Ambient Temperature -40 to +85 °C, unless stated otherwise
Parameter
Symbol
Conditions
Min.
Input Frequency
Typ.
0
Max. Units
200
MHz
Output Rise Time
tOR
0.8 to 2.0V, CL=15pF
0.3
0.7
ns
Output Fall Time
tOF
2.0 to 0.8V, CL=15pF
0.3
0.7
ns
2.5
4
ns
0
50
ps
500
ps
Propagation Delay
Note 1
Output to output skew
Note 2
1.8
Rising edges at VDD/2
Device to device skew
Rising edges at VDD/2
Notes: 1. With rail to rail input clock
2. Between any 2 outputs with equal loading.
3. Duty cycle on outputs will match incoming clock duty cycle. Consult ICS for tight duty cycle clock
generators.
Thermal Characteristics
Parameter
Symbol
Conditions
Min.
Typ.
Max. Units
Thermal Resistance Junction to
Ambient
θJA
Still air
150
°C/W
θJA
1 m/s air flow
140
°C/W
θJA
3 m/s air flow
120
°C/W
Thermal Resistance Junction to Case
θJC
40
°C/W
5
MDS 553 H
In te grated Circuit Systems
●
525 Ra ce Street, San Jose, CA 9512 6
Revision 080404
●
tel (4 08) 295-9 800
●
w w w. i c s t . c o m
ICS553
LOW SKEW 1 TO 4 CLOCK BUFFER
Package Outline and Package Dimensions (8 pin SOIC, 150 Mil. Narrow Body)
Package dimensions are kept current with JEDEC Publication No. 95
Millimeters
8
E
Inches
Symbol
Min
Max
Min
Max
A
1.35
1.75
.0532
.0688
A1
0.10
0.25
.0040
.0098
B
0.33
0.51
.013
.020
C
0.19
0.25
.0075
.0098
D
4.80
5.00
.1890
.1968
E
3.80
4.00
.1497
.1574
H
INDEX
AREA
e
1 2
D
1.27 BASIC
0.050 BASIC
H
5.80
6.20
.2284
.2440
h
0.25
0.50
.010
.020
L
0.40
1.27
.016
.050
α
0°
8°
0°
8°
A
h x 45
A1
C
-Ce
SEATING
PLANE
B
L
.10 (.004)
C
Ordering Information
Part / Order Number
Marking
Shipping Packaging
Package
Temperature
ICS553MI
ICS553MIT
ICS553MILF
ICS553MILFT
553MI
553MI
553MILF
553MILF
Tubes
Tape and Reel
Tubes
Tape and Reel
8-pin SOIC
8-pin SOIC
8-pin SOIC
8-pin SOIC
-40 to +85 °C
-40 to +85 °C
-40 to +85 °C
-40 to +85 °C
“LF” denotes Pb (lead) free package.
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems (ICS)
result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial
applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary
environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any
circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or
critical medical instruments.
6
MDS 553 H
In te grated Circuit Systems
●
525 Ra ce Street, San Jose, CA 9512 6
Revision 080404
●
tel (4 08) 295-9 800
●
w w w. i c s t . c o m