MX23L25611 256M-BIT (16M x 16 / 32M x 8) MASK ROM WITH PAGE MODE (SSOP ONLY) FEATURES • Bit organization - 32M x 8 (byte mode) - 16M x 16 (word mode) • Fast access time - Random access: 100ns (max.) - Page access: 30ns (max.) • Page Size - 8 words per page • Current - Operating: 30mA (max.) @ 5MHz - Standby: 15uA (max.) • Supply voltage - 3.0V ~ 3.6V • Package - 70 pin SSOP • Temperature - 0~70° C PIN CONFIGURATION PIN DESCRIPTION A21 A20 A18 A17 A7 A6 A5 A4 A3 A2 A1 A0 NC NC NC NC NC NC NC NC NC NC CE# VSS VSS OE# D0 D8 D1 D9 D2 D10 D3 D11 VSS 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 MX23L25611 70 PIN SSOP 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 A19 A8 A9 A10 A11 A12 A13 A14 A15 A16 A23 BYTE# NC NC NC NC NC NC NC NC NC NC A22 VSS VSS D15 D7 D14 D6 D13 D5 D12 D4 VCC VCC Symbol Pin Function A0~A23 Address Inputs D0~D14 Data Outputs D15/A-1 D15 (Word Mode) / LSB Address (Byte Mode) CE# Chip Enable Input OE# Output Enable Input BYTE# Word/Byte Mode Selection VCC Power Supply Pin VSS Ground Pin NC No Connection MODE SELECTION CE# OE# BYTE# D15/A-1 D0~D7 D8~D15 Mode Power H X X X High Z High Z - Stand-by L H X X High Z High Z - Active L L H Output D0~D7 D8~D15 Word Active L L L Input D0~D7 High Z Byte Active P/N:PM0822 REV. 1.3, NOV. 21, 2002 1 MX23L25611 BLOCK DIAGRAM A0/(A-1) A2 A3 Address Buffer Memory Array Page Decoder Page Buffer Word/ Byte Output Buffer A23 D0 D15/(D7) CE# BYTE# OE# ORDER INFORMATION Part No. MX23L25611MC-10 Access Time 100ns Package 70 pin SSOP MX23L25611MC-12 120ns 70 pin SSOP VCC 3.0V~3.6V (under development) 3.0V~3.6V (under development) ABSOLUTE MAXIMUM RATINGS Item Voltage on any Pin Relative to VSS Ambient Operating Temperature Storage Temperature Symbol VIN Topr Tstg P/N:PM0822 Ratings -0.3V to 3.9V 0° C to 70° C -65° C to 125° C REV. 1.3, NOV. 21, 2002 2 MX23L25611 DC CHARACTERISTICS (Ta = 0° C ~ 70° C, VCC = 3.0V ~ 3.6V) Item Symbol MIN. MAX. Conditions Output High Voltage VOH 2.4V - IOH = -0.4mA Output Low Voltage VOL - 0.4V IOL = 1.6mA Input High Voltage VIH 2.2V VCC+0.3V Input Low Voltage VIL -0.3V 0.2xVCC Input Leakage Current ILI - 10uA 0V, VCC Output Leakage Current ILO - 10uA 0V, VCC Operating Current ICC - 30mA f=5MHz, all output open CE#=VIL(Chip Enable) OE#=VIH(Output Disabled) Standby Current (TTL) ISTB1 - 1mA CE# = VIH Standby Current (CMOS) ISTB2 - 15uA CE# > VCC-0.2V Input Capacitance CIN - 10pF Ta = 25° C, f = 1MHZ Output Capacitance COUT - 10pF Ta = 25° C, f = 1MHZ AC CHARACTERISTICS (Ta = 0° C ~ 70° C, VCC = 3.0V ~ 3.6V) Item Symbol 23L25611-10 23L25611-12 MIN. MAX. MIN. MAX. Read Cycle Time tRC 100ns - 120ns - Address Access Time tAA - 100ns - 120ns Chip Enable Access Time tCE - 100ns - 120ns Page Mode Access Time tPA - 30ns - 30ns Output Enable Time tOE - 30ns 0 30ns Output Hold After Address tOH 0ns - 0ns - Output High Z Delay tHZ - 20ns - 20ns AC Test Conditions Input Pulse Levels 0.4V~ 2.4V Input Rise and Fall Times 10ns Input Timing Level 1.5V Output Timing Level 1.5V Output Load See Figure IOH (load)= -0.4mA DOUT IOL (load)=1.6mA C< 100pF Note:No output loading is present in tester load board. Active loading is used and under software programming control. Output loading capacitance includes load board's and all stray capacitance. P/N:PM0822 REV. 1.3, NOV. 21, 2002 3 MX23L25611 TIMING DIAGRAM RANDOM READ ADD ADD ADD ADD tRC tCE CE# tOE OE# VALID DATA tHZ tOH tAA VALID VALID PAGE READ VALID ADD A3-A23 (A-1), A0, A1, A2 2'nd ADD 1'st ADD tAA DATA 3'rd ADD tPA VALID VALID P/N:PM0822 VALID REV. 1.3, NOV. 21, 2002 4 MX23L25611 PACKAGE INFORMATION P/N:PM0822 REV. 1.3, NOV. 21, 2002 5 MX23L25611 REVISION HISTORY Revision # 1.0 1.1 1.2 1.3 Description 1. Changed heading as "RELIMINARY” 2. Modify Pin Configuration--Pin#6~15, Pin#24,25,68,69 1. Modify Pin Configuration--Pin#10~14, 25,26 1. Modify Pin Configuration 2. Modify Operating Current:60mA-->30mA; Standby Currrent(CMOS):50uA-->15uA 3. Modify MODE SELECTION 4. Add 120ns in AC Characteristics 5. Add Order Informaion 6. Modify 70 pin SOP --> 70 pin SSOP Modify Package Information P/N:PM0822 Page P1 P1 P1 P1 P1,2 P1 P3 P2 P1,2,5 P5 Date SEP/06/2001 SEP/07/2001 FEB/01/2002 NOV/21/2002 REV. 1.3, NOV. 21, 2002 6 MX23L25611 MACRONIX INTERNATIONAL CO., LTD. Headquarters: TEL:+886-3-578-6688 FAX:+886-3-563-2888 Europe Office : TEL:+32-2-456-8020 FAX:+32-2-456-8021 Hong Kong Office : TEL:+86-755-834-335-79 FAX:+86-755-834-380-78 Japan Office : Kawasaki Office : TEL:+81-44-246-9100 FAX:+81-44-246-9105 Osaka Office : TEL:+81-6-4807-5460 FAX:+81-6-4807-5461 Singapore Office : TEL:+65-6346-5505 FAX:+65-6348-8096 Taipei Office : TEL:+886-2-2509-3300 FAX:+886-2-2509-2200 MACRONIX AMERICA, INC. TEL:+1-408-262-8887 FAX:+1-408-262-8810 http : //www.macronix.com MACRONIX INTERNATIONAL CO., LTD. reserves the right to change product and specifications without notice.