PRELIMINARY PRODUCT INFORMATION MOS INTEGRATED CIRCUIT µPD78F4937 16-BIT SINGLE-CHIP MICROCONTROLLER The µPD78F4937, 78K/IV Series' product, is a flash memory version of the µPD784937 with internal masked ROM. Data can be written to or erased from the flash memory of the µPD78F4937 with the microcontroller mounted on the printed wiring board. For specific functions and other detailed information, consult the following user's manuals. These manuals are required reading for design work. µPD784937 Subseries User's Manual, Hardware : To be created 78K/IV Series User's Manual, Instruction : U10905E FEATURES • • • • Pin-compatible with mask ROM model (except VPP pin) Flash memory: 192K bytes Internal RAM: 8,192 bytes Same operating voltage as mask ROM model (VDD = 4.0 to 5.5 V) ORDERING INFORMATION Part number µPD78F4937GC-8EU µPD78F4937GF-3BA Package 100-pin plastic LQFP (fine pitch) (14 × 14 mm) 100-pin plastic QFP (14 × 20 mm) Internal ROM Flash memory Flash memory The information contained in this document is being issued in advance of the production cycle for the device. The parameters for the device may change before final production or NEC Corporation, at its own discretion, may withdraw the device prior to its production. Document No. U13573EJ1V0PM00 (1st edition) Date Published August 1998 J CP(K) Printed in Japan © 1998 µPD78F4937 78K/IV SERIES PRODUCT DEVELOPMENT DIAGRAM : In production : Under development Standard Products Development Connectable to the I2C bus Connectable to the multimaster I2C bus µ PD784038Y µPD784225Y µPD784038 µ PD784026 A/D converters, 16-bit timers, and power management functions have been enhanced. Internal memory has been expanded. Pin-compatible with the µ PD784026 Connectable to the multimaster I2C bus µ PD784225 80 pins ROM correction function has been added. Connectable to the multimaster I2C bus µPD784216Y µPD784218Y µ PD784216 µ PD784218 100 pins I/O has been enhanced. Internal memory has been expanded. Internal memory has been expanded. ROM correction function has been added. µ PD784054 µ PD784046 Built-in 10-bit A/D converter ASSP Development µ PD784955 DC inverter control µ PD784908 Built-in IEBusTM controller µ PD784937 Functions of the µ PD784908 have been enhanced. Internal memory has been expanded. ROM correction function has been added. Connectable to the multimaster I2C bus µ PD784928Y µ PD784915 µ PD784928 Functions of the µ PD784915 have been enhanced. Software servo control Built-in analog circuit for VCR Timers have been enhanced. 2 Preliminary Product Information µPD78F4937 FUNCTIONS (1/2) Item Function Number of basic instructions (mnemonics) 113 General-purpose register 8 bits × 16 registers × 8 banks, or 16 bits × 8 registers × 8 banks (memory mapping) Minimum instruction execution time 160 ns/320 ns/636 ns/1.27 µs (at 12.58 MHz) Internal memory Flash memory 192K bytes RAM 8,192 bytes Memory space I/O ports Additional function pins Program and data: 1M byte Total 80 Input 8 Input/output 72 LED direct drive outputs 24 Transistor direct drive 8 N-ch open drain 4 Note Real-time output ports 4 bits × 2, or 8 bits × 1 IEBus controller Incorporated (simple version) Timer/counter Timer/counter 0 : (16 bits) Timer register × 1 Capture register × 1 Compare register × 2 Pulse output capability • Toggle output • PWM/PPG output • One-shot pulse output Timer/counter 1 : (16 bits) Timer register × 1 Capture register × 1 Capture/compare register × 1 Compare register × 1 Real-time output port Timer/counter 2 : (16 bits) Timer register × 1 Capture register × 1 Capture/compare register × 1 Compare register × 1 Pulse output capability • Toggle output • PWM/PPG output Timer 3 (16 bits) Timer register × 1 Compare register × 1 : Clock timer Interrupt requests are generated at 0.5-second intervals. (A clock timer oscillator is incorporated.) Either the main clock (12.58 MHz) or real-timer clock (32.768 kHz) can be selected as the input clock. Clock output Selected from fCLK, fCLK/2, fCLK/4, fCLK/8, or fCLK/16 (can be used as a 1-bit output port) PWM outputs 12-bit resolution × 2 channels Serial interface UART/IOE (3-wire serial I/O) : 2 channels (incorporating baud rate generator) CSI (3-wire serial I/O) : 2 channels Note Additional function pins are included in the I/O pins. Preliminary Product Information 3 µPD78F4937 (2/2) Item Function A/D converter 8-bit resolution × 8 channels Watchdog timer 1 channel ROM correction function Internal (four correction addresses can be set.) External expansion function Provided (up to 1M byte) Standby HALT/STOP/IDLE mode Interrupt Hardware source 27 (20 internals, 7 externals (sampling clock variable input: 1)) Software BRK or BRKCS instruction, operand error Nonmaskable 1 internal, 1 external Maskable 19 internals, 6 externals • 4-level programmable priority • 3 operation statuses: vectored interrupt, macro service, context switching 4 Power supply voltage VDD = 4.0 to 5.5 V Package • 100-pin plastic LQFP (fine pitch) (14 × 14 mm) • 100-pin plastic QFP (14 × 20 mm) Preliminary Product Information µPD78F4937 CONTENTS 1. DIFFERENCES AMONG MODELS IN µPD784937 SUBSERIES....................................................6 2. PIN CONFIGURATION (TOP VIEW) ................................................................................................7 3. BLOCK DIAGRAM ...........................................................................................................................10 4. LIST OF PIN FUNCTIONS ...............................................................................................................11 5. 4.1 Port Pins (1/2) ....................................................................................................................................... 11 4.1 Port Pins (2/2) ....................................................................................................................................... 12 4.2 Non-Port Pins (1/2) ............................................................................................................................... 13 4.2 Non-Port Pins (2/2) ............................................................................................................................... 14 4.3 I/O Circuits for Pins and Handling of Unused Pins ........................................................................... 15 INTERNAL MEMORY SWITCHING (IMS) REGISTER....................................................................18 6. FLASH MEMORY PROGRAMMING................................................................................................19 6.1 Selecting the Transmission Method ................................................................................................... 19 6.2 Flash Memory Programming Functions ............................................................................................. 20 6.3 Connecting the Flashpro III ................................................................................................................. 20 7. PACKAGE DRAWINGS ...................................................................................................................21 APPENDIX A DEVELOPMENT TOOLS...............................................................................................23 APPENDIX B RELATED DOCUMENTS ..............................................................................................26 Preliminary Product Information 5 µPD78F4937 1. DIFFERENCES AMONG MODELS IN µPD784937 SUBSERIES The only difference among the µPD784935, µPD784936, and µPD784937 models lie in the internal memory capacity. The µPD78F4937 has a 192K-byte flash memory instead of the mask ROM featured by the µPD784935, µPD784936, and µPD784937. Table 1-1 shows the differences among these products. Table 1-1. Differences Among Models in µPD784937 Subseries µPD784935 Product µPD784936 µPD784937 µPD78F4937 Item Internal ROM 96K bytes 128K bytes 192K bytes Mask ROM Flash memory Internal RAM 5,120 bytes Regulator Provided None None Provided IC pin Provided None VPP pin None Provided Internal memory 6,656 bytes 8,192 bytes Note switching register Note The internal flash memory capacity and internal RAM capacity can be changed by setting the internal memory switching register (IMS). 6 Preliminary Product Information µPD78F4937 2. PIN CONFIGURATION (TOP VIEW) • 100-pin plastic LQFP (fine pitch) (14 × 14 mm) P37/TO3 P36/TO2 P35/TO1 P34/TO0 P33/SO0 P32/SCK0 P31/TxD/SO1 P30/RxD/SI1 P27/SI0 P26/INTP5 P25/INTP4/ASCK/SCK1 P24/INTP3 P23/INTP2/CI P22/INTP1 P21/INTP0 P20/NMI TX RX AVSS AVREF1 AVDD P77/ANI7 P76/ANI6 P75/ANI5 P74/ANI4 µPD78F4937GC-8EU 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 1 75 2 74 3 73 4 72 5 71 6 70 7 69 8 68 9 67 10 66 11 65 12 64 13 63 14 62 15 61 16 60 17 59 18 58 19 57 20 56 21 55 22 54 23 53 24 52 25 51 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 P73/ANI3 P72/ANI2 P71/ANI1 P70/ANI0 VPP PWM1 PWM0 P17 P16 P15 P14/TxD2/SO2 P13/RxD2/SI2 P12/ASCK2/SCK2 P11 P10 ASTB/CLKOUT P90 P91 P92 P93 P94 P95 P96 P97 P40/AD0 P67/REFRQ/HLDAK P66/WAIT/HLDRQ P65/WR P64/RD P63/A19 P62/A18 P61/A17 P60/A16 P57/A15 P56/A14 P55/A13 P54/A12 VSS VDD P53/A11 P52/A10 P51/A9 P50/A8 P47/AD7 P46/AD6 P45/AD5 P44/AD4 P43/AD3 P41/AD1 P42/AD2 P100 P101 P102 P103 P104 P105/SCK3 P106/SI3 P107/SO3 RESET XT2 XT1 VSS X2 X1 REGOFF REGC VDD P00 P01 P02 P03 P04 P05 P06 P07 Cautions 1. In normal operation, connect the VPP pin directly to the VSS pin. 2. Connect the AVDD pin directly to the VDD pin. 3. Connect the AVSS pin directly to the VSS pin. Preliminary Product Information 7 µPD78F4937 • 100-pin plastic QFP (14 × 20 mm) P77/ANI7 P36/T02 1 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 P76/ANI6 P37/T03 P100 2 3 79 78 P75/ANI5 P74/ANI4 P101 4 77 P73/ANI3 P102 P103 5 6 76 75 P72/ANI2 P71/ANI1 P104 P105/SCK3 7 8 74 73 P70/ANI0 P106/SI3 9 72 P107/SO3 RESET XT2 10 11 12 71 70 69 PWM1 PWM0 XT1 VSS X2 X1 13 14 15 68 67 66 16 17 18 65 64 63 19 20 62 61 21 22 60 59 Cautions 1. In normal operation, connect the VPP pin directly to the VSS pin. 2. Connect the AVDD pin directly to the VDD pin. 3. Connect the AVSS pin directly to the VSS pin. Preliminary Product Information P43/AD3 P44/AD4 P45/AD5 P46/AD6 P47/AD7 P50/A8 P51/A9 P52/A10 P53/A11 VDD VSS P54/A12 P55/A13 P56/A14 P57/A15 P60/A16 P61/A17 P62/A18 23 58 24 57 25 56 26 55 27 54 28 53 29 52 30 51 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 P64/RD P02 P03 P04 P05 P06 P07 P67/REFRQ/HLDAK P66/WAIT/HLDRQ P65/WR P63/A19 REGOFF REGC VDD P00 P01 8 AVDD AVREF1 AVSS RX TX P20/NMI P21/INTP0 P22/INTP1 P23/INTP2/CI P24/INTP3 P25/INTP4/ASCK/SCK1 P26/INTP5 P27/SI0 P30/RxD/SI1 P31/TxD/SO1 P32/SCK0 P33/SO0 P34/TO0 P35/TO1 µPD78F4937GF-3BA VPP P17 P16 P15 P14/TxD2/SO2 P13/RxD2/SI2 P12/ASCK2/SCK2 P11 P10 ASTB/CLKOUT P90 P91 P92 P93 P94 P95 P96 P97 P40/AD0 P41/AD1 P42/AD2 µPD78F4937 A8-A19 : Address Bus PWM0, PWM1 : Pulse Width Modulation Output AD0-AD7 : Address/Data Bus RD : Read Strobe ANI0-ANI7 : Analog Input REFRQ : Refresh Request ASCK, ASCK2 : Asynchronous Serial Clock REGC : Regulator Capacitance ASTB : Address Strobe REGOFF : Regulator Off AVDD : Analog Power Supply RESET : Reset AVREF1 : Reference Voltage RX : IEBus Receive Data AVSS : Analog Ground RxD, RxD2 : Receive Data CI : Clock Input SCK0-SCK3 : Serial Clock CLKOUT : Clock Output SI0-SI3 : Serial Input HLDAK : Hold Acknowledge SO0-SO3 : Serial Output HLDRQ : Hold Request TO0-TO3 : Timer Output INTP0-INTP5 : Interrupt from Peripherals TX : IEBus Transmit Data NMI : Non-maskable Interrupt TxD, TxD2 : Transmit Data P00-P07 : Port 0 VDD : Power Supply P10-P17 : Port 1 VPP : Programming Power Supply P20-P27 : Port 2 VSS : Ground P30-P37 : Port 3 WAIT : Wait P40-P47 : Port 4 WR : Write Strobe P50-P57 : Port 5 X1, X2 : Crystal (Main System Clock) P60-P67 : Port 6 XT1, XT2 : Crystal (Watch) P70-P77 : Port 7 P90-P97 : Port 9 P100-P107 : Port 10 Preliminary Product Information 9 µPD78F4937 3. BLOCK DIAGRAM NMI INTP0-INTP5 BAUD-RATE GENERATOR UART/IOE1 INTP3 TO0 TO1 TIMER/COUNTER0 (16 bits) INTP0 TIMER/COUNTER1 (16 bits) INTP1 INTP2/CI TO2 TO3 UART/IOE2 PROGRAMMABLE INTERRUPT CONTROLLER TIMER/COUNTER2 (16 bits) BAUD-RATE GENERATOR 78 K/IV CPU CORE (RAM 512 bytes) FLASH MEMORY (192K bytes) PWM ASCK2/SCK2 CLOCKED SERIAL INTERFACE3 SCK3 SO3 SI3 ASTB/CLKOUT AD0-AD7 A8-A15 BUS I/F REAL-TIME OUTPUT PORT PWM0 RxD2/SI2 TxD2/SO2 SCK0 SO0 SI0 TIMER3 (16 bits) P04-P07 ASCK/SCK1 CLOCKED SERIAL INTERFACE CLOCK OUTPUT P00-P03 RxD/SI1 TxD/SO1 A16-A19 RD WR WAIT/HLDRQ REFRQ/HLDAK D0-D7 A0-A16 CE OE PGM RAM (8,192 bytes) PWM1 PORT 0 P00-P07 PORT 1 P10-P17 PORT 2 P20-P27 PORT 3 P30-P37 PORT 4 P40-P47 PORT 5 P50-P57 PORT 6 P60-P67 PORT 7 P70-P77 PORT 9 P90-P97 PORT 10 P100-P107 ANI0-ANI7 AVDD AVREF1 A/D CONVERTER AVSS INTP5 TX RX RESET X1 X2 REGC REGOFF VPP VDD VSS XT1 XT2 10 IEBus CONTROLLER SYSTEM CONTROL (REGULATOR) WATCHDOG TIMER WATCH TIMER Preliminary Product Information µPD78F4937 4. LIST OF PIN FUNCTIONS 4.1 Port Pins (1/2) Pin I/O Dual-function Function P00-P07 I/O − Port 0 (P0): • 8-bit I/O port. • Functions as a real-time output port (4 bits × 2). • Inputs and outputs can be specified bit by bit. • The use of pull-up resistors can be simultaneously specified by software for all pins in input mode. • Can drive a transistor. P10 I/O − Port 1 (P1): • 8-bit I/O port. • Inputs and outputs can be specified bit by bit. • The use of pull-up resistors can be simultaneously specified by software for all pins in input mode. • Can drive LED. − P11 P12 ASCK2/SCK2 P13 RxD2/SI2 P14 TxD2/SO2 − P15-P17 P20 Input NMI Port 2 (P2): • 8-bit input-only port. • P20 does not function as a general-purpose port (nonmaskable interrupt). However, the input level can be checked by an interrupt service routine. • The use of pull-up resistors can be specified by software for pins P22 to P27 (in units of 6 bits). • The P25/INTP4/ASCK/SCK1 pin functions as the SCK1 I/O pin by CSIM1. P21 INTP0 P22 INTP1 P23 INTP2/CI P24 INTP3 P25 INTP4/ASCK/SCK1 P26 INTP5 P27 SI0 P30 I/O RxD/SI1 P31 TxD/SO1 P32 SCK0 P33 SO0 P34-P37 TO0-TO3 P40-P47 I/O AD0-AD7 Port 3 (P3): • 8-bit I/O port. • Inputs and outputs can be specified bit by bit. • The use of pull-up resistors can be simultaneously specified by software for all pins in input mode. • P32 and P33 can be set as the N-ch open-drain pin. Port 4 (P4): • 8-bit I/O port. • Inputs and outputs can be specified bit by bit. • The use of pull-up resistors can be simultaneously specified by software for all pins in input mode. • Can drive LED. Preliminary Product Information 11 µPD78F4937 4.1 Port Pins (2/2) Pin I/O Dual-function Function P50-P57 I/O A8-A15 Port 5 (P5): • 8-bit I/O port. • Inputs and outputs can be specified bit by bit. • The use of pull-up resistors can be simultaneously specified by software for all pins in input mode. • Can drive LED. P60-P63 I/O A16-A19 Port 6 (P6): • 8-bit I/O port. • Inputs and outputs can be specified bit by bit. • The use of pull-up resistors can be simultaneously specified by software for all pins in input mode. P64 RD P65 WR P66 WAIT/HLDRQ P67 REFRQ/HLDAK P70-P77 I/O ANI0-ANI7 P90-P97 I/O − Port 9 (P9): • 8-bit I/O port. • Inputs and outputs can be specified bit by bit. • The use of pull-up resistors can be simultaneously specified by software for all pins in input mode. P100-P104 I/O − Port 10 (P10): • 8-bit I/O port. • Inputs and outputs can be specified bit by bit. • The use of pull-up resistors can be simultaneously specified by software for all pins in input mode. • P105 and P107 can be set as the N-ch open-drain pin. P105 SCK3 P106 SI3 P107 SO3 12 Port 7 (P7): • 8-bit I/O port. • Inputs and outputs can be specified bit by bit. Preliminary Product Information µPD78F4937 4.2 Non-Port Pins (1/2) Pin TO0-TO3 I/O Output Dual-function Function P34-P37 Timer output CI Input P23/INTP2 Input of a count clock for timer/counter 2 RxD Input P30/SI1 Serial data input (UART0) P13/SI2 Serial data input (UART2) P31/SO1 Serial data output (UART0) P14/SO2 Serial data output (UART2) P25/INTP4/SCK1 Baud rate clock input (UART0) P12/SCK2 Baud rate clock input (UART2) P27 Serial data input (3-wire serial I/O0) SI1 P30/RxD Serial data input (3-wire serial I/O1) SI2 P13/RxD2 Serial data input (3-wire serial I/O2) SI3 P106 Serial data input (3-wire serial I/O3) RxD2 TxD Output TxD2 ASCK Input ASCK2 SI0 SO0 Input Output P33 Serial data output (3-wire serial I/O0) SO1 P31/TxD Serial data output (3-wire serial I/O1) SO2 P14/TxD2 Serial data output (3-wire serial I/O2) SO3 P107 Serial data output (3-wire serial I/O3) P32 Serial clock I/O (3-wire serial I/O0) SCK1 P25/INTP4/ASCK Serial clock I/O (3-wire serial I/O1) SCK2 P12/ASCK Serial clock I/O (3-wire serial I/O2) SCK3 P105 Serial clock I/O (3-wire serial I/O3) P20 External interrupt request SCK0 NMI I/O Input − INTP0 P21 • Input of a count clock for timer/counter 1 • Capture/trigger signal for CR11 or CR12 INTP1 P22 • Input of a count clock for timer/counter 2 • Capture/trigger signal for CR22 INTP2 P23/CI • Input of a count clock for timer/counter 2 • Capture/trigger signal for CR21 INTP3 P24 • Input of a count clock for timer/counter 0 • Capture/trigger signal for CR02 INTP4 P25/ASCK/SCK1 INTP5 P26 − Input of a conversion start trigger for A/D converter AD0-AD7 I/O P40-P47 Time multiplexing address/data bus (for connecting external memory) A8-A15 Output P50-P57 High-order address bus (for connecting external memory) A16-A19 Output P60-P63 High-order address during address expansion (for connecting external memory) RD Output P64 Strobe signal output for reading the contents of external memory WR Output P65 Strobe signal output for writing on external memory WAIT Input P66/HLDRQ Wait signal insertion REFRQ Output P67/HLDAK Refresh pulse output to external pseudo static memory HLDRQ Input P66/WAIT Input of bus hold request HLDAK Output P67/REFRQ Output of bus hold response ASTB Output CLKOUT Latch timing output of time multiplexing address (A0-A7) (for connecting external memory) Preliminary Product Information 13 µPD78F4937 4.2 Non-Port Pins (2/2) Pin I/O Dual-function ASTB Function CLKOUT Output Clock output PWM0 Output − PWM output 0 PWM1 Output − PWM output 1 RX Input − Data input (IEBus) TX Output − Data output (IEBus) REGC − − Capacitor connection for stabilizing the regulator output REGOFF − − Signal for specifying regulator operation RESET Input − Chip reset X1 Input − X2 − Crystal input for system clock oscillation (A clock pulse can also be input to the X1 pin.) Real-time clock connection pin XT1 Input − XT2 − − ANI0-ANI7 AVREF1 Input − P70-P77 Analog voltage inputs for the A/D converter − Application of A/D converter reference voltage AVDD Positive power supply for the A/D converter AVSS Ground for the A/D converter VDD Positive power supply Ground VSS VPP 14 Input This pin is used to set the flash memory programming mode and applies a high voltage when a program is written or verified. In normal operation mode, connect this pin directly to the VSS pin. Preliminary Product Information µPD78F4937 4.3 I/O Circuits for Pins and Handling of Unused Pins Table 4-1 describes the types of I/O circuits for pins and the handling of unused pins. Figure 4-1 shows the configuration of these various types of I/O circuits. Table 4-1. Types of I/O Circuits for Pins and Handling of Unused Pins (1/2) Pin P00-P07 I/O circuit type 5-A I/O I/O Input state: Output state: Input Connect these pins to the VDD or VSS pin. P10, P11 P12/ASCK2/SCK2 8-A P13/RxD2/SI2 5-A Recommended connection method for unused pins Connect these pins to the VDD pin. Leave these pins open. P14/TxD2/SO2 P15-P17 P20/NMI 2 P21/INTP0 P22/INTP1 2-A Connect these pins to the VDD pin. P23/INTP2/CI P24/INTP3 P25/INTP4/ASCK/SCK1 8-A I/O Input state: Output state: Connect this pin to the VDD pin. Leave this pin open. P26/INTP5 2-A Input Connect these pins to the VDD pin. 5-A I/O Input state: Output state: Connect these pins to the VDD pin. Leave these pins open. I/O Input state: Output state: Connect these pins to the VDD or VSS pin. Leave these pins open. Output Leave this pin open. P27/SI0 P30/RxD/SI1 P31/TxD/SO1 P32/SCK0 10-A P33/SO0 P34/TO0-P37/TO3 5-A P40/AD0-P47/AD7 P50/A8-P57/A15 P60/A16-P63/A19 P64/RD P65/WR P66/WAIT/HLDRQ P67/REFRQ/HLDAK P70/ANI0-P77/ANI7 20 P90-P97 5-A P100-P104 P105/SCK3 10-A P106/SI3 8-A P107/SO3 10-A ASTB/CLKOUT 4 Preliminary Product Information 15 µPD78F4937 Table 4-1. Types of I/O Circuits for Pins and Handling of Unused Pins (2/2) Pin I/O circuit type I/O Recommended connection method for unused pins − RESET 2 Input XT2 − − XT1 − Input REGOFF 1 − REGC − − PWM0, PWM1 3 Output Leave this pin open. RX 2 Input Connect this pin to the VDD or VSS pin. TX 3 Output Leave this pin open. AVREF1 − − Leave this pin open. Connect this pin to the VSS pin. Connect these pins to the VDD pin. Connect these pins to the VSS pin. AVSS Connect this pin to the VDD pin. AVDD VPP Caution Input Connect this pin directly to the VSS pin. When the I/O mode of an I/O dual-function pin is unpredictable, connect the pin to VDD through a resistor of 10 to 100 kilohms (particularly when the voltage of the reset input pin becomes higher than that of the low level input at power-on or when I/O is switched by software). Remark Since type numbers are consistent in the 78K Series, those numbers are not always serial in each product. (Some circuits are not included.) 16 Preliminary Product Information µPD78F4937 Figure 4-1. I/O Circuits for Pins Type 1 Type 2-A VDD VDD P Pull-up enable P IN N IN Type 2 Schmitt trigger input with hysteresis characteristics IN Type 5-A VDD Schmitt trigger input with hysteresis characteristics Type 3 Pull-up enable P VDD VDD P Data P-ch IN/OUT Data OUT Output disable N N-ch Input enable Type 4 Type 8-A VDD Data VDD P OUT Output disable N Pull-up enable P VDD P Data IN/OUT Push-pull output which can output high impedance (both the positive and negative channels are off.) Output disable N Type 10-A VDD Type 20 Pull-up enable P VDD Data VDD P Data P IN/OUT IN/OUT Open drain Output disable Output disable N N Comparator + – Type 12 Analog output voltage VREF (Threshold voltage) P OUT N P N Input enable Preliminary Product Information 17 µPD78F4937 5. INTERNAL MEMORY SWITCHING (IMS) REGISTER This register enables the software to avoid using part of the internal memory. The IMS register can be set to establish the same memory mapping as used in ROM products that have different internal memory (ROM and RAM) configurations. The IMS register is set using 8-bit memory operation instructions. A RESET input sets the IMS register to FFH. Figure 5-1. Internal Memory Switching (IMS) Register Address: 0FFFCH IMS Caution When reset: FFH W/R 7 6 5 4 3 2 1 0 1 1 ROM1 ROM0 1 1 RAM1 RAM0 ROM1 ROM0 0 0 Not to be set 0 1 96K bytes 1 0 128K bytes 1 1 192K bytes RAM1 RAM0 0 0 Not to be set 0 1 5,120 bytes 1 0 6,656 bytes 1 1 8,192 bytes Internal ROM capacity selection Internal RAM capacity selection The IMS is not contained in a mask ROM product (µPD784935, µPD784936, or µPD784937). The IMS setting to obtain the same memory map as masked ROM products are shown in Table 5-1. Table 5-1. Internal Memory Switching Register (IMS) Setting Value Product 18 IMS setting value µPD784935 DDH µPD784936 EEH µPD784937 FFH Preliminary Product Information µPD78F4937 6. FLASH MEMORY PROGRAMMING The flash memory can be written even while the device is mounted in the target system (on-board write). To write a program into the flash memory, connect the dedicated flash writer (Flashpro III) to both the host machine and target system. Remark 6.1 The Flashpro III is manufactured by Naito Densei Machida Mfg. Co., Ltd. Selecting the Transmission Method The Flashpro III writes into flash memory by means of serial transmission. The transmission method to be used for writing is selected from those listed in Table 6-1. To select a transmission method, use the format shown in Figure 6-1, according to the number of VPP pulses listed in Table 6-1. Table 6-1. Transmission Methods Transmission method Number of channels Pins Number of VPP pulses 3-wire serial I/O 1 SCK3/P105 SO3/P107 SI3/P106 0 UART 1 TxD/SO1/P31 RxD/SI1/P30 8 Caution To select a transmission method, always use the corresponding number of VPP pulses listed in Table 6-1. Figure 6-1. Format of Transmission Method Selection 10 V VPP VDD 1 2 n VSS VDD RESET VSS Preliminary Product Information 19 µPD78F4937 6.2 Flash Memory Programming Functions Flash memory writing and other operations can be performed by transmitting/receiving commands and data according to the selected transmission method. Table 6-2 lists the main flash memory programming functions. Table 6-2. Main Flash Memory Programming Functions Function Description Batch erase Erases the entire contents of memory. Block erase Erases the contents of specified memory block. Batch blank check Checks that the entire contents of memory have been erased. Block blank check Checks that the contents of specified block have been erased. Data write Write to the flash memory according to the specified write start address and number of bytes of data to be written. Batch verify Compares the entire contents of memory with the input data. Block verify Compares the contents of specified memory block with the input data. 6.3 Connecting the Flashpro III The connection between the Flashpro III and µPD78F4937 varies with the transmission method. Figures 6-2 and 6-3 show the connection for each transmission method. Figure 6-2. Flashpro III Connection in 3-Wire Serial I/O Mode µ PD78F4937 Flashpro III VPP VPP VDD VDD RESET SCK RESET SCK SO SI SI SO VSS VSS Figure 6-3. Flashpro III Connection in UART Mode µ PD78F4937 Flashpro III VPP VPP VDD VDD RESET SO RxD SI TxD VSS 20 RESET VSS Preliminary Product Information µPD78F4937 7. PACKAGE DRAWINGS 100PIN PLASTIC QFP (14x20) A B 51 50 80 81 detail of lead end C D S R Q 31 30 100 1 F J G H I P M K M N L NOTE Each lead centerline is located within 0.15 mm (0.006 inch) of its true position (T.P.) at maximum material condition. REMARK The shape and material of the ES product is the same as the mass produced product. ITEM A MILLIMETERS 23.6±0.4 INCHES 0.929±0.016 B 20.0±0.2 0.795 +0.009 –0.008 C 14.0±0.2 0.551 +0.009 –0.008 D 17.6±0.4 0.693±0.016 F 0.8 0.031 G 0.6 0.024 H 0.30±0.10 0.012 +0.004 –0.005 I 0.15 0.006 J 0.65 (T.P.) 0.026 (T.P.) K 1.8±0.2 0.071 +0.008 –0.009 L 0.8±0.2 0.031 +0.009 –0.008 M 0.15 +0.10 –0.05 0.006 +0.004 –0.003 N 0.10 0.004 P 2.7±0.1 0.106 +0.005 –0.004 Q 0.1±0.1 0.004±0.004 R 5°±5° 5°±5° S 3.0 MAX. 0.119 MAX. P100GF-65-3BA1-3 Preliminary Product Information 21 µPD78F4937 100 PIN PLASTIC LQFP (FINE PITCH) (14×14) A B 75 76 51 50 detail of lead end S C D Q R 26 25 100 1 F G H I M J K P M N L NOTE Each lead centerline is located within 0.08 mm (0.003 inch) of its true position (T.P.) at maximum material condition. REMARK The shape and material of the ES product is the same as the mass produced product. ITEM MILLIMETERS INCHES A 16.00±0.20 0.630±0.008 B 14.00±0.20 0.551 +0.009 –0.008 C 14.00±0.20 0.551 +0.009 –0.008 D 16.00±0.20 0.630±0.008 F 1.00 0.039 G 1.00 0.039 H 0.22 +0.05 –0.04 0.009±0.002 I 0.08 0.003 J 0.50 (T.P.) 0.020 (T.P.) K 1.00±0.20 0.039 +0.009 –0.008 L 0.50±0.20 0.020 +0.008 –0.009 M 0.17 +0.03 –0.07 0.007 +0.001 –0.003 N 0.08 0.003 P 1.40±0.05 0.055±0.002 Q 0.10±0.05 0.004±0.002 R 3° +7° –3° 3° +7° –3° S 1.60 MAX. 0.063 MAX. S100GC-50-8EU 22 Preliminary Product Information µPD78F4937 APPENDIX A DEVELOPMENT TOOLS The following development tools are available for system development using the µPD78F4937. See also (5). (1) Language processing software RA78K4 Assembler package used in common with 78K/IV Series CC78K4 C compiler package used in common with 78K/IV Series DF784937 Device file for µPD784937 Subseries CC78K4-L C compiler library source file used in common with 78K/IV Series (2) Flash memory write tools Flashpro Ill Note Flash writer used only for microcontrollers with internal flash memory (PG-FPIII) FA-100GF Flash memory writing adapter for 100-pin plastic QFP (GF-3BA type). Wiring must be performed according to product being used. FA-100GC Flash memory writing adapter for 100-pin plastic LQFP (GC-8EU type). Wiring must be performed according to product being used. Note Flashpro III controller Program controlled by a personal computer and which is supported by Flashpro III. TM Runs under Windows 95, etc. (3) Debugging tools • When using the in-circuit emulator IE-78K4-NS IE-78K4-NS In-circuit emulator used in common with 78K/IV Series IE-70000-MC-PS-B Power supply unit for IE-78K4-NS IE-70000-98-IF-C Interface adapter when the PC-9800 series computer (other than a notebook) is used as the host machine IE-70000-CD-IF-C PC card and interface cable when a PC-9800 series notebook is used as the host machine IE-70000-PC-IF-C Interface adapter when the IBM PC/AT IE-784937-NS-EM1 TM Note compatible is used as the host machine Emulation board for emulating µPD784937 Subseries NP-100GF Emulation probe for 100-pin plastic QFP (GF-3BA type) NP-100GC Emulation probe for 100-pin plastic LQFP (GC-8EU type) EV-9200-GF-100 Socket for mounting on target system board made for 100-pin plastic QFP (GF3BA type) TGC-100SDW Conversion adapter for connecting the target system board made for 100-pin plastic LQFP (GC-8EU type) with NP-100GC ID78K4-NS Integrated debugger for IE-78K4-NS SM78K4 System simulator used in common with 78K/IV Series DF789437 Device file for µPD784937 Subseries Note Under development Preliminary Product Information 23 µPD78F4937 • When using the in-circuit emulator IE-784000-R IE-784000-R In-circuit emulator used in common with 78K/IV Series IE-70000-98-IF-B IE-70000-98-IF-C Interface adapter when the PC-9800 series computer (other than a notebook) is used as the host machine IE-70000-98N-IF Interface adapter and cable when a PC-9800 series notebook is used as the host machine IE-70000-PC-IF-B IE-70000-PC-IF-C Interface adapter when the IBM PC/AT compatible is used as the host machine IE-78000-R-SV3 Interface adapter and cable when the EWS is used as the host machine IE-784937-NS-EM1 IE-784937-R-EM1 Note Emulation board for emulating µPD784937 Subseries Note IE-78400-R-EM Note Emulation board used in common with 78K/IV Series IE-78K4-R-EX2 Conversion board for emulation probes required to use the IE-784937-NS-EM1 on the IE-784000-R. The board is not needed when the IE-784937-R-EM1 is used. EP-78064GF-R Emulation probe for 100-pin plastic QFP (GF-3BA type) EP-78064GC-R Emulation probe for 100-pin plastic LQFP (GC-8EU type) EV-9200GF-100 Socket for mounting on target system board made for 100-pin plastic QFP (GF-3BA type) TGC-100SDW Conversion adapter for connecting the target system board made for 100-pin plastic LQFP (GC-8EU type) with NP-100GC ID78K4 Integrated debugger for IE-784000-R SM78K4 System simulator used in common with 78K/IV Series DF784937 Device file for µPD784937 Subseries Note Under development (4) Real-time OS RX78K/IV Real-time OS for 78K/IV Series MX78K4 OS for the 78K/IV Series 24 Preliminary Product Information µPD78F4937 (5) Notes when using development tools • The ID78K4-NS, ID78K4, and SM78K4 can be used in combination with the DF784937. • The CC78K4 and RX78K/IV can be used in combination with the RA78K4 and DF784937. • The Flashpro III, FA-100GF, FA-100GC, NP-100GF, and NP-100GC are manufactured by Naito Densei Machida Mfg. Co., Ltd. (044-822-3813). Consult the NEC sales representative for purchasing. • The TGC-100SDW is a product from TOKYO ELETECH CORPORATION. Refer to: Daimaru Kogyo, Ltd. Tokyo Electronic Components Division (03-3820-7112) Osaka Electronic Components Division (06-244-6672) • The host machines and operating systems corresponding to each software are shown below. Host machine [OS] Software PC PC-9800 series [Windows] IBM PC/AT compatibles [Japanese/English Windows] EWS TM HP9000 series 700 TM SPARCstation NEWS TM [SunOS Ο Note Ο ID78K4-NS Ο − ID78K4 Ο Ο CC78K4 Ο Ο Ο − Note Ο Note Ο SM78K4 RX78K/IV Ο MX78K4 Ο TM TM ] , Solaris (RISC) [NEWS-OS Note RA78K4 [HP-UX TM TM ] ] Note Software under MS-DOS Preliminary Product Information 25 µPD78F4937 APPENDIX B RELATED DOCUMENTS • Documents Related to Devices Document name Document No. Japanese English µPD784935, 784936, 784937 Preliminary Product Information U13572J To be created µPD78F4937 Preliminary Product Information U13573J This manual µPD784937 Subseries User's Manual, Hardware To be created To be created µPD784937 Subseries Special Function Registers To be created 78K/IV Series User's Manual, Instruction U10905J U10905E 78K/IV Series Instruction Summary Sheet U10594J − 78K/IV Series Instruction Set U10595J − 78K/IV Series Application Note, Software Basic U10095J U10095E • − Documents Related to Development Tools (User's Manual) Document name Document No. Japanese RA78K Series Assembler Package English Operation U11334J U11334E Language U11162J U11162E U11743J U11743E Operation U11571J U11571E Language U11572J U11572E IE-78K4-NS U13356J To be created IE-784000-R U12903J EEU-1534 IE-784937-R-EM1 To be created To be created IE-784937-NS-EM1 To be created To be created EP-78064 EEU-934 EEU-1469 RA78K Series Structured Assembler Preprocessor CC78K Series C Compiler SM78K4 System Simulator Windows Base Reference U10093J U10093E SM78K Series System Simulator External Parts User Open U10092J U10092E Interface Specifications ID78K4-NS Integrated Debugger Reference U12796J U12796E ID78K4 Integrated Debugger Windows Base Reference U10440J U10440E ID78K4 Integrated Debugger HP-UX, SunOS, NEWS-OS Base Reference U11960J U11960E Caution The above documents may be revised without notice. Use the latest versions when you design application systems. 26 Preliminary Product Information µPD78F4937 • Documents Related to Software to Be Incorporated into the Product (User's Manual) Document name Document No. Japanese 78K/IV Series Real-Time OS Basic U10603J U10603E Installation U10604J U10604E Debugger U10364J − U11779J − OS for 78K/IV Series MX78K4 • English Other Documents Document name Document No. Japanese English IC PACKAGE MANUAL C10943X SMD Surface Mount Technology Manual C10535J C10535E Quality Grades on NEC Semiconductor Device C11531J C11531E NEC Semiconductor Device Reliability/Quality Control System C10983J C10983E Guide to Prevent Damage for Semiconductor Devices by Electrostatic Discharge (ESD) C11892J C11892E Semiconductor Device Quality Control/Reliability Handbook C12769J − Guide for Products Related to Microcomputer: Other Companies U11416J − Caution The above documents may be revised without notice. Use the latest versions when you design application systems. Preliminary Product Information 27 µPD78F4937 [MEMO] 28 Preliminary Product Information µPD78F4937 NOTES FOR CMOS DEVICES 1 PRECAUTION AGAINST ESD FOR SEMICONDUCTORS Note: Strong electric field, when exposed to a MOS device, can cause destruction of the gate oxide and ultimately degrade the device operation. Steps must be taken to stop generation of static electricity as much as possible, and quickly dissipate it once, when it has occurred. Environmental control must be adequate. When it is dry, humidifier should be used. It is recommended to avoid using insulators that easily build static electricity. Semiconductor devices must be stored and transported in an anti-static container, static shielding bag or conductive material. All test and measurement tools including work bench and floor should be grounded. The operator should be grounded using wrist strap. Semiconductor devices must not be touched with bare hands. Similar precautions need to be taken for PW boards with semiconductor devices on it. 2 HANDLING OF UNUSED INPUT PINS FOR CMOS Note: No connection for CMOS device inputs can be cause of malfunction. If no connection is provided to the input pins, it is possible that an internal input level may be generated due to noise, etc., hence causing malfunction. CMOS devices behave differently than Bipolar or NMOS devices. Input levels of CMOS devices must be fixed high or low by using a pull-up or pull-down circuitry. Each unused pin should be connected to V DD or GND with a resistor, if it is considered to have a possibility of being an output pin. All handling related to the unused pins must be judged device by device and related specifications governing the devices. 3 STATUS BEFORE INITIALIZATION OF MOS DEVICES Note: Power-on does not necessarily define initial status of MOS device. Production process of MOS does not define the initial operation status of the device. Immediately after the power source is turned ON, the devices with reset function have not yet been initialized. Hence, power-on does not guarantee out-pin levels, I/O settings or contents of registers. Device is not initialized until the reset signal is received. Reset operation must be executed immediately after power-on for devices having reset function. Preliminary Product Information 29 µPD78F4937 IEBus is a trademark of NEC Corporation. Windows is a registered trademark or a trademark of Microsoft Corporation in the United States and/or other countries. PC/AT is a trademark of IBM Corporation. HP9000 series 700 and HP-UX are trademarks of Hewlett-Packard Company. SPARCstation is a trademark of SPARC International, Inc. Solaris and SunOS are trademarks of Sun Microsystems, Inc. NEWS and NEWS-OS are trademarks of SONY Corporation. 30 Preliminary Product Information µPD78F4937 Regional Information Some information contained in this document may vary from country to country. Before using any NEC product in your application, pIease contact the NEC office in your country to obtain a list of authorized representatives and distributors. They will verify: • Device availability • Ordering information • Product release schedule • Availability of related technical literature • Development environment specifications (for example, specifications for third-party tools and components, host computers, power plugs, AC supply voltages, and so forth) • Network requirements In addition, trademarks, registered trademarks, export restrictions, and other legal issues may also vary from country to country. NEC Electronics Inc. (U.S.) NEC Electronics (Germany) GmbH NEC Electronics Hong Kong Ltd. Santa Clara, California Tel: 408-588-6000 800-366-9782 Fax: 408-588-6130 800-729-9288 Benelux Office Eindhoven, The Netherlands Tel: 040-2445845 Fax: 040-2444580 Hong Kong Tel: 2886-9318 Fax: 2886-9022/9044 NEC Electronics (France) S.A. Velizy-Villacoublay, France Tel: 01-30-67 58 00 Fax: 01-30-67 58 99 Seoul Branch Seoul, Korea Tel: 02-528-0303 Fax: 02-528-4411 NEC Electronics (France) S.A. NEC Electronics Singapore Pte. Ltd. Spain Office Madrid, Spain Tel: 01-504-2787 Fax: 01-504-2860 United Square, Singapore 1130 Tel: 65-253-8311 Fax: 65-250-3583 NEC Electronics (Germany) GmbH Duesseldorf, Germany Tel: 0211-65 03 02 Fax: 0211-65 03 490 NEC Electronics (UK) Ltd. Milton Keynes, UK Tel: 01908-691-133 Fax: 01908-670-290 NEC Electronics Hong Kong Ltd. NEC Electronics Taiwan Ltd. NEC Electronics Italiana s.r.1. NEC Electronics (Germany) GmbH Milano, Italy Tel: 02-66 75 41 Fax: 02-66 75 42 99 Scandinavia Office Taeby, Sweden Tel: 08-63 80 820 Fax: 08-63 80 388 Taipei, Taiwan Tel: 02-719-2377 Fax: 02-719-5951 NEC do Brasil S.A. Cumbica-Guarulhos-SP, Brasil Tel: 011-6465-6810 Fax: 011-6465-6829 J98. 2 Preliminary Product Information 31 µPD78F4937 Some related documents may be preliminary versions. Note that, however, what documents are preliminary is not indicated in this document. No part of this document may be copied or reproduced in any form or by any means without the prior written consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in this document. NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from use of a device described herein or any other liability arising from use of such device. No license, either express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of NEC Corporation or others. While NEC Corporation has been making continuous effort to enhance the reliability of its semiconductor devices, the possibility of defects cannot be eliminated entirely. To minimize risks of damage or injury to persons or property arising from a defect in an NEC semiconductor device, customers must incorporate sufficient safety measures in its design, such as redundancy, fire-containment, and anti-failure features. NEC devices are classified into the following three quality grades: "Standard", "Special", and "Specific". The Specific quality grade applies only to devices developed based on a customer designated "quality assurance program" for a specific application. The recommended applications of a device depend on its quality grade, as indicated below. Customers must check the quality grade of each device before using it in a particular application. Standard: Computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots Special: Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support) Specific: Aircrafts, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems or medical equipment for life support, etc. The quality grade of NEC devices is "Standard" unless otherwise specified in NEC’s Data Sheets or Data Books. If customers intend to use NEC devices for applications other than those specified for Standard quality grade, they should contact an NEC sales representative in advance. Anti-radioactive design is not implemented in this product. M4 96. 5