SJ-A1420 Series LVCMOS SJ-A1420 Series Rev S Frequency Range: 1.0 MHz to 80.0 MHz Description The SJ-A1420 Series of quartz crystal oscillators provide enable/disable 3-state LVCMOS compatible signals for bus connected systems. Supplying Pin 1 of the SJ-A1420 units with a logic “1” or open enables its Pin 3 output. In the disable mode, Pin 3 presents a high impedance to the load. All units are designed to survive standard wave soldering operations without damage. Features Size, mm 9 x 14 I/O 4 J Lead Supply Voltage 3.3V / 5V • High Reliability - NEL HALT/HASS qualified for crystal oscillator start-up conditions • Low jitter - Wavecrest jitter characterization available • Wide frequency range—1.0 MHz to 80.0 MHz • User specified tolerance available • Will withstand vapor phase temperatures of 253°C for 4 minutes maximum • Space-saving alternative to discrete component oscillators • High shock resistance, to 3000g • Metal lid electrically connected to ground to reduce EMI • 3.3 Volt operation • High Q crystal actively tuned oscillator circuit • Power supply decoupling internal • No internal PLL avoids cascading PLL problems • Low power consumption • Gold plated leads • RoHS Compliant, Lead Free Construction Creating a Part Number SJ - A142X - FREQ Package Code SJ 4 J Lead 9x14 mm SMD Tolerance/Performance 0 ±100 ppm 0-70°C 1 ±50 ppm 0-70°C 7 ±25 ppm 0-70°C 9 Customer Specific A ±20 ppm 0-70°C B ±50 ppm -40 to +85°C C ±100 ppm -40 to +85°C Input Voltage Code Specification A 3.3 V 5V Drawing Specifications Electrical Connection Pin 1 For the most up to date specifications on each NEL product, log on to our website— www.nelfc.com Dimensions shown in inches and millimeters. 2 3 4 357 Beloit Street, P.O. Box 457, Burlington, WI 53105-0457 U.S.A. Phone: 262-763-3591 Fax: 262-763-2881 Email: [email protected] www.nelfc.com Connection Enable/Disable Input Ground Output VDD LVCMOS SJ-A1420 Series Rev S Frequency Range: 1.0 MHz to 80.0 MHz Operating Conditions and Output Characteristics Electrical Characteristics Parameter Symbol Frequency Duty Cycle Logic 0 Logic 1 Rise & Fall Time Tpz Enable/Disable Logic High Voltage Enable/Disable Logic Low Voltage Jitter, RMS(2) Frequency Stability(1) — @VDD/2 @600 µA @600 µA 10-90% — 1.0 MHz 45/55% — VDD -0.2V — — Min Typical — — — — — — 80.0 MHz 55/45% 0.2 V — 8 ns 25 ns — — 1.6 V — — — — dF/F — — Overall conditions including: voltage, calibration, temp., 10 yr aging, shock, vibration — — -100 ppm — 3 psec — 0.4 V — +100 ppm Min Typical — — VOL VOH tr, tf — General Characteristics Parameter (3) Symbol Supply Voltage Supply Current Output Current Operating Temperature Storage Temperature Power Dissipation Lead Temperature Load Start-up Time VDD IDD IO TA TS PD TL — tS Conditions Conditions 3.3V±10% No Load — — — — Soldering, 10 sec. — — 2.97 V 0.0 mA 0.0 mA 0ºC -55ºC — — — — Environmental and Mechanical Characteristics Mechanical Shock Thermal Shock Vibration Soldering Condition Hermetic Seal Per MIL-STD-202, Method 213, Condition E Per MIL-STD-833, Method 1011, Condition A 0.060" double amplitude 10 Hz to 55 Hz, 35g’s 55 Hz to 2000 Hz 300ºC for 10 seconds Leak rate less than 1 x 10 -8 atm.cc/sec of helium Footnotes: 1) Standard frequency stability (±20, ±25, ±50 ppm & others available). 2) Jitter performance is frequency dependent. Please contact factory for full Wavecrest characterization. RMS jitter bandwidth of 12kHz to 20MHz. 3) Internal high frequency power source decoupling. Test Load 3.3 V 25 mA — — — — — — 2 ms Max Max 3.63 V 40 mA ±16.0 mA 70ºC 125ºC 145 mW 300ºC 15 pf 10 ms