SM6802A Class-D Stereo Amplifier for Portable Device OVERVIEW The SM6802A is an analog-input, class-D stereo amplifier. Class-D operation provides high efficiency and low power consumption. The device also incorporates an original real-time operation dynamic range compression function that effectively suppresses the distortion in the saturation level region output by soft-clipping, boosting the average sound pressure from the speaker during playback. It also incorporates an input equalizer pin for output speaker frequency characteristics adjustment. These features make the device ideal for use in mobile telephones and speaker applications requiring miniaturization and high-efficiency. The output stage has a BTL output configuration where the output waveform inverts only the modulation components, enabling direct drive connection, without using an LC filter, to a dynamic speaker. The device is available in miniature 20-pin QFN packages, and requires only a peripheral chip capacitor to form a miniature amplifier circuit. ■ ■ ■ ■ ■ Operating supply voltage: 2.7 to 5.5V Low current consumption: 6mA (VDD1 = VDD2 = VDD3 = 3.6V) Output power: 0.7W + 0.7W (VDD1 = VDD2 = VDD3 = 3.6V, 8Ω load) Output fundamental frequency: 125kHz Gain • 6dB (Normal) • 15dB to 6dB automatic adjustment in response to the input level (Dynamic range compression mode) Silicon-gate CMOS process Package: 20-pin QFN APPLICATIONS ■ ■ ■ (Top view) LEQN VREF1 TESTN MUTEN LOUTN ■ ■ PINOUT 20 19 18 17 16 LEQP LIN VDD1 RIN REQP 1 2 3 4 5 15 14 13 12 11 VDD3 LOUTP VSS2 ROUTP VDD2 6 7 8 9 10 REQN VSS1 PWDN DRCN ROUTN FEATURES PACKAGE DIMENSIONS Cellular phone PDA Digital still camera (Unit: mm) 4.20 ± 0.20 4.00 ± 0.10 1 0.50 0.05 0.22 ± 0.05 0.05 M 0.22 0.60 ± 0.10 1.00MAX 20-pin QFN + 0.03 0.02 − 0.02 SM6802AB 4.00 ± 0.10 Package 20 Device 4.20 ± 0.20 ORDERING INFORMATION NIPPON PRECISION CIRCUITS INC.—1 SM6802A BLOCK DIAGRAM LEQP LEQN TESTN DRCN PWDN MUTEN − LIN + VDD3 LEVEL SHIFTER BUFFER LOUTP LEVEL SHIFTER BUFFER LOUTN PWM Modulator − + BIAS VREF VREF1 MUTE,POWERDOWN, PROTECTION OSC RIN − REQP REQN + − VSS2 LEVEL SHIFTER BUFFER ROUTP LEVEL SHIFTER BUFFER ROUT PWM Modulator + VSS1 VDD1 VDD2 PIN DESCRIPTION Number Name*1 I/O*2 1 LEQP I Lch equalizer network connection 2 LIN I Lch signal input 3 VDD1 – Supply (input system) 4 RIN I Rch signal input 5 REQP I Rch equalizer network connection 6 REQN I Rch equalizer network connection 7 VSS1 – Ground (input system) 8 PDWN I Power-down control (active LOW) 9 DRCN I Dynamic range compression mode setting (HIGH: normal operation, LOW: compression mode) 10 ROUTN O Rch speaker minus (–) output 11 VDD2 – Supply (output stage) 12 ROUTP O Rch speaker plus (+) output 13 VSS2 – Ground (output stage) 14 LOUTP O Lch speaker plus (+) output 15 VDD3 – Supply (output stage) 16 LOUTN O Lch speaker minus (–) output 17 MUTEN I Mute control (active LOW) 18 TESTN Ip Test pin (HIGH: normal operation, LOW: test mode) 19 VREF1 – Reference voltage 1 (bias voltage) 20 LEQN O Lch equalizer network connection Function *1. VDDS = VDD1, VDDP = VDD2 = VDD3, VSS = VSS1 = VSS2 *2. Ip = input pin with built-in pull-up resistor NIPPON PRECISION CIRCUITS INC.—2 SM6802A SPECIFICATIONS Absolute Maximum Ratings Parameter Symbol Rating Unit VDDS −0.3 to 4.6 V VDDP −0.3 to 7.0 V VSS 0 V VIN VSS − 0.3 to VDDS + 0.3 V TSTG −55 to 125 °C IO 600 mA PD 1500 (Ta = 25°C)*1 mW Supply voltage range Input voltage range Storage temperature range Output current Power dissipation *1. When mounted on a 3.5cm × 3.5cm board, the power dissipation is related to the operating temperature by the following equation. ■ ■ ■ Maximum junction temperature: TMAX = 125°C Operating ambient temperature: Ta = [°C] Thermal resistance: θJ = 66.6°C/W Power dissipation [W] PD = (TMAX − Ta) θJ 1.6 1.4 1.2 1 0.8 0.6 0.4 0.2 0 1.500 1.200 0.900 0.600 25 35 45 55 65 75 85 Operating temperature [°C] Recommended Operating Conditions VSS = VSS1 = VSS2 = VSS3 = 0V, VDDS =VDD1, VDDP = VDD2, VDD3 unless otherwise noted. Parameter Symbol Rating Unit Supply voltage 1 VDDS 2.7 to 3.6 V Supply voltage 2 VDDP 2.7 to 5.5 V Ta −40 to 85 °C Operating ambient temperature Note. VDDP ≥ VDDS NIPPON PRECISION CIRCUITS INC.—3 SM6802A Electrical Characteristics DC Characteristics VSS1 = VSS2 = 0V, VDD1 = 2.7 to 3.6V, VDD2 = VDD3 = 2.7 to 5.5V, Ta = −40 to 85°C unless otherwise noted. Rating Parameter Pin VDD1 Current consumption Symbol Conditions Unit min typ max IDD1A (Note 1) – 5.0 7.0 mA IDD1S (Note 2) – 0.1 0.5 µA VDD2 = VDD3 = 3.6V – 0.6 2.0 mA IDDAA (Note 1) VDD2 = VDD3 = 5V – 2.0 7.0 mA VDD2 = VDD3 = 3.6V – 0.1 0.3 µA IDDAS (Note 2) VDD2 = VDD3 = 5V – 0.1 0.3 µA VIH1 HIGH level 0.7VDD1 – – V VIL1 LOW level – – 0.3VDD1 V VIH2 HIGH level 1.6 – – V VIL2 LOW level – – 0.4 V VDD2 Input voltage 1 Input voltage 2 TESTN, DRCN MUTEN, PDWN Input current TESTN, DRCN, MUTEN, PDWN IIL1 VIN = VSS − 25 90 µA Input leakage current TESTN, DRCN, MUTEN, PDWN ILH1 VIN = VDD1 − – 1.0 µA Note 1. MUTEN = HIGH, PDWN = HIGH, input and VREF1 connected by 600Ω, DRCN = HIGH, no-load output Note 2. MUTEN = LOW, PDWN = LOW, input and VREF1 connected by 600Ω, DRCN = HIGH, no-load output NIPPON PRECISION CIRCUITS INC.—4 SM6802A AC Analog Characteristics VDD1 = VDD2 = VDD3 = 3.6V, VSS1 = VSS2 = 0V, 0.708Vrms analog input amplitude, 1kHz input signal frequency, Ta = 25°C, "Measurement Block Diagram", "Measurement Conditions", "Measurement Circuit", DRCN = PDWN = MUTEN = HIGH, unless otherwise noted. Analog Input Characteristics (LIN, RIN) Rating Parameter Symbol Conditions Unit min typ max Reference input amplitude 1 VAI1 PO = 0.25W – 0.708 – Vrms Reference input amplitude 2 VAI2 PO = 0.05W – 0.142 – Vrms Input resistance RIN 42 60 78 kΩ Input clipping voltage VCLP 0.7 1 1.3 Vrms PO = 0.5W Analog Output Characteristics (LOUTP, LOUTN, ROUTP, ROUTN) Rating Parameter Symbol Conditions Unit min typ max Voltage gain 1 A1 DRCN = HIGH, input amplitude = 0.1Vrms 4.0 6.0 8.0 dB Voltage gain 2 A2 DRCN = LOW, input amplitude = 0.05Vrms 13.0 15.0 17.0 dB Residual noise voltage VNS DRCN = HIGH, input and VREF1 connected by 600Ω – 78 120 µVrms THD + N PO = 0.2W, reference input amplitude 1 – 0.4 1.0 % –60.0 –70.0 – dB 0.6 0.7 0.8 W –90.0 –110 – dBV Total harmonic distortion + noise Channel crosstalk CC (Note 1) Maximum output power POMAX Output power when THD = 10% Mute-mode output voltage VMUTE Output power when MUTEN = LOW HIGH-level output voltage VOH VDDP – 0.2 VDDP – 0.02 VDDP + 0.2 V LOW-level output voltage VOL 0 0.02 0.2 V Efficiency EEF Maximum output power conditions 80 83 – % (Note 2) – –65 – dB Ripple rejection ratio 1 PSRR1 Note 1. Cross-channel leakage signal with standard voltage input on one channel only. Note 2. DRCN = HIGH, 217Hz ripple frequency, 0.2Vrms ripple amplitude on VDD1/VDD2, input and VREF1 connected by 600Ω. Reference Voltage Characteristics (VREF1) Rating Parameter Reference output voltage 1 Symbol VREF1 Unit min typ max 0.45VDDS 0.5VDDS 0.55VDDS V NIPPON PRECISION CIRCUITS INC.—5 SM6802A Measurement Block Diagram 40µH BALANCED INPUT + SPOUT POS 1µF EVALUATION BOARD 8Ω AUDIO ANALYZER 40µH BALANCED INPUT − SPOUT NEG 1µF Measurement Conditions Parameter Audio Analyzer (Audio Precision System Two Cascade) Built-in Filters Excluding residual noise Low-pass filter (20kHz) ON High-pass filter (22Hz) ON Residual noise voltage Low-pass filter (20kHz) ON High-pass filter (22Hz) ON A-weighted NIPPON PRECISION CIRCUITS INC.—6 SM6802A Measurement Circuit LEQP LEQN TESTN SW3* C7 H L L R9* LOUTN MUTEN TESTN VREF1 1µ LEQN LIN SIGNAL INPUT SW4* H C9 150p C1 MUTEN LEQP SPOUT NEG VDD3 LIN LOUTP 1µ VDD1 VDD1 RIN RIN 1µ R10* ROUTP ROUTN DRCN VSS1 REQN REQP PDWN 1µ POWER VDD (2.7 to 5.5V) SPOUT POS POWER VSS (0V) VSS2 C2 SIGNAL INPUT POWER VDD C10 C11 1µ R11* SPOUT POS VDD2 R12* SPOUT NEG SW1* SW2* C8 H H L L 150p REQP ANALOG VSS (0V) REQN PDWN VSS1 DRCN SIGNAL VSS (0V) Note. *C3, C4, C5, C6: not inserted *R1, R2, R3, R4, R5, R6, R7, R8: not inserted *R9, R10, R11, R12: series resistors for dielectric speaker *SW1: HIGH = Power on, LOW = Power off *SW2: HIGH = DRC off, LOW = DRC on *SW3: LOW = Test, HIGH = Normal *SW4: LOW = Mute on, HIGH = Mute off NIPPON PRECISION CIRCUITS INC.—7 SM6802A FUNCTIONAL DESCRIPTION Power-down (PDWN) The device enters power-down mode when PDWN goes LOW. When powered-down, the outputs become high impedance and the internal oscillation stops. In power-down mode, the MUTEN pin should be held LOW. Mute (MUTEN) Mute operation occurs when MUTEN goes LOW. In mute mode, the outputs become high impedance. During mute operation, the protection circuit operation is disabled, but the outputs are protected against output short circuits by their high impedance state. When power is applied, MUTEN should be held LOW for a short interval, shown in the timing diagram below, to prevent pop noise from the speaker. Also, applying and releasing mute operation after power is applied can occur at high speed without generating pop noise. min. 40msec PDWN MUTEN Note. VREF1 load capacitance = 1µF Protection Circuit The protection circuit operates if there is an output short-circuit to the supply, short-circuit to ground, or other excessive load abnormal condition lasting longer than approximately 1µs. Normal operation resumes after approximately 5 seconds. When the protection circuit becomes active, the outputs become high impedance. NIPPON PRECISION CIRCUITS INC.—8 SM6802A Input Equalizer (LIN, LEQP, LEQN, RIN, REQP, REQN) An input equalizer network can be connected to pins LIN, LEQP and LEQN (RIN, REQP and REQN), as shown in the input equivalent circuit and equalizer circuit below. R01 R04 R02 C02 R03 C03 C04 LEQP 1 (REQP) LEQN 20 (REQN) 60k 60k C01 2 − LIN (RIN) + IN' VREF1 The frequency response of the equalizer circuit is given by the following equation, where ƒ is the frequency. 1 1 + 60000 1 1 R03 + 2πƒC03 Response = 20 × log10 1 + 2πƒC01 + 1 + 2πƒC04 R04 [dB] 1 1 1 + + 60000 R01 1 R02 + 1 2πƒC02 Dynamic Range Compression Mode (DRCN) The dynamic range compression mode is set when DRCN is LOW. When a compression mode is used, the gain for small input signals is increased while large input signals are converted using a curve that performs soft-clipping. This increases the average sound pressure level emitted from the speaker during playback. -40 -35 -30 -25 -20 -15 -10 -5 0 5 10 10 5 0 DRC mode Output [dBV] -5 -10 -15 -20 normal mode -25 -30 -35 -40 Input [dBV] NIPPON PRECISION CIRCUITS INC.—9 SM6802A TYPICAL APPLICATION CIRCUITS Dynamic Speaker LC-type LPF Connection 47µH OUTPUT IN SPOUT POS 1µF SOUND GENERATOR IC SM6802 (One side of L/R channels) 47µH SPOUT NEG 1µF Direct Connection LC filter may be required for the measure against EMI, if the wiring between this device and load is long. OUTPUT SOUND GENERATOR IC IN SPOUT POS SM6802 (One side of L/R channels) SPOUT NEG Dielectric Speaker A dielectric speaker is capacitive in nature, and therefore requires output resistor connection. OUTPUT SOUND GENERATOR IC 4Ω IN SPOUT POS * SM6802 (One side of L/R channels) 4Ω SPOUT NEG * Dielectric speaker Taiyo Yuden MLS20070, MLS23070, MLS25070 or similar NIPPON PRECISION CIRCUITS INC.—10 SM6802A Mounting Circuits Connection to LC Filter + VDD2 1µF + VSS2 1µF VDD3 VDD1 VCC SM6802 1µF Z0 VSS1 VSS LOUTP LC filter LOUTN LC filter ROUTP LC filter ROUTN LC filter Speaker Speaker Direct Connection to Load + VDD2 10µF + VSS2 10µF VDD3 VDD1 VCC SM6802 1µF Z0 VSS VSS1 LOUTP Speaker LOUTN ROUTP Speaker ROUTN Note. As for the wiring to VDD1, VDD2, VDD3, VSS1, and VSS2, we recommend to wire from the power supply block. The recommended value of internal impedance (Z0) is approximately less than 1/40 of load resistance. NIPPON PRECISION CIRCUITS INC.—11 SM6802A TYPICAL CHARACTERISTICS Measurement conditions: Refer to “Analog Output Characteristics”. Measurement circuit: Refer to “Measurement Circuit”. +10 +7.5 +5 DRC +2.5 Output [dBV] +0 -2.5 -5 NORMAL -7.5 -10 -12.5 -15 -17.5 -20 -30 -27.5 -25 -22.5 -20 -17.5 -15 -12.5 -10 -7.5 -5 -2.5 +0 +2.5 +5 Input [dBV] Input vs. Output 1.8 Output power [W] 1.5 1.2 0.9 0.6 0.3 0 2.5 3 3.5 4 4.5 5 5.5 Supply voltage [V] Supply voltage vs. Output power 100 10 50 5 THD + N [%] 10 THD + N 5 1 Output power 500m 2 200m 1 100m 0.5 50m 0.2 20m 0.1 10m 0.05 5m 0.02 2m 0.01 -25 Output power [W] 2 20 1m -22.5 -20 -17.5 -15 -12.5 -10 -7.5 -5 -2.5 +0 +2.5 +5 Input [dBV] Input vs. THD + N and output power NIPPON PRECISION CIRCUITS INC.—12 SM6802A -70 -75 -80 -85 -90 Noise [dB] -95 -100 -105 -110 -115 -120 -125 -130 -135 -140 20 50 100 200 500 1k 2k 5k 10k 20k Frequency [Hz] Residual noise vs. Frequency +6 +5 THD + N 2 +4 1 +3 0.5 +2 0.2 0.1 +1 0.05 -1 -0 -2 0.02 0.01 -3 Output 0.005 Output [dBr] THD + N [%] 10 5 -4 -5 0.002 0.001 20 -6 50 100 200 500 1k 2k 5k 10k 20k Frequency [Hz] THD + N and output voltage vs. Frequency +0 -10 -20 PSRR [dBr] -30 -40 PSRR -50 -60 -70 -80 -90 -100 10 20 50 100 200 500 1k 2k 5k 10k 20k Frequency [Hz] PSSR vs. Frequency +0 -20 dBr [dB] -40 -60 -80 -100 -120 -140 20 50 100 200 500 1k 2k 5k 10k 20k Frequency [Hz] Channel crosstalk vs. Frequency NIPPON PRECISION CIRCUITS INC.—13 SM6802A ASSEMBLING PRECAUTION Package corner metals are not IC I/O pins. Don’t connect any lines to these corner metals. Bottom view FOOTPRINT PATTERN The optimum footprint varies depending on the board material, soldering paste, soldering method, and equipment accuracy, all of which need to be considered to meet design specifications. (Unit: mm) HE HD e b3 l1 l2 QFN-20 4.2 4.2 0.5 0.30 ± 0.05 0.20 ± 0.05 0.70 ± 0.05 HE /2 Package b3 HE e b3 l1 e l2 l2 l1 HD /2 HD NIPPON PRECISION CIRCUITS INC.—14 SM6802A Please pay your attention to the following points at time of using the products shown in this document. The products shown in this document (hereinafter “Products”) are not intended to be used for the apparatus that exerts harmful influence on human lives due to the defects, failure or malfunction of the Products. Customers are requested to obtain prior written agreement for such use from NIPPON PRECISION CIRCUITS INC. (hereinafter “NPC”). Customers shall be solely responsible for, and indemnify and hold NPC free and harmless from, any and all claims, damages, losses, expenses or lawsuits, due to such use without such agreement. NPC reserves the right to change the specifications of the Products in order to improve the characteristic or reliability thereof. NPC makes no claim or warranty that the contents described in this document dose not infringe any intellectual property right or other similar right owned by third parties. Therefore, NPC shall not be responsible for such problems, even if the use is in accordance with the descriptions provided in this document. Any descriptions including applications, circuits, and the parameters of the Products in this document are for reference to use the Products, and shall not be guaranteed free from defect, inapplicability to the design for the mass-production products without further testing or modification. Customers are requested not to export or re-export, directly or indirectly, the Products to any country or any entity not in compliance with or in violation of the national export administration laws, treaties, orders and regulations. Customers are requested appropriately take steps to obtain required permissions or approvals from appropriate government agencies. NIPPON PRECISION CIRCUITS INC. 15-6, Nihombashi-kabutocho, Chuo-ku, Tokyo 103-0026, Japan Telephone: +81-3-6667-6601 Facsimile: +81-3-6667-6611 http://www.npc.co.jp/ Email: [email protected] NC0409CE 2005.11 NIPPON PRECISION CIRCUITS INC.—15