NPC SM8703CV

SM8703CV
Clock Generator for DVD Players
OVERVIEW
The SM8703CV is a 27MHz master clock, 5-system output clock generator for DVD players. It has 2 built-in
PLLs that, with the addition of a single crystal oscillator element, can generate 384fs, 512fs and 768fs clocks
which are necessary for MPEG2 systems, plus independent fixed-frequency 27MHz and 33.8688MHz output
clocks. Each output has an output disable function, when the output is not used, to suppress unwanted radiation. Also, the normal output frequency ratio between each output is maintained so that the visual and audio
signals remain synchronized. Supported sampling frequencies (fs) include 44.1 and 48kHz.
FEATURES
APPLICATIONS
■
■
■
DVD players
Set-top boxes
MPEG2 systems
24
12
13
MO2
FSEL/MDT
SO5
RSV
SO2
VDD1
VSS1
RSV
SO3
SO4
VDD2
VSS2
PACKAGE DIMENSIONS
ORDERING INFORMATION
Device
Package
SM8703CV
24-pin VSOP
(Unit: mm)
Weight: 0.1g
+ 0.05
0.15 − 0.02
7.8 ± 0.1
0.5 ± 0.2
■
■
1
7.6 ± 0.2
■
■
VDD
VSS
MO1
MCK
MLEN
VDDA
VSSA
XTI
XTO
RSV
RSV
SO1
+ 0.2
1.25 − 0.1
■
(Top view)
0.65
0.1
+ 0.1
0.22 − 0.05
0 to 10
0.1 ± 0.1
■
27MHz master clock (internal PLL reference clock)
Generated clocks
• 27MHz output
• 33.8688MHz output
• 384fs output
• 512fs output
• 768fs output
Sampling frequency fs
• 44.1/48kHz
Output disable function
Low jitter output: 100ps (typ, 15pF load)
Supply voltage: 3.3V
24-pin VSOP package
5.6 ± 0.1
■
PINOUT
0.13 M
SEIKO NPC CORPORATION —1
SM8703CV
BLOCK DIAGRAM
FSEL/MDT
MCK
MLEN
External
Interface
Divider0
Phase
Comparator0
XTI
Charge
Pump0
SO5
LPF0
VCO0
Oscillator
SO4
XTO
Divider
Divider0
SO3
SO2
Divider1
Phase
Comparator1
Charge
Pump1
LPF1
VCO1
SO1
Divider1
MO1
MO2
SEIKO NPC CORPORATION —2
SM8703CV
PIN DESCRIPTION
Number
Name
I/O
1
VDD
–
Power supply for Digital block
2
VSS
–
VSS for Digital block
3
MO1
O
27MHz fixed-frequency output 1
MCK
Ip1
Serial interface bit clock input
5
MLEN
Ip1
Serial interface latch enable input
6
VDDA
–
Power supply for Analog block
7
VSSA
–
VSS for Analog block
8
XTI
I
Reference signal crystal oscillator element connection or external clock input
9
XTO
O
Reference signal crystal oscillator element connection
10
RSV
–
Reserved (must be open)
11
RSV
–
Reserved (must be open)
12
SO1
O
33.8688MHz fixed-frequency output
13
VSS2
–
VSS for Output buffer
14
VDD2
–
Power supply for Output buffer
15
SO4
O
512fs output
16
SO3
O
512fs output
17
RSV
–
Reserved (must be open)
18
VSS1
–
VSS for Output buffer
19
VDD1
–
Power supply for Output buffer
20
SO2
O
384fs output
21
RSV
–
Reserved (must be open)
22
SO5
O
768fs output
23
FSEL/MDT
Ip1
Parallel mode: Sampling frequency select signal input
Serial mode: Control data input
24
MO2
O
27MHz fixed-frequency output 2
4
Description
1. Schmitt trigger input with internal pull-up resistor
SEIKO NPC CORPORATION —3
SM8703CV
SPECIFICATIONS
Absolute Maximum Ratings
Parameter
Rating
Unit
VDDA , VDD ,
VDD1 , VDD2
−0.3 to 6.5
V
Supply voltage deviation
VDDA – VDD ,
VDDA – VDD1 ,
VDDA – VDD2 ,
VDD – VDD1 ,
VDD – VDD2 ,
VDD1 – VDD2
±0.1
V
Ground voltage deviation
VSSA – VSS ,
VSSA – VSS1 ,
VSSA – VSS2 ,
VSS – VSS1 ,
VSS – VSS2 ,
VSS1 – VSS2
±0.1
V
Supply voltage range
Input voltage range
Output voltage range
Symbol
Condition
VIN
Digital inputs
−0.3 to VDD + 0.3
V
VOUT
Digital outputs
−0.3 to VDD + 0.3
V
Power dissipation
PD
300
mW
Storage temperature range
Tstg
−55 to 125
°C
Rating
Unit
VDDA , VDD ,
VDD1 , VDD2
3.0 to 3.6
V
Topr
–40 to 85
°C
Recommended Operating Conditions
Parameter
Supply voltage ranges
Operating temperature range
Symbol
Condition
SEIKO NPC CORPORATION —4
SM8703CV
DC Electrical Characteristics
External clock, Ta = –40 to 85°C, VDDA = VDD = VDD1 = VDD2 = 3.0 to 3.6V unless otherwise noted.
Rating
Parameter
Symbol
Condition
Unit
min
typ
max
–
32
45
mA
Current consumption
IDD
All supplies.
VDDA = VDD = VDD1 = VDD2 = 3.3V,
Ta = 25°C, fs = 48kHz,
Crystal oscillator element,
no load on all outputs
HIGH-level input voltage
VIH
XTI, FSEL/MDT, MCK, MLEN
0.8VDD
–
–
V
LOW-level input voltage
VIL
XTI, FSEL/MDT, MCK, MLEN
–
–
0.2VDD
V
HIGH-level input current
IIH1
FSEL/MDT, MCK, MLEN (Note 1)
VIN = VDD
–
–
1
µA
LOW-level input current
IIL1
FSEL/MDT, MCK, MLEN (Note 1)
VIN = 0V
–
–
−100
µA
HIGH-level input current
IIH2
XTI, VIN = VDD
–
–
40
µA
LOW-level input current
IIL2
XTI, VIN = 0V
–
–
−40
µA
HIGH-level output voltage
VOH
All outputs. IOH = −2mA
VDD − 0.4
–
–
V
LOW-level output voltage
VOL
All outputs. IOL = 4mA
–
–
0.4
V
Note 1: Schmitt trigger input with internal pull-up resistor
AC Electrical Characteristics
External clock, Ta = –40 to 85°C, VDDA = VDD = VDD1 = VDD2 = 3.0 to 3.6V unless otherwise noted.
Rating
Parameter
Symbol
Condition
Unit
min
typ
max
–
27.0000
–
MHz
XTI external input clock frequency
fM
Output clock rise time
tR
All outputs, 0.2 to 0.8VDD ,
CL = 15pF
–
2.0
–
ns
Output clock fall time
tF
All outputs, 0.8 to 0.2VDD ,
CL = 15pF
–
2.0
–
ns
Output clock jitter
JITTER
All outputs, Standard tolerance,
Crystal oscillator element,
CL = 15pF
–
100
–
ps
Output clock duty1
DUTY
All outputs, Crystal oscillator
element, CL = 15pF
45
50
55
%
Settling time
tS
All outputs
–
–
100
ns
Power-up time2
tP
All outputs
–
15
30
ms
1. 1.4V to 1.4V. Ta = 20°C. The characteristics of output clock jitter and output clock duty depends on crystal oscillator.
NPC’s standard crystal oscillator: R = 10.5Ω, L = 5.38mH, Ca = 6.74fF, Cb = 1.85pF
measurement apparatus: HP4195
Load capacitance: C1 = 7pF, C2 = 11pF
Cb
L
Ca
R
2. Time from OFF condition to stable frequency output.
SEIKO NPC CORPORATION —5
SM8703CV
Serial Interface AC Characteristics
External clock, Ta = –40 to 85°C, VDDA = VDD = VDD1 = VDD2 = 3.0 to 3.6V unless otherwise noted.
Rating
Parameter
Symbol
Condition
Unit
min
typ
max
MCK HIGH-level pulsewidth
tMCWH
40
–
–
ns
MCK LOW-level pulsewidth
tMCWL
40
–
–
ns
MCK pulse cycle time
tMCY
100
–
–
ns
MDT setup time
tMDS
40
–
–
ns
MDT hold time
tMDH
40
–
–
ns
MLEN setup time1
tMLS
40
–
–
ns
MLEN hold time2
tMLH
40
–
–
ns
MLEN HIGH-level pulsewidth
tMHH
200
–
–
ns
MLEN LOW-level pulsewidth
tMLL
16 × tMCY
–
–
ns
1. Time from the MLEN falling edge to the next MCK rising edge. If the MCK clock stops after the LSB, the MLEN rise timing is optional.
2. Time from MCK rising edge corresponding to the LSB to the MLEN rising edge.
tMCWH tMCWL
tMLH
tMLS
MCK
0.5VDD
tMCY
MDT
MSB
LSB
tMLS
tMDS
0.5VDD
tMDH
tMLL
tMHH
MLEN
0.5VDD
SEIKO NPC CORPORATION —6
SM8703CV
FUNCTIONAL DESCRIPTION
27MHz Master Clock
The 27MHz master clock is generated either by connecting a crystal oscillator element between XTI (pin 8)
and XTO (pin 9), as shown in figure 1, or by connecting an external 27MHz clock to XTI, as shown in figure 2.
The crystal oscillator element must be used in fundamental frequency mode.
C2
XTI (Pin8)
Internal
Circuits
Oscillator
XTO (Pin9)
C1
C1, C2 = 5 to 33pF
MO1 (Pin3)
MO2 (Pin24)
SM8703CV
Figure 1. Crystal oscillator connection
External Clock
XTI (Pin8)
Oscillator
Open
Internal
Circuits
XTO (Pin9)
MO1 (Pin3)
MO2 (Pin24)
SM8703CV
Figure 2. External clock input
SEIKO NPC CORPORATION —7
SM8703CV
Sampling Frequency and Output Clock Frequency
The SM8703CV generates several output clocks from the 27MHz master clock, with frequencies of 384fs
(SO2), 512fs (SO3, SO4) and 768fs (SO5), where fs is the sampling frequency selected by external control
inputs. SO1 outputs a 33.8688MHz clock. The supported sampling frequencies are 44.1kHz and 48kHz,
selected by the sampling frequency select pin (FSEL). The generated frequencies are shown in table 1.
Table 1. Sampling frequency and output clock frequency
Output clock frequency [MHz]
Sampling
frequency fs
FSEL
SO1
SO2
SO3, SO4
SO5
LOW
44.1kHz
33.8688
16.9344
22.5792
33.8688
HIGH
48kHz
33.8688
18.4320
24.5760
36.8640
Enable/Disable control
A 3-wire serial interface is provided using MCK (pin 4), MLEN (pin 5), and MDT (pin 23, MDT/FSEL).
Using serial control, each output frequency can be enabled (disabled when LOW) individually, or disabled to
prevent unwanted output.
MCK
FSEL/MDT
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
MLEN
Figure 3. Serial control format
The 16-bit mode register (MREG) is shown in Figure 4. The name and function of each bit are shown in Tables
2 and 3. Serial control is enabled by setting D15-D10 to "011100".
MREG
0
1
1
1
0
0
D15
D14
D13
D12
D11
D10
RSV CE5
D9
D8
CE4
CE3
CE2
CE1 RSV RSV RSV RSV
D7
D6
D5
D4
D3
D2
D1
D0
Note: RSV is fixed LOW.
Figure 4. Mode register
SEIKO NPC CORPORATION —8
SM8703CV
Table 2. Mode register function
Bit
Name
Function
D9
RSV
Must be "LOW"
D8
CE5
SO2 output enable/disable
D7
CE4
SO3, SO4 output enable/disable
D6
CE3
SO5 output enable/disable
D5
CE2
SO1 output enable/disable
D4
CE1
MO1, MO2 output enable/disable
D3/D2/D1/D0
RSV
Must be "LOW"
Table 3. Clock output control settings (CE5 to 1)
CE5 to CE1
Clock output
LOW
Disable (Output fixed "LOW")
HIGH
Enable (Default)
Note
The output frequency changes depending on the MDT pin function (as MDT and FSEL, the sampling frequency
select signal input, share a common pin). Refer to the section “Settling Time (when the sampling frequency is
changed)”.
MCK
MREG (16bit data)
FSEL/MDT
MLEN
ts
SO2 to 5
Stable
Unstable
Stable
Figure 5. Serial transfer timing
SEIKO NPC CORPORATION —9
SM8703CV
Settling Time (when the sampling frequency is changed)
The output response when the frequency is changed is shown in figure 6.
FSEL/MDT
tS
SO2
SO3
SO4
SO5
fs = 44.1kHz
tS
fs = 48kHz
MO1
MO2
27.0000MHz
SO1
33.8688MHz
fs = 44.1kHz
Figure 6. System clock transient timing
SEIKO NPC CORPORATION —10
SM8703CV
TYPICAL APPLICATION
+3.3V
+3.3V
CPU
27MHz
VDD
MO2
27MHz
C3
VSS
FSEL/MDT
MO1
SO5
MCK
RSV
MLEN
SO2
VDDA
VDD1
VSSA
VSS1
768fs
384fs
C5
C4
C1
XTI
RSV
XTO
SO3
512fs
RSV
SO4
512fs
RSV
VDD2
SO1
VSS2
X'tal
C2
C6
SM8703CV
33.8688MHz
■
■
■
■
Connect the decoupling capacitors (approximately
0.1µF and 1000pF) in parallel, as close to the
power supply pins as possible.
A solid VSS pattern beneath the IC should be used
to minimize noise.
Master clock stability affects the stability of the
other outputs. If a crystal oscillator is used, the
oscillator element and load capacitors should be
placed as close to the SM8703CV as possible, and
connected with wires as short as possible. The
crystal oscillator element and load capacitor combination has an effect on frequency accuracy, and
the load capacitors (C1, C2) should be selected to
match the required application.
The SM8703CV outputs several high-frequency
clocks, so the supply wiring pattern (including
decoupling capacitors) should be considered carefully. In particular, the output supply wiring and
PLL supply wiring should separated to prevent
noise insertion. The output wiring capacitance
should be minimized as much as possible to prevent noise. If necessary, the output clocks can be
buffered.
■
Power supply and VSS pins.
• VDD : Power supply for digital block
(CPU I/F*, MO1, MO2)
• VSS : VSS for digital block
(CPU I/F*, MO1, MO2)
• VDDA : Power supply for PLL block
(XTI, XTO, PLL/VCO)
• VSSA : VSS for PLL block
(XTI, XTO, PLL/VCO)
• VDD1 : Power supply for output block
(except SO1)
• VSS1 : VSS for output block
(except SO1)
• VDD2 : Power supply for SO1
• VSS2 : VSS for SO1
*: CPU I/F: FSEL/MDT, MLEN, MCK
SEIKO NPC CORPORATION —11
SM8703CV
Please pay your attention to the following points at time of using the products shown in this document.
The products shown in this document (hereinafter “Products”) are not intended to be used for the apparatus that exerts harmful influence on
human lives due to the defects, failure or malfunction of the Products. Customers are requested to obtain prior written agreement for such
use from SEIKO NPC CORPORATION (hereinafter “NPC”). Customers shall be solely responsible for, and indemnify and hold NPC free and
harmless from, any and all claims, damages, losses, expenses or lawsuits, due to such use without such agreement. NPC reserves the right
to change the specifications of the Products in order to improve the characteristic or reliability thereof. NPC makes no claim or warranty that
the contents described in this document dose not infringe any intellectual property right or other similar right owned by third parties.
Therefore, NPC shall not be responsible for such problems, even if the use is in accordance with the descriptions provided in this document.
Any descriptions including applications, circuits, and the parameters of the Products in this document are for reference to use the Products,
and shall not be guaranteed free from defect, inapplicability to the design for the mass-production products without further testing or
modification. Customers are requested not to export or re-export, directly or indirectly, the Products to any country or any entity not in
compliance with or in violation of the national export administration laws, treaties, orders and regulations. Customers are requested
appropriately take steps to obtain required permissions or approvals from appropriate government agencies.
SEIKO NPC CORPORATION
15-6, Nihombashi-kabutocho, Chuo-ku,
Tokyo 103-0026, Japan
Telephone: +81-3-6667-6601
Facsimile: +81-3-6667-6611
http://www.npc.co.jp/
Email: [email protected]
NC0113BE
2006.04
SEIKO NPC CORPORATION —12