NSC 74F540PC

54F/74F540 # 54F/74F541
Octal Buffer/Line Driver with TRI-STATEÉ Outputs
General Description
Features
The ’F540 and ’F541 are similar in function to the ’F240 and
’F244 respectively, except that the inputs and outputs are
on opposite sides of the package (see Connection Diagrams). This pinout arrangement makes these devices especially useful as output ports for microprocessors, allowing
ease of layout and greater PC board density.
Y
Commercial
Y
Package
Number
Military
TRI-STATE outputs drive bus lines
Inputs and outputs opposite side of package, allowing
easier interface to microprocessors
Package Description
N20A
20-Lead (0.300× Wide) Molded Dual-In-Line
J20A
20-Lead Ceramic Dual-In-Line
74F540SC (Note 1)
M20B
20-Lead (0.300× Wide) Molded Small Outline, JEDEC
74F540SJ (Note 1)
M20D
20-Lead (0.300× Wide) Molded Small Outline, EIAJ
54F540FM (Note 2)
W20A
20-Lead Cerpack
54F540LM (Note 2)
E20A
20-Lead Ceramic Leadless Chip Carrier, Type C
N20A
20-Lead (0.300× Wide) Molded Dual-In-Line
J20A
20-Lead Ceramic Dual-In-Line
74F541SC (Note 1)
M20B
20-Lead (0.300× Wide) Molded Small Outline, JEDEC
74F541SJ (Note 1)
M20D
20-Lead (0.300× Wide) Molded Small Outline, EIAJ
54F541FM (Note 2)
W20A
20-Lead Cerpack
54F541LM (Note 2)
E20A
20-Lead Ceramic Leadless Chip Carrier, Type C
74F540PC
54F540DM (Note 2)
74F541PC
54F541DM (Note 2)
Note 1: Devices also available in 13× reel. Use suffix e SCX and SJX.
Note 2: Military grade device with environmental and burn-in processing. Use suffix e DMQB, FMQB and LMQB.
Connection Diagrams
Pin Assignment for
DIP, SOIC and Flatpak
Pin Assignment
for LCC
’F540
TL/F/9553 – 2
TL/F/9553 – 1
TRI-STATEÉ is a registered trademark of National Semiconductor Corporation.
C1995 National Semiconductor Corporation
TL/F/9553
RRD-B30M75/Printed in U. S. A.
54F/74F540 # 54F/74F541 Octal Buffer/Line Driver with TRI-STATE Outputs
May 1995
Connection Diagrams (Continued)
’F541
TL/F/9553 – 5
TL/F/9553–4
Unit Loading/Fan Out
54F/74F
Pin Names
OE1, OE2
In
On, On
Description
U.L.
HIGH/LOW
Input IIH/IIL
Output IOH/IOL
TRI-STATE Output Enable Input (Active LOW)
Inputs
Outputs
1.0/1.0
1.0/1.0
600/106.6 (80)
20 mA/b0.6 mA
20 mA/b0.6 mA
b 12 mA/64 mA (48 mA)
Truth Table
Inputs
Outputs
OE1
OE2
I
’F540
’F541
L
H
X
L
L
X
H
L
H
X
X
L
L
Z
Z
H
H
Z
Z
L
H e HIGH Voltage Level
L e LOW Voltage Level
X e Immaterial
Z e High Impedance
Logic Diagrams
IEEE/IEC
’F540
IEEE/IEC
’F541
TL/F/9553–3
TL/F/9553 – 6
2
Absolute Maximum Ratings (Note 1)
Recommended Operating
Conditions
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Storage Temperature
b 65§ C to a 150§ C
Ambient Temperature under Bias
Junction Temperature under Bias
Plastic
b 55§ C to a 125§ C
Free Air Ambient Temperature
Military
Commercial
b 55§ C to a 125§ C
0§ C to a 70§ C
Supply Voltage
Military
Commercial
b 55§ C to a 175§ C
b 55§ C to a 150§ C
a 4.5V to a 5.5V
a 4.5V to a 5.5V
VCC Pin Potential to
Ground Pin
b 0.5V to a 7.0V
b 0.5V to a 7.0V
Input Voltage (Note 2)
b 30 mA to a 5.0 mA
Input Current (Note 2)
Voltage Applied to Output
in HIGH State (with VCC e 0V)
b 0.5V to VCC
Standard Output
b 0.5V to a 5.5V
TRI-STATE Output
Current Applied to Output
in LOW State (Max)
twice the rated IOL (mA)
Note 1: Absolute maximum ratings are values beyond which the device may
be damaged or have its useful life impaired. Functional operation under
these conditions is not implied.
Note 2: Either voltage limit or current limit is sufficient to protect inputs.
DC Electrical Characteristics
Symbol
54F/74F
Parameter
Min
VIH
Input HIGH Voltage
VIL
Input LOW Voltage
Typ
Units
2.0
VCD
Input Clamp Diode Voltage
VOH
Output HIGH
Voltage
54F 10% VCC
54F 10% VCC
74F 10% VCC
74F 10% VCC
74F 5% VCC
VCC
Conditions
Max
V
Recognized as a HIGH Signal
0.8
V
Recognized as a LOW Signal
b 1.2
V
2.4
2.0
2.4
2.0
2.7
Min
IIN e b18 mA
V
Min
IOH
IOH
IOH
IOH
IOH
e
e
e
e
e
b 3 mA
b 12 mA
b 3 mA
b 15 mA
b 3 mA
VOL
Output LOW
Voltage
54F 10% VCC
74F 10% VCC
0.55
0.55
V
Min
IOL e 48 mA
IOL e 64 mA
IIH
Input HIGH
Current
54F
74F
20.0
5.0
mA
Max
VIN e 2.7V
IBVI
Input HIGH Current
Breakdown Test
54F
74F
100
7.0
mA
Max
VIN e 7.0V
ICEX
Output HIGH
Leakage Current
54F
74F
250
50
mA
Max
VOUT e VCC
VID
Input Leakage
Test
74F
V
0.0
IID e 1.9 mA
All Other Pins Grounded
IOD
Output Leakage
Circuit Current
74F
3.75
mA
0.0
VIOD e 150 mV
All Other Pins Grounded
IIL
Input LOW Current
b 0.6
mA
Max
VIN e 0.5V
IOZH
Output Leakage Current
50
mA
Max
VOUT e 2.7V
IOZL
Output Leakage Current
b 50
mA
Max
VOUT e 0.5V
IOS
Output Short-Circuit Current
b 225
mA
Max
VOUT e 0V
IZZ
Bus Drainage Test
500
mA
0.0V
VOUT e 5.25V
4.75
b 100
3
DC Electrical Characteristics
Symbol
(Continued)
54F/74F
Parameter
Min
Typ
Max
Units
VCC
Conditions
ICCH
Power Supply Current (’F540)
11
20
mA
Max
VO e HIGH
ICCL
Power Supply Current (’F540)
53
75
mA
Max
VO e LOW
ICCZ
Power Supply Current (’F540)
31
45
mA
Max
VO e HIGH Z
ICCH
Power Supply Current (’F541)
26
35
mA
Max
VO e HIGH
ICCL
Power Supply Current (’F541)
55
75
mA
Max
VO e LOW
ICCZ
Power Supply Current (’F541)
31
55
mA
Max
VO e HIGH Z
AC Electrical Characteristics
Symbol
Parameter
74F
54F
74F
TA e a 25§ C
VCC e a 5.0V
CL e 50 pF
TA, VCC e Mil
CL e 50 pF
TA, VCC e Com
CL e 50 pF
Min
Typ
Max
Min
Max
Min
Max
tPLH
tPHL
Propagation Delay
Data to Output (’F540)
1.5
1.0
3.0
2.0
5.0
4.0
1.0
1.0
6.0
4.5
1.0
1.0
5.5
4.0
tPZH
tPZL
Output Enable Time (’F540)
2.5
3.5
4.9
5.8
8.0
10.0
2.5
3.5
9.0
11.0
2.5
3.5
8.5
10.5
tPHZ
tPLZ
Output Disable Time (’F540)
1.5
1.0
3.4
2.5
6.0
5.5
1.5
1.0
7.0
7.5
1.5
1.0
6.5
6.0
tPLH
tPHL
Propagation Delay
Data to Output (’F541)
1.5
1.5
3.3
2.7
5.5
5.5
1.5
1.5
6.0
6.0
tPZH
tPZL
Output Enable Time (’F541)
3.0
3.5
5.8
6.1
8.0
8.5
2.5
3.0
9.5
9.5
tPHZ
tPLZ
Output Disable Time (’F541)
1.5
1.5
3.4
2.9
6.0
5.5
1.5
1.5
6.5
6.0
Units
ns
ns
ns
ns
Ordering Information
The device number is used to form part of a simplified purchasing code where the package type and temperature range are
defined as follows:
74F
540/541
Temperature Range Family
74F e Commercial
54F e Military
S
C
X
Special Variations
QB e Military grade device with
environmental and burn-in
processing
X e Devices shipped in 13× reel
Device Type
Package Code
P e Plastic DIP
D e Ceramic DIP
F e Flatpak
L e Leadless Chip Carrier (LCC)
S e Small Outline SOIC JEDEC
SJ e Small Outline SOIC EIAJ
Temperature Range
C e Commercial (0§ C to a 70§ C)
M e Military (b55§ C to a 125§ C)
4
Physical Dimensions inches (millimeters)
20-Lead Ceramic Leadless Chip Carrier (L)
NS Package Number E20A
5
Physical Dimensions inches (millimeters) (Continued)
20-Lead Ceramic Dual-In-Lead Package (D)
NS Package Number J20A
20-Lead (0.300× Wide) Molded Small Outline Package, JEDEC (S)
NS Package Number M20B
6
Physical Dimensions inches (millimeters) (Continued)
20-Lead (0.300× Wide) Molded Small Outline Package, EIAJ (SJ)
NS Package Number M20D
20-Lead (0.300× Wide) Molded Dual-In-Line Package (P)
NS Package Number N20A
7
54F/74F540 # 54F/74F541 Octal Buffer/Line Driver with TRI-STATE Outputs
Physical Dimensions inches (millimeters) (Continued)
20-Lead Ceramic Flatpak (F)
NS Package Number W20A
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