MM54C48/MM74C48 BCD-to-7 Segment Decoder General Description Features The MM54C48/MM74C48 BCD-to-7 segment decoder is a monolithic complementary MOS (CMOS) integrated circuit constructed with N- and P-channel enhancement transistors. Seven NAND gates and one driver are connected in pairs to make binary-coded decimal (BCD) data and its complement available to the seven decoding AND-OR-INVERT gates. The remaining NAND gate and three input buffers provide test-blanking input/ripple-blanking output, and ripple-blanking inputs. Y Wide supply voltage range 3.0V to 15V Guaranteed noise margin 1.0V Y High noise immunity 0.45 VCC (typ.) Y Low power fan out of 2 TTL compatibility driving 74L Y High current sourcing output (up to 50 mA) Y Ripple blanking for leading or trailing zeros (optional) Y Lamp test provision Y Connection Diagram Dual-In-Line Package TL/F/5883 – 1 Top View Order Number MM54C48 or MM74C48 Segment Identification Numerical Designations and Resultant Displays TL/F/5883–2 TL/F/5883 – 3 C1995 National Semiconductor Corporation TL/F/5883 RRD-B30M105/Printed in U. S. A. MM54C48/MM74C48 BCD-to-7 Segment Decoder March 1988 Absolute Maximum Ratings (Note 1) Power Dissipation Dual-In-Line Small Outline If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. Voltage at Any Pin Operating VCC Range b 0.3V to VCC a 0.3V Operating Temperature Range MM54C48 MM74C48 b 55§ C to a 125§ C b 40§ C to a 85§ C Storage Temperature Range b 65§ C to a 150§ C 700 mW 500 mW Absolute Maximum VCC Lead Temperature (Soldering, 10 seconds) 3.0V to 15V 18V 260§ C DC Electrical Characteristics Min/Max limits apply across temperature range unless otherwise noted Symbol Parameter Conditions Min Typ Max Units CMOS to CMOS VIN(1) VIN(0) Logical ‘‘1’’ Input Voltage Logical ‘‘0’’ Input Voltage VCC e 5.0V 3.5 VCC e 10V 8.0 V V VCC e 5.0V 1.5 VCC e 10V VOUT(1) Logical ‘‘1’’ Output Voltage (RB Output Only) VOUT(0) Logical ‘‘0’’ Output Voltage 2.0 VCC e 5.0V, IO e b10 mA 4.5 VCC e 10V, IO e b10 mA 9.0 V V V V VCC e 5.0V, IO e 10 mA 0.5 V VCC e 10V, IO e 10 mA 1.0 V IIN(1) Logical ‘‘1’’ Input Current VCC e 15.0V, VIN e 15V IIN(0) Logical ‘‘0’’ Input Current VCC e 15.0V, VIN e 0V ICC Supply Current VCC e 15V 0.005 b 1.0 1.0 b 0.005 0.05 mA mA 300 mA CMOS/LPTTL INTERFACE VIN(1) VIN(0) VOUT(1) VOUT(0) Logical ‘‘1’’ Input Voltage Logical ‘‘0’’ Input Voltage Logical ‘‘1’’ Output Voltage (RB Output Only) Logical ‘‘0’’ Output Voltage 54C, VCC e 4.5V VCC b 1.5 74C, VCC e 4.75V VCC b 1.5 V V 54C, VCC e 4.5V 0.8 74C, VCC e 4.75V 0.8 54C, VCC e 4.5V, IO e b50 mA 2.4 74C, VCC e 4.75V, IO e b50 mA 2.4 V V V V 54C, VCC e 4.5V, IO e 360 mA 0.4 V 74C, VCC e 4.75V, IO e 360 mA 0.4 V b 0.80 mA b 4.0 mA OUTPUT DRIVE (See 54C/74C Family Characteristics Data Sheet) ISOURCE Output Source Current (P-Channel)(RB Output Only) VCC e 4.75V, VOUT e 0.4V VCC e 10V, VOUT e 0.5V ISINK Output Sink Current (N-Channel) VCC e 5.0V, VOUT e VCC TA e 25§ C 1.75 3.6 mA ISINK Output Sink Current (N-Channel) VCC e 10V, VOUT e VCC TA e 25§ C 8.0 16 mA ISOURCE Output Source Current (NPN Bipolar) VCC e 5.0V, VOUT e 3.4V b 20 b 50 mA b 65 mA b 50 mA b 65 mA VCC e 5.0V, VOUT e 3.0V VCC e 10V, VOUT e 8.4V VCC e 10V, VOUT e 8.0V b 20 Note 1: ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed. Except for ‘‘Operating Temperature Range’’ they are not meant to imply that the devices should be operated at these limits. The table of ‘‘Electrical Characteristics’’ provides conditions for actual device operation. Note 2: Capacitance is guaranteed by periodic testing. Note 3: CPD determines the no load AC power consumption of any CMOS device. For complete explanation see 54C/74C Family Characteristics Application Note, AN-90. 2 AC Electrical Characteristics* TA e 25§ C, CL e 50 pF, unless otherwise specified Symbol Parameter Conditions Typ Max Units tpd0, tpd1 Propagation Delay to a ‘‘1’’ or ‘‘0’’ on Segment Outputs from Data Inputs VCC e 5.0V 450 1500 ns VCC e 10V 160 500 ns VCC e 5.0V 500 1600 ns VCC e 10V 180 550 ns VCC e 5.0V 350 1200 ns VCC e 10V 140 450 ns VCC e 5.0V 450 1500 ns VCC e 10V 160 500 ns VCC e 5.0V 600 2000 ns VCC e 10V 250 800 ns VCC e 5.0V 140 450 ns VCC e 10V 50 150 ns tpd0 tpd0 tpd1 tpd1 tpd0 Propagation Delay to a ‘‘0’’ on Segment Outputs from RB Input Propagation Delay to a ‘‘0’’ on Segment Outputs from Blanking Input Propagation Delay to a ‘‘1’’ on Segment Outputs from Lamp Test Propagation Delay to a ‘‘1’’ on RB Output from RB Input Propagation Delay to a ‘‘0’’ on RB Output from RB Input Min *AC Parameters are guaranteed by DC correlated testing. Typical Applications Typical Connection Utilizing the Ripple-Blanking Feature TL/F/5883 – 4 First three stages will blank leading zeros, the fourth stage will not blank zeros. 3 Typical Applications (Continued) Blanking Input Connection Diagram TL/F/5883 – 5 When RBO/BI is forced low, all segment outputs are off regardless of the state of any other input condition. Light Emitting Diode (LED) Readout TL/F/5883 – 7 TL/F/5883 – 6 Incandescent Readout Fluorescent Readout TL/F/5883 – 9 TL/F/5883 – 8 **A filament pre-warm resistor is recommended to reduce filament thermal shock and increase the effective cold resistance of the filament. 4 Typical Applications (Continued) Gas Discharge Readout Liquid Crystal (LC) Readout TL/F/5883 – 11 Direct DC drive of LC’s not recommended for life of LC readouts. TL/F/5883 – 10 Truth Table Decimal or Function Inputs Outputs BI/RBO ² LT RBI D C B A 0 1 2 3 H H H H H X X X L L L L L L L L L L H H L H L H 4 5 6 7 H H H H X X X X L L L L H H H H L L H H 8 9 10 11 H H H H X X X X H H H H L L L L 12 13 14 15 H H H H X X X X H H H H BI RBI LT X H L X L X X L X Note a b c d e f g H H H H H L H H H H H H H H L H H L H H H L H L H L L L L L H H L H L H H H H H L H L H H L L H H H H H L H H L L L H L H H H L H H H L L L H H L H L H H H H H H H L L H H L L H H L H H L H H H L H L H H L L H H H H H H H H L L H H L H L H H H H H L H L L H L L L L L L L L H H L L L H L H H H L H H H L X L X X L X X L X L L H L L H L L H L L H L L H L L H L L H L L H 1 1 2 3 4 H e high level, L e low level, X e irrelevant Note 1: The blanking input (BI) must be open when output functions 0–15 are desired. The ripple-blanking input (RBI) must be high, if blanking of a decimal zero is not desired. Note 2: When a low logic level is applied directly to the blanking input (BI), all segment outputs are low regardless of the level of any other input. Note 3: When ripple-blanking input (RBI) and inputs A, B, C, and D are at a low level with the lamp-test input high, all segment outputs go low and the rippleblanking output (RBO) goes to a low level (response condition). Note 4: When the blanking input/ripple-blanking output (BI/RBO) is open and a low is applied to the lamp-test input, all segment outputs are high. ² One BI/RBO is wire-AND logic serving as blanking input (BI) and/or ripple-blanking output (RBO). 5 MM54C48/MM74C48 BCD-to-7 Segment Decoder Physical Dimensions inches (millimeters) Ceramic Dual-In-Line Package (J) Order Number MM54C48J or MM74C48J NS Package Number J16A Molded Dual-In-Line Package (N) Order Number MM54C48N or MM74C48N NS Package Number N16E LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. 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